The present disclosure, in various embodiments, relates generally to the field of memory device design and fabrication. More particularly, the present disclosure relates to design and fabrication of memory cells characterized as Spin Torque Transfer Magnetic Random Access Memory (STT-MRAM).
Magnetic Random Access Memory (MRAM) is a non-volatile computer memory technology based on magnetoresistance. MRAM is non-volatile and so can maintain memory content when the memory device is not powered. MRAM data is stored by magnetoresistive elements. Generally, the magnetoresistive elements in an MRAM cell are made from two magnetic regions, each of which accepts and sustains magnetization. The magnetization of one region (the “pinned region”) is fixed in its magnetic orientation, and the magnetization orientation of the other region (the “free region”) can be changed. Thus, a programming current can cause the magnetic orientations of the two magnetic regions to be either parallel, giving a lower electrical resistance across the magnetoresistive elements (which may be defined as a “0” state), or antiparallel, giving a higher electrical resistance across the magnetoresistive elements (which may be defined as a “1” state) of the MRAM cell. The switching of the magnetic orientation of the free region and the resulting high or low resistance states across the magnetoresistive elements provide for the write and read operations of the typical MRAM cell.
One type of MRAM cell is a spin torque transfer MRAM (STT-MRAM) cell. A conventional STT-MRAM cell may include a magnetic cell core, which may include a magnetic tunnel junction (MTJ) or a spin valve structure. An MTJ is a magnetoresistive data storing element including two magnetic regions (one pinned and one free) and a non-magnetic, electrically insulating region in between, which may be accessed through data lines (e.g., bit lines), access lines (e.g., word lines), and an access transistor. A spin valve has a structure similar to the MTJ, except a spin valve has a conductive region in between the two magnetic regions.
In operation, a programming current may flow through the access transistor and the magnetic cell core. The pinned region within the cell core polarizes the electron spin of the programming current, and torque is created as the spin-polarized current passes through the core. The spin-polarized electron current interacts with the free region by exerting a torque on the free region. When the torque of the spin-polarized electron current passing through the core is greater than a critical switching current density (Jc) of the free region, the torque exerted by the spin-polarized electron current is sufficient to switch the direction of the magnetization of the free region. Thus, the programming current can be used to cause the magnetization of the free region to be aligned either parallel to or antiparallel to the magnetization of the pinned region, and, when the magnetization of the free region is switched between parallel and antiparallel, the resistance state across the core is changed.
The free regions and pinned regions of conventional STT-MRAM cells exhibit magnetization orientations that are horizontal, also known as “in-plane,” with the width of the regions. Accordingly, the magnetization orientations are parallel (or antiparallel) to a plane defined by a primary surface of a substrate supporting the STT-MRAM cell. These wide, in-plane STT-MRAM cells have large footprints, making scaling of the cells below twenty-five nanometers a challenge.
Perpendicularly oriented STT-MRAM cells may require smaller cell widths than in-plane STT-MRAM cells, accommodating greater cell packing. Also, the associated perpendicular magnetizations (also known in the art as perpendicular magnetic anisotropy (“PMA”)) of perpendicularly oriented STT-MRAM cells may have greatly reduced required switching voltage compared to an in-plane STT-MRAM cell. Therefore, efforts have been made to form perpendicularly oriented (“out-of-plane”) STT-MRAM cells in which the pinned regions and the free regions exhibit vertical magnetization orientations. However, finding and implementing suitable materials and designs for the cell core to achieve the vertical magnetization orientations has been a challenge.
Memory cells, semiconductor device structures including such memory cells, systems including arrays of such memory cells, and methods of forming such memory cells are disclosed. The memory cells include cell cores that have a free region exhibiting strain effecting a vertical magnetization orientation. Thus, the vertical magnetization orientation of the strained free region of the memory cell is influenced by the applied stress. The applied stress may be a mechanical stress, a thermal stress, or both. The applied stress and the effected vertical magnetization orientation exhibited by the free region may be permanent or temporary.
As used herein, the term “substrate” means and includes a base material or construction upon which components, such as those within memory cells, are formed. The substrate may be a semiconductor substrate, a base semiconductor material on a supporting structure, a metal electrode, or a semiconductor substrate having one or more materials, structures, or regions formed thereon. The substrate may be a conventional silicon substrate or other bulk substrate including a semiconductive material. As used herein, the term “bulk substrate” means and includes not only silicon wafers, but also silicon-on-insulator (“SOI”) substrates, such as silicon-on-sapphire (“SOS”) substrates or silicon-on-glass (“SOG”) substrates, epitaxial layers of silicon on a base semiconductor foundation, or other semiconductor or optoelectronic materials, such as silicon-germanium (Si1−xGex, where x is, for example, a mole fraction between 0.2 and 0.8), germanium (Ge), gallium arsenide (GaAs), gallium nitride (GaN), or indium phosphide (InP), among others. Furthermore, when reference is made to a “substrate” in the following description, previous process stages may have been utilized to form materials, regions, or junctions in the base semiconductor structure or foundation.
As used herein, the term STT-MRAM cell means and includes a magnetic cell structure that may include an MTJ, as discussed above, if a non-magnetic region, disposed between the free region and the pinned region, is insulative. Alternatively, the magnetic cell structure of the STT-MRAM cell may include a spin valve, if the non-magnetic region, disposed between the free region and the pinned region, is conductive.
As used herein, the term “pinned region” means and includes a region of magnetic material within the STT-MRAM cell that has a fixed magnetization orientation during use and operation of the STT-MRAM cell. The fixed magnetization orientation of the pinned region may be influenced by an externally applied stress, which may be applied by a stressor structure, such that the pinned region may exhibit a strain. The magnetization orientation exhibited by the strained pinned region may be different, due to the application of the stress upon the pinned region, than it would be without application of the stress. Alternatively, the magnetization orientation exhibited by the pinned region may be uninfluenced by an applied stress, such that the magnetization exhibited by the strained pinned region would be the same regardless as a magnetization exhibited by a non-strained pinned region. The magnetization orientation of the pinned region of the present disclosure may exhibit a vertical magnetization orientation.
As used herein, the term “free region” means and includes a region of magnetic material within the STT-MRAM cell that has a switchable magnetization orientation during use and operation of the STT-MRAM cell. The magnetization orientation may be switched between a “parallel” direction, in which the magnetization orientation exhibited by the free region and the magnetization orientation exhibited by the pinned region are directed in the same direction, to an “antiparallel” direction, in which the magnetization orientation exhibited by the free region and the magnetization orientation exhibited by the pinned region are directed in opposite directions.
As used herein, the term “cell core” means and includes a memory cell structure comprising the free region and pinned region and through which, during operation of the memory cell, current flows to effect a parallel or antiparallel magnetic orientation within the free region.
As used herein, the term “vertical” means and includes a direction that is perpendicular to the width of the respective region. “Vertical” may also mean and include a direction that is perpendicular to a primary surface of a substrate supporting the STT-MRAM cell.
As used herein, the terms “first,” “second,” “third,” etc., may describe various elements, components, regions, materials, and/or sections, none of which are limited by these terms. These terms are used only to distinguish one element, component, region, material, or section from another element, component, region, material, or section. Thus, “a first element,” “a first component,” “a first region,” “a first material,” or “a first section” discussed below could be termed a second element, a second component, a second region, a second material, or second section without departing from the teachings herein.
As used herein, spatially relative terms, such as “beneath,” “below,” “lower,” “bottom,” “above,” “upper,” “top,” “front,” “rear,” “left,” “right,” and the like, may be used for ease of description to describe one element's or feature's relationship to another element(s) or feature(s) as illustrated in the figures. Unless otherwise specified, the spatially relative terms are intended to encompass different orientations of the materials in addition to the orientation depicted in the figures. For example, if materials in the figures are inverted, elements described as “below” or “beneath” or “under” or “on bottom of” other elements or features would then be oriented “above” or “on top of” the other elements or features. Thus, the term “below” can encompass both an orientation of above and below, depending on the context in which the term is used, which will be evident to one of ordinary skill in the art. The materials may be otherwise oriented (rotated 90 degrees, inverted, etc.) and the spatially relative descriptors used herein interpreted accordingly.
As used herein, reference to an element as being “on” or “over” another element means and includes the element being directly on top of, adjacent to, underneath, or in direct contact with the other element. It also includes the element being indirectly on top of, adjacent to, underneath, or near the other element, with other elements present therebetween. In contrast, when an element is referred to as being “directly on” another element, there are no intervening elements present.
As used herein, the terms “comprises,” “comprising,” “includes,” and/or “including” specify the presence of stated features, regions, integers, stages, operations, elements, materials, components, and/or groups, but do not preclude the presence or addition of one or more other features, regions, integers, stages, operations, elements, materials, components, and/or groups thereof.
As used herein, “and/or” includes any and all combinations of one or more of the associated listed items.
As used herein, the singular forms “a,” “an,” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise.
The illustrations presented herein are not meant to be actual views of any particular material, component, structure, device, or system, but are merely idealized representations that are employed to describe embodiments of the present disclosure.
Embodiments are described herein with reference to the illustrations. Variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, are to be expected. Thus, embodiments described herein are not to be construed as being limited to the particular shapes or regions as illustrated but include deviations in shapes that result, for example, from manufacturing. For example, a region illustrated or described as box-shaped may have rough and/or nonlinear features. Moreover, sharp angles that are illustrated may be rounded. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the precise shape of a region and do not limit the scope of the present claims.
The following description provides specific details, such as material types and processing conditions, in order to provide a thorough description of embodiments of the disclosed devices and methods. However, a person of ordinary skill in the art will understand that the embodiments of the devices and methods may be practiced without employing these specific details. Indeed, the embodiments of the devices and methods may be practiced in conjunction with conventional semiconductor fabrication techniques employed in the industry.
The fabrication processes described herein do not form a complete process flow for processing semiconductor device structures. The remainder of the process flow is known to those of ordinary skill in the art. Accordingly, only the methods and semiconductor device structures necessary to understand embodiments of the present devices and methods are described herein.
Unless the context indicates otherwise, the materials described herein may be formed by any conventional technique including, but not limited to, spin coating, blanket coating, chemical vapor deposition (“CVD”), plasma enhanced CVD, atomic layer deposition (“ALD”), plasma enhanced ALD, or physical vapor deposition (“PVD”). Alternatively, the materials may be grown in situ. Depending on the specific material to be formed, the technique for depositing or growing the material may be selected by a person of ordinary skill in the art.
Reference will now be made to the drawings, where like numerals refer to like components throughout. The drawings are not necessarily to scale.
A memory cell is disclosed. The memory cell includes a magnetic cell core having a free region exhibiting strain. The strain effects a vertical magnetization orientation.
In use and operation, when the STT-MRAM cell 100 is selected to be programmed, a programming current is applied to the STT-MRAM cell 100, and the current is spin-polarized by the pinned region and exerts a torque on the free region, which switches the magnetization of the free region to “write to” or “program” the STT-MRAM cell 100. In a read operation of the STT-MRAM cell 100, a current is used to detect the resistance state of the cell core 110. The stressor structure 120 may exert a stress upon at least a portion of the cell core 110. Due to the application of the stress, a free region within the cell core 110 may exhibit a strain effecting a vertically oriented magnetization exhibited by the free region within the cell core 110, which vertical orientation may decrease the critical switching current required to switch the magnetization of the free region, thus allowing a smaller programming current to write the STT-MRAM cell 100. The vertical magnetization orientation may further allow for use of a cell core 110 with a smaller lateral dimension, thus allowing for improved scalability and device density.
As previously discussed, a programming current is applied for the write operation of the STT-MRAM cell 100. To initiate the programming current, the read/write circuitry 170 may generate a write current to the bit line 140 and the source line 160. The polarity of the voltage between the bit line 140 and the source line 160 determines the switch in magnetization of the free region in the cell core 110. Once the free region is magnetized according to the spin polarity of the programming current, the programmed state is written to the STT-MRAM cell 100.
To read the STT-MRAM cell 100, the read/write circuitry 170 generates a read current to the bit line 140 and the source line 160 through the cell core 110 and the access transistor 130. The programmed state of the STT-MRAM cell 100 relates to the resistance across the cell core 110, which may be determined by the voltage difference between the bit line 140 and the source line 160. In some embodiments, the voltage difference may be compared to the bit line reference 180 and amplified by the sense amplifier 190.
The free region 112 and pinned region 114 may be formed from or comprise ferromagnetic materials, such as Co, Fe, Ni or its alloys, NiFe, CoFe, CoNiFe, or doped alloys CoX, CoFeX, CoNiFeX (X=B, Cu, Re, Ru, Rh, Hf, Pd, Pt, C), or other half-metallic ferromagnetic material such as NiMnSb and PtMnSb, for example. More particularly, for example, the free region 112 may be formed from or comprise one or more of a material exhibiting magnetostriction (e.g., without limitation, CoxFeyBz), a material exhibiting an L10 crystal structure, a material exhibiting a uniaxial magnetic anisotropy, and a Heusler alloy, which characteristics are not mutually exclusive. Alternatively or additionally, in some embodiments, the free region 112 may be formed from or comprise layered materials. For example, and without limitation, the free region 112 may be formed from or comprise repeating layers of cobalt and platinum, with a layer of platinum disposed between layers of cobalt and vice versa. As another example, without limitation, the free region 112 may comprise repeating layers of cobalt and nickel, with a layer of nickel disposed between layers of cobalt and vice versa.
The pinned region 114 is so named because it has a fixed magnetization with a fixed or pinned preferred orientation, which is represented by the unidirectional arrow illustrated in the pinned region 114 of
The cell core 110 may optionally also include other regions in addition to the free region 112, non-magnetic region 113, and pinned region 114. For example, as illustrated in
External to the cell core 110, at least one stressor structure 120 may be present. The stressor structure 120 exerts a stress, either directly or indirectly, upon the free region 112. The exerted stress may be due, at least in part, to the configuration and positioning of the stressor structure 120 relative to the free region 112. The stressor structure 120 may, directly or indirectly, exert a stress upon at least a portion of the cell core 110 to thereby effect a strain exhibited by the free region 112. The strained state of the free region 112 effects a vertical magnetization orientation in the free region 112. Accordingly, the stress exerted by the stressor structure 120 causes the strain exhibited by the free region 112, which effects the vertical magnetization orientation of the free region 112.
The stressor structure 120 may be formed of or comprise one or more stressor materials. Such stressor materials may include, for example and without limitation, SiO or Si3N4. In other embodiments, the stressor material may include, for example and without limitation, a spin-on glass material formulated to shrink substantially upon annealing. In still other embodiments, the stressor material may include, for example and without limitation, an amorphous material formulated to densify upon annealing.
The stressor structure 120 exerts a stress upon a neighboring material or structure, such as upon at least one region of the cell core 110 or an insulative material disposed between the stressor structure 120 and at least one region of the cell core 110. The stressor structure 120 may be configured and positioned to apply either a compressive stress or a tensile stress to a neighboring material. Additionally, the stressor structure 120 may be configured and positioned to exert an essentially lateral stress or an essentially vertical stress upon a neighboring material. As used herein, a “lateral stress” is a stress directed in a direction parallel with the width of the structure upon which the lateral stress is exerted. A lateral stress may be directed in a direction that is parallel with a plane defined by the primary surface of a substrate supporting the STT-MRAM cell in which the structure, upon which the lateral stress is exerted, is supported. Also, as used herein, a “vertical stress” is a stress directed in a direction parallel with the height of the structure upon which the vertical stress is exerted. A vertical stress may be directed in a direction that is perpendicular with the plane defined by the primary surface of the substrate supporting the STT-MRAM cell in which the structure, upon which the vertical stress is exerted, is supported.
In other embodiments, the stressor structure 120 may be configured and positioned to exert an angled stress upon the neighboring material. Therefore, the stressor structure 120 may exert a lateral compressive stress, a lateral tensile stress, a vertical compressive stress, a vertical tensile stress, an angled compressive stress, or an angled tensile stress upon at least one neighboring material, which neighboring material may be the free region 112 of the cell core 110 or another material disposed between the stressor structure 120 and the free region 112 of the cell core 110. It is contemplated that the material comprising the stressor structure 120 be selected so as to exert, following formation of the stressor structure 120, the desired amount of stress of the desired type (e.g., compressive or tensile), in the desired direction (e.g., lateral, vertical, or angled) on the neighboring material so as to exhibit the desired strain by the free region 112 and to effect a vertical magnetization orientation within the strained free region 112 of the cell core 110.
As illustrated in
The vertically adjacent stressor structure 120V may be disposed above or below the cell core 110, or may be disposed both above and below the cell core 110, as shown in
The word line 150 of each STT-MRAM cell 100 may be formed in and supported by the substrate 10. The bit line 140 and word line 150 may be disposed between the cell core 110 and a vertically adjacent stressor structure 120V, as shown in
In other embodiments (not shown), a vertically adjacent stressor structure 120V may be disposed, additionally or alternatively, between the bit line 140 and the cell core 110, such as between the bit line 140 and the non-magnetic region 111. Likewise, such embodiments may also or alternatively include a vertically adjacent stressor structure 120V disposed between the word line 150 and the cell core 110, such as between the word line 150 and the antiferromagnetic region 115.
The stressor structure 120 may be physically or electrically isolated, or both physically and electrically isolated, from the cell core 110. For example, an insulative material 20 may isolate the stressor structure 120 from the cell core 110. The insulative material 20 may be formed from or comprise known interlayer dielectric materials, such as, for example and without limitation, silicon dioxide.
The laterally adjacent segments of the stressor structure 120L may extend all or only a portion of a height defined by the cell core 110. For example, as shown in
The laterally adjacent segments of the at least one laterally adjacent stressor structure 120L may define a width that is less than or equal to a width defined by the wider of the bit line 140 and the word line 150. In such embodiments, therefore, the width of the wider of the bit line 140 and the word line 150 may define the width of the STT-MRAM cell 100.
With reference to
Also, as shown in
With reference to
With reference to
With reference to
With reference to
In other embodiments (not shown), the STT-MRAM cell 100 may include vertically adjacent stressor structures 120V (e.g.,
In some embodiments, the cell core 110 may be essentially cylindrically shaped. In such embodiments, a laterally adjacent stressor structure 120L may surround the cell core 110, and the cell core 110 may be centrally disposed within the laterally adjacent stressor structure 120L. For example,
In other embodiments, the cell core 110 may be essentially box shaped. In such embodiments, a laterally adjacent stressor structure 120L may surround the cell core 110, and the cell core 110 may be centrally disposed within the laterally adjacent stressor structure 120L. For example,
In other embodiments (not shown), a laterally adjacent stressor structure 120L is formed in discrete segments such that the laterally adjacent stressor structure 120L does not completely laterally surround the cell core 110. In such embodiments, segments of the laterally adjacent stressor structure 120L may be laterally adjacent to only one or some, but not all, sides of the cell core 110, such as, laterally adjacent to a pair of sides of the cell core 110, as for example, shown in
Further disclosed is a method of forming a memory cell. The method includes forming a cell core and applying a stress to the cell core to affect a magnetization orientation exhibited by a material within the cell core.
Forming the memory cell may include forming a cell core including a free region 112 and forming a stressor structure 120 isolated from the free region 112 by insulative material 20. The cell core with free region 112 may be formed using conventional methods, which are not described in detail herein. Likewise, insulative material 20 may be formed on sidewalls of the free region 112 using conventional methods. The laterally adjacent stressor structure 120L may be formed on sidewalls of either the free region 112, in embodiments in which no insulative material 20 isolates the laterally adjacent stressor structure 120L and the free region 112, or may be formed on the insulative material 20. The stressor structure 120 may be formed by conventional techniques, such as plasma-enhanced CVD, under parameters (e.g., flow rates, temperatures, pressures, concentrations, exposure times) appropriate to form a stressor structure 120 exerting stress upon at least one neighboring material, which such neighboring material may be the free region 112 or the insulative material 20, for example. The stress exerted by the stressor structure 120 may be due to thermal mismatch during temperature changes in the fabrication process, due to volume expansion and shrinkage (e.g., due to a differing coefficient of thermal expansion between the stressor material comprising the stressor structure 120 and a coefficient of thermal expansion of the neighboring material), or due to lattice mismatch stress due to material compositions and impurities within the material comprising the stressor structure 120, or any combination thereof. In other embodiments, such as those in which the stressor structure 120 includes a spin-on glass material formulated to shrink upon annealing, the stress exerted by the stressor structure 120 may be generated upon the shrinkage of the stressor material. In still other embodiments, such as those in which the stressor structure 120 includes an amorphous material formulated to densify upon annealing, the stress exerted by the stressor structure 120 may be generated due to the densification of the stressor material.
With reference to
As also illustrated in
Though
With reference to
Again, though
In some embodiments, the free region 112 of the cell core 110 may exhibit a vertically oriented magnetization orientation 200 even when not in a strained state, i.e., when not under an externally exerted stress (e.g., the lateral compressive stress 500, the vertical tensile stress 600, a lateral tensile stress, or a vertical compressive stress). In such embodiments, the stressor structure 120 (e.g., laterally adjacent stressor structure(s) 120L, vertically adjacent stressor structure(s) 120V′, 120V″) according to the present embodiment may be formulated and configured to maintain the vertical magnetization orientation exhibited by the strained free region 112.
In other embodiments, the free region 112 of the cell core 110 may be formed in a non-strained state, i.e., not under an externally exerted stress. The material forming such free region 112 may be formulated to exhibit a vertically oriented magnetization orientation 200 when, during use of the cell core 110, the local temperature of the cell increases. The increase in temperature during use may exert a stress on the free region 112 so as to effect a temporary vertically oriented magnetization orientation 200. The stress may be caused by thermally induced expansion of the free region 112, to thermally induced expansion of one or more neighboring materials, or to both. For example, during read or write of the cell, the local temperature may increase, exerting the stress upon the free region 112 such that it will be in a strained state and exhibit a vertically oriented magnetization orientation 200. Following use of the cell, the local temperature may decrease, relieving the stress, and transitioning the free region 112 back to the non-strained state. In the non-strained state, the free region 112 may no longer exhibit the vertically oriented magnetization orientation 200. Such embodiments may not include a stressor structure 120. Thus, the stress exerted on the free region 112 may be either permanent or temporary and may be one or more of a mechanical stress and a thermal stress.
Also disclosed is a semiconductor device structure including at least one STT-MRAM cell, e.g., an array of STT-MRAM cells. With reference to
Also disclosed is a system including a memory array, e.g., memory array 702. With reference to
The processor-based system 800 may include a power supply 804. For example, if the processor-based system 800 is a portable system, the power supply 804 may include one or more of a fuel cell, a power scavenging device, permanent batteries, replaceable batteries, and rechargeable batteries. The power supply 804 may also include an AC adapter; therefore, the processor-based system 800 may be plugged into a wall outlet, for example. The power supply 804 may also include a DC adapter such that the processor-based system 800 may be plugged into a vehicle cigarette lighter, for example.
Various other devices may be coupled to the processor 802 depending on the functions that the processor-based system 800 performs. For example, a user interface 806 may be coupled to the processor 802. The user interface 806 may include input devices such as buttons, switches, a keyboard, a light pen, a mouse, a digitizer and stylus, a touch screen, a voice recognition system, a microphone, or a combination thereof. A display 808 may also be coupled to the processor 802. The display 808 may include an LCD display, an SED display, a CRT display, a DLP display, a plasma display, an OLED display, an LED display, a three-dimensional projection, an audio display, or a combination thereof. Furthermore, an RF sub-system/baseband processor 810 may also be coupled to the processor 802. The RF sub-system/baseband processor 810 may include an antenna that is coupled to an RF receiver and to an RF transmitter (not shown). A communication port 812, or more than one communication port 812, may also be coupled to the processor 802. The communication port 812 may be adapted to be coupled to one or more peripheral devices 814, such as a modem, a printer, a computer, a scanner, a camera, or to a network, such as a local area network, remote area network, intranet, or the Internet, for example.
The processor 802 may control the processor-based system 800 by implementing software programs stored in the memory. The software programs may include an operating system, database software, drafting software, word processing software, media editing software, or media playing software, for example. The memory is operably coupled to the processor 802 to store and facilitate execution of various programs. For example, the processor 802 may be coupled to system memory 816, which may include one or more of spin torque transfer magnetic random access memory (STT-MRAM), magnetic random access memory (MRAM), dynamic random access memory (DRAM), static random access memory (SRAM), and other known memory types. The system memory 816 may include volatile memory, non-volatile memory, or a combination thereof. The system memory 816 is typically large so that it can store dynamically loaded applications and data. In some embodiments, the system memory 816 may include semiconductor device structures, such as the semiconductor device structures 700 of
The processor 802 may also be coupled to non-volatile memory 818, which is not to suggest that system memory 816 is necessarily volatile. The non-volatile memory 818 may include one or more of STT-MRAM, MRAM, read-only memory (ROM) such as an EPROM, resistive read-only memory (RROM), and flash memory to be used in conjunction with the system memory 816. The size of the ROM is typically selected to be just large enough to store any necessary operating system, application programs, and fixed data. Additionally, the non-volatile memory 818 may include a high capacity memory such as disk drive memory, such as a hybrid-drive including resistive memory or other types of non-volatile solid-state memory, for example. The non-volatile memory 818 may include STT-MRAM devices formed in accordance with embodiments of the present disclosure, such as semiconductor device structures 700 of
Accordingly, a memory cell is disclosed. The memory cell comprises a magnetic cell core comprising a free region exhibiting strain effecting a vertical magnetization orientation.
Also disclosed is a memory cell comprising a cell core. The cell core comprises a free region in a strained state exhibiting a vertical magnetization orientation. The cell core also comprises a pinned region and another region disposed between the free region and the pinned region.
Further disclosed is a method of forming a memory cell, the method comprising forming a cell core and applying a stress to the cell core to affect a magnetization orientation exhibited by a material within the cell core.
Still further disclosed is a semiconductor device structure comprising a spin torque transfer magnetic random access memory (STT-MRAM) array comprising a plurality of STT-MRAM cells. Each STT-MRAM cell of the plurality comprises a cell core comprising a strained free region exhibiting a vertical magnetization orientation. Each cell also comprises a stressor structure external to the cell core. The stressor structure stresses the strained free region.
Moreover, disclosed is a system comprising a memory array comprising a plurality of magnetic memory cells. Each magnetic memory cell of the plurality comprises at least one stressor structure applying a stress to a free region demonstrating a vertical magnetization orientation.
While the present disclosure is susceptible to various modifications and alternative forms in implementation thereof, specific embodiments have been shown by way of example in the drawings and have been described in detail herein. However, the present disclosure is not intended to be limited to the particular forms disclosed. Rather, the present disclosure encompasses all modifications, combinations, equivalents, variations, and alternatives falling within the scope of the present disclosure as defined by the following appended claims and their legal equivalents.
This application is a continuation of U.S. patent application Ser. No. 13/427,339, filed Mar. 22, 2012, now U.S Pat. No. 9,007,818, issued Apr. 14, 2015, the disclosure of which is hereby incorporated in its entirety herein by this reference.
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Number | Date | Country | |
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20150214472 A1 | Jul 2015 | US |
Number | Date | Country | |
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Parent | 13427339 | Mar 2012 | US |
Child | 14685236 | US |