Patent Application
20190157051
The present disclosure relates to a method of forming semiconductor devices on a semiconductor wafer. More specifically, the disclosure relates to cleaning an etch chamber in the formation of memory.
In forming semiconductor devices, etch layers may be etched to form memory holes or lines. Some semiconductor devices may be formed by etching a stack of bilayers of silicon oxide and silicon nitride (ONON) or silicon oxide and polysilicon (OPOP). Such stacks may be used in memory applications, such as in forming dynamic random access memory (DRAM) and three dimensional “negative and” gates (3D NAND). In the formation of such memory structures, plasma processing chambers may be used to etch such memory structures. Residues are deposited within the plasma processing chambers. The residues may need to be removed from time to time between the processing of each substrate.
To achieve the foregoing and in accordance with the purpose of the present disclosure, a method for removing nitrogen containing residues in a plasma processing chamber is provided. A cleaning gas comprising at least one of CO or CO2 or both is flowed into the plasma processing chamber. A plasma is generated from the cleaning gas, wherein the plasma removes the nitrogen containing residues. The flow of the cleaning gas is then stopped.
These and other features of the present disclosure will be described in more details below in the detailed description and in conjunction with the following figures.
The present disclosure is illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings and in which like reference numerals refer to similar elements and in which:
The present disclosure will now be described in detail with reference to a few preferred embodiments thereof as illustrated in the accompanying drawings. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present disclosure. It will be apparent, however, to one skilled in the art, that the present disclosure may be practiced without some or all of these specific details. In other instances, well known process steps and/or structures have not been described in detail in order to not unnecessarily obscure the present disclosure.
In an exemplary embodiment, a stack is placed in an etch chamber (step 104).
Information transferred via communications interface 314 may be in the form of signals such as electronic, electromagnetic, optical, or other signals capable of being received by communications interface 314, via a communication link that carries signals and may be implemented using wire or cable, fiber optics, a phone line, a cellular phone link, a radio frequency link, and/or other communication channels. With such a communications interface, it is contemplated that the one or more processors 302 might receive information from a network, or might output information to the network in the course of performing the above-described method steps. Furthermore, method embodiments may execute solely upon the processors or may execute over a network such as the Internet, in conjunction with remote processors that share a portion of the processing.
The term “non-transient computer readable medium” is used generally to refer to media such as main memory, secondary memory, removable storage, and storage devices, such as hard disks, flash memory, disk drive memory, CD-ROM and other forms of persistent memory and shall not be construed to cover transitory subject matter, such as carrier waves or signals. Examples of computer code include machine code, such as produced by a compiler, and files containing higher level code that are executed by a computer using an interpreter. Computer readable media may also be computer code transmitted by a computer data signal embodied in a carrier wave and representing a sequence of instructions that are executable by a processor.
After the stack 203 has been placed into the plasma processing chamber 200, the stack 203 is etched (step 108). In this embodiment, the stack 203 is made of silicon oxide and polysilicon bilayers (OPOP), which is etched to form channel holes for three dimensional memory devices. In this embodiment, the etching of the stack 203 uses a nitrogen containing process gas, which causes nitrogen containing residues, such as ammonium salts, to be deposited on sides and other inner surfaces of the plasma processing chamber 200. Such ammonium salts, such as ammonium fluoride, are difficult to remove. After the etching operation is completed, the stack 203 is removed from the plasma processing chamber 200 (step 112).
If the nitrogen containing residues are not cleaned from the inner surfaces of the plasma processing chamber 200, the nitrogen containing residues may contaminate the next stack to be etched. Therefore, before the next stack is placed in the plasma processing chamber 200 for etching, the plasma processing chamber 200 is cleaned. In this embodiment, the cleaning of the plasma processing chamber 200 includes placing a cleaning wafer in the plasma processing chamber 200 (step 116). The cleaning wafer is a blank silicon wafer, which is mounted on the ESC 208. The plasma processing chamber 200 is cleaned using a protected clean (step 120).
The substrate support is exposed (step 124). In this embodiment, the cleaning wafer is raised above the substrate support.
In this embodiment, the ESC 208 is cooled and maintained at a temperature of less than −20° C. The removal of nitrogen containing residues would be more difficult for conventional cleaning processes at such temperatures. It has been unexpectedly found that the addition of CO2 in the cleaning gas improves the cleaning of nitrogen containing residues, where even at temperatures below −20° C., nitrogen containing residues are removed. In some embodiments, the ESC 208 is cooled to a temperature below −60° C. Other embodiments may provide the cleaning at other temperatures, since it is believed that the addition of CO2 to the cleaning gas improves the cleaning of nitrogen containing residues at other temperatures.
In addition, it has been unexpectedly found that the addition of CO2 to the cleaning gas decreases the amount of time needed for cleaning. It has been found that a cleaning process without CO2 would take about eight (8) minutes compared to the same cleaning process with CO2, which was found to take about one (1) minute. This time saving is significant which, in turn, improves productivity and throughput. For example, in the etching of memory devices, a cleaning is provided after a wafer is processed, the reduction of cleaning time significantly increases throughput speed, especially when large number of wafers are processed. It has also been found that a cleaning gas of the combination of CO2, O2, and a fluorine containing component provides improved cleaning over a cleaning gas with only two of the three components. In addition, various embodiments provide improved cleaning by removing more residues. Such improved cleaning reduces defects caused by remaining residue. In addition, the prior art would require frequent wet clean processes to remove residue that was not removed by the prior art dry clean process. The dry clean process of the embodiments described herein removes a relatively larger amount of residue, which would result in less frequent wet cleaning or even the elimination of wet cleaning.
In some embodiments, the cleaning gas may comprise CO in place of or in addition to CO2. Generally, the cleaning gas comprises at least one of CO and/or CO2. More preferably, the cleaning gas comprises at least one of CO and/or CO2 and a fluorine containing component. More preferably, the cleaning gas comprises at least one of CO and/or CO2, O2, and a fluorine containing component. In some embodiments, the fluorine containing component is at least one of NF3, CF4, C2F6, or SF6.
In the above embodiment, the plasma provided during the protected clean has an ion energy that is greater than the ion energy of the plasma during the exposed clean. This may be accomplished by providing a higher bias during the protected clean compared to the bias during the exposed clean. The exposed clean provides a lower ion energy in order to protect the exposed ESC surface from damage. In various embodiments, the cleaning gas provided during the protected clean has a higher concentration of fluorine containing component than the cleaning gas provided during the exposed clean.
In other embodiments, the two step clean process with a protected clean step and an exposed clean step may be replaced with a single clean process. For example, an embodiment may provide only a protected clean. In another embodiment, a cleaning wafer is not used, so that the exposed clean is a waferless cleaning process.
In other embodiments, other stacks may be etched. Generally, such stacks may be one or more layers of a silicon containing material. For example, in another embodiment ONON is etched. In some embodiments, the stacks are used in the manufacturing of 3D memory.
While this disclosure has been described in terms of several preferred embodiments, there are alterations, modifications, permutations, and various substitute equivalents, which fall within the scope of this disclosure. It should also be noted that there are many alternative ways of implementing the methods and apparatuses of the present disclosure. It is therefore intended that the following appended claims be interpreted as including all such alterations, modifications, permutations, and various substitute equivalents as fall within the true spirit and scope of the present disclosure.
