The subject matter herein generally relates to printed circuit boards, and more particularly, to a circuit board and a method for manufacturing the circuit board.
Electronic devices, such as mobile phones, tablet computers, or personal digital assistants, may have more than one circuit board. Electronic components of the circuit board, such as resistors, may be embedded in the circuit board to increase the space utilization of the electronic device. To embed a nickel resistor in the circuit board, a nickel layer and a copper substrate are sequentially formed on a hard substrate, Then, a copper foil of the copper substrate and the nickel layer are etched by an etchant, thereby obtaining a conductive wiring layer and a nickel resistor, respectively.
However, since the etching solution first etches the copper foil and then the nickel layer, the nickel resistor may not have an even line width, causing a short circuit in the same nickel resistor line of the circuit board. Improvement in the art is desired.
Implementations of the present technology will now be described, by way of embodiment, with reference to the attached figures.
It will be appreciated that for simplicity and clarity of illustration, where appropriate, reference numerals have been repeated among the different figures to indicate corresponding or analogous elements. In addition, numerous specific details are set forth in order to provide a thorough understanding of the embodiments described herein. However, it will be understood by those of ordinary skill in the art that the embodiments described herein may be practiced without these specific details. In other instances, methods, procedures, and components have not been described in detail so as not to obscure the related relevant feature being described. Also, the description is not to be considered as limiting the scope of the embodiments described herein. The drawings are not necessarily to scale and the proportions of certain parts may be exaggerated to better illustrate details and features of the present disclosure.
The term “comprising,” when utilized, means “including, but not necessarily limited to”; it specifically indicates open-ended inclusion or membership in the so-described combination, group, series, and the like.
Referring to
In block 11, referring to
In an embodiment, the first copper substrate 10 includes a base layer 101. The base layer 101 has two opposite surfaces. A first adhesive layer 102 and a copper foil 103 are disposed on each of the two surfaces of the base layer 101. The first adhesive layer 102 is sandwiched between the base layer 101 and the copper foil 103.
The base layer 101 may be a rigid substrate. The first adhesive layer 102 may be made of a material selected from a group consisting of epoxy resin, polypropylene (PP), BT resin, polyphenylene oxide (PPO), polypropylene (PP), polyimide (PI), polyethylene terephthalate (PET), and polyethylene naphthalate (PEN). In an embodiment, the first adhesive layer 102 is made of epoxy resin.
Each copper foil 103 includes a second copper layer 1031 (shown in
In block 12, referring to
The nickel resistance layer 20 may be formed by an additive method. The nickel resistance layer 20 can also be formed by chemically depositing a nickel layer on the copper foil 103 and then etching the nickel layer.
In block 13, referring to
The first dielectric layer 30 is made of a soft material. After pressing the first dielectric layer 30, the nickel resistance layer 20 is embedded in the first dielectric layer 30. In an embodiment, the first dielectric layer 30 includes a first surface 301 facing the base layer 101 and a second surface 302 opposite to the first surface 301. The first surface 301 is recessed to form a plurality of grooves. The nickel resistance layer 20 is disposed in the grooves.
The first dielectric layer 30, the first insulating layer 31, and the second dielectric layer 32 may be made of a material selected from a group consisting of epoxy resin, polypropylene, BT resin, polyphenylene oxide, polypropylene, polyimide, polyethylene terephthalate, polyethylene naphthalate, and thermoplastic polyimide (TPI). In an embodiment, the first dielectric layer 30 and the second dielectric layer 32 are both made of thermoplastic polyimide. The first insulating layer 31 is made of polyimide.
In block 14, referring to
Each intermediate body 40 includes the second copper layer 1031, the first dielectric layer 30, the first insulating layer 31, the second dielectric layer 32, and the first copper layer 33. The nickel resistance layer 20 is embedded in the first dielectric layer 30.
In an embodiment, adhesiveness between the first adhesive layer 102 and the third copper layer 1032 is greater than adhesiveness between the second copper layer 1031 and the third copper layer 1032. Thus, the second copper layer 1031 may be pulled away from the third copper layer leaving the third copper layer 1032 still bonded to the first adhesive layer 102.
In block 15, referring to
In block 16, referring to
In an embodiment, the seed layer 42 may be formed by a shadow process. The conductive layer 42 may also be formed by chemical plating of gold or nickel on the sidewall of the blind hole 41. The seed layer 42 facilitates the subsequent copper electroplating process on the sidewall of the blind hole 41.
In block 17, referring to
In block S18, referring to
In block 19, referring to
In an embodiment, the second copper layer 1031 includes a region 10311 surrounding the blind hole 41. The region 10311 is exposed from the patterned openings 501. The electroplated copper is also formed on the region 10311, creating an annular ring 55 connecting the conductive via 54.
Since the second dry film 51 covers the first copper layer 33, no copper is electroplated onto the first copper layer 33.
In block 20, referring to
In block 21, referring to
In block 22, referring to
In block 23, referring to
The second conductive wiring layer 71 is electrically connected to the first conductive wiring layer 70 through the conductive via 54, so that the second conductive wiring layer 71 is also electrically connected to the nickel resistance layer 20.
In block 24, referring to
In an embodiment, a second adhesive layer 82 is disposed between the first protective layer 80 and the first conductive wiring layer 70. A third adhesive layer 70 is disposed between the second protective layer 81 and the second conductive wiring layer 70. Both the first protective layer 80 and the second protective layer 81 may be solder mask layers or cover layers (CVL).
The first protection layer 80 includes an opening 801 exposing a portion of the first conductive wiring layer 70. The exposed portion of the first conductive wiring layer 70 forms a pad 701. The pad 701 is for mounting an electronic component (not shown).
In an embodiment, the first dielectric layer 30 includes a first surface 301 away from the first insulating layer 31 and a second surface 302 facing the first insulating layer 31. The first surface 301 is recessed to form a plurality of grooves. The nickel resistance layer 20 is disposed in the grooves.
A blind hole 41 penetrating the first conductive wiring layer 70, the first dielectric layer 30, the first insulating layer 31, the second dielectric layer 32, and a portion of the second conductive wiring layer 71 is defined in the circuit board 100. The second conductive wiring layer 71 is at the bottom of the blind hole 41. A conductive via 54 is disposed in the blind hole 41, which electrically connects the first conductive wiring layer 70 to the second conductive wiring layer 71. In an embodiment, the first conductive wiring layer 70 includes a region 10311 surrounding the conductive via 54. An annular ring 55 connecting the conductive via 54 is disposed on the region 10311.
In an embodiment, a second adhesive layer 82 is disposed between the first protective layer 80 and the first conductive wiring layer 70. A third adhesive layer 70 is disposed between the second protective layer 81 and the second conductive wiring layer 70.
Since the nickel resistance layer 20 is formed before the first copper layer 33 is etched, the nickel resistance layer 20 is not subjected to an etching process. Thus, the process of etching the copper foil first and then the nickel layer avoid the uneven line width of the nickel resistance layer 20 and short circuit in the nickel resistance layer 20. Further, the nickel resistance layer 20 is embedded in the first dielectric layer 30, which reduce the possibility of short circuit in the nickel resistance layer 20.
Even though information and advantages of the present embodiments have been set forth in the foregoing description, together with details of the structures and functions of the present embodiments, the disclosure is illustrative only. Changes may be made in detail, especially in matters of shape, size, and arrangement of parts within the principles of the present embodiments to the full extent indicated by the plain meaning of the terms in which the appended claims are expressed.
Number | Date | Country | Kind |
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202010888907.1 | Aug 2020 | CN | national |
Number | Name | Date | Kind |
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5243320 | Clouser | Sep 1993 | A |
6631551 | Bowles | Oct 2003 | B1 |
6910264 | Tung | Jun 2005 | B2 |
7441329 | Cheng | Oct 2008 | B2 |
Number | Date | Country | |
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20220071020 A1 | Mar 2022 | US |