The subject matter herein generally relates to flexible circuit boards, and particularly relates to an embedded flexible circuit board and its manufacture.
Electronic elements (such as resistance, capacitance, and so on) of a flexible printed circuit board are embedded into the flexible printed circuit board, so that a thickness of the flexible printed circuit board is reduced, as well as reducing a thickness of a electronic product having the flexible printed circuit board. In traditional manufacturing process, a multilayer circuit board with an open hole defined thereon is formed by a build-up method on a circuit substrate, and the electronic elements are received in the open-hole. The open hole is defined after forming the multilayer circuit board or during forming the multilayer circuit board. However, it is difficult to manufacture the open-hole, and there is a problem that the open hole fitting may be inaccurate, resulting in lower yield of the flexible printed circuit board and increased production costs.
Therefore, there is room for improvement within the art.
Implementations of the present technology will now be described, by way of only, with reference to the attached figures.
It will be appreciated that for simplicity and clarity of illustration, where appropriate, reference numerals have been repeated among the different figures to indicate corresponding or analogous elements. In addition, numerous specific details are set forth in order to provide a thorough understanding of the embodiments described herein. However, it will be understood by those of ordinary skill in the art that the embodiments described herein can be practiced without these specific details. In other instances, methods, procedures, and components have not been described in detail so as not to obscure the related relevant feature being described. Also, the description is not to be considered as limiting the scope of the embodiments described herein. The drawings are not necessarily to scale and the proportions of certain parts may be exaggerated to better illustrate details and features of the present disclosure.
The term “comprising,” when utilized, means “including, but not necessarily limited to”; it specifically indicates open-ended inclusion or membership in the so-described combination, group, series and the like.
Referring to
At block 201, providing a first circuit substrate 10 including at least one welding pad 120.
As illustrated in
Surface treatment may be carried on the welding pad 120, so that surface oxidation of the welding pad 120 would be avoided to retain electrical characteristics. Methods of surface treatment may be forming a protective layer (not shown in the figures) on the welding pad 120 through chemical gilding, electrolytic gilding, chemical tinning, or electrolytic tinning, or forming an organic solder-ability protection layer (OSP) on the welding pad 120. A number of the welding pad 120 may be changed actual needs.
In this embodiment, the first circuit substrate 10 is a double-sided panel. The first circuit substrate 10 further includes a conducting layer 13. The conducting layer 13 is formed onto the first basic layer 11 and is opposite from the first pattern layer 12. The conducting layer 13 is a copper foil layer or a pattern layer. In other embodiments, the first circuit substrate 10 may be a single-sided panel or a multilayer panel.
In this embodiment, the first circuit substrate 10 is made of, but not limited to, polyimide (PI), liquid crystal polymer (LCP), polyethylene terephthalate (PET), or Polyethylene Naphthalate (PEN).
At block 202, as illustrated in
In this embodiment, the base 21 is a copper foil layer. A thickness of the thin-film resistor 23 is thinner than 1 μm.
In this embodiment, the conducting resin 25 is an anisotropic conductive adhesive.
At block 203, as shown in
The base 21 is used to increase a strength of the thin-film resistor 23 when the thin-film resistor 23 is attached onto the welding pad 120, to prevent the thin-film resistor 23 from being bent and deformed during the bonding.
At block 204, removing the base 21, as shown in
In this embodiment, the base 21 is removed by way of etching.
At block 205, as shown in
In this embodiment, the second circuit substrate 40 is a single-sided panel. The second circuit substrate 40 includes a second basic layer 41 and a second pattern layer 42 formed onto the second basic layer 41. The second basic layer 41 is fitted onto the first circuit substrate 10 through the adhesive layer 50. The second pattern layer 42 is electronically connected with the first circuit substrate 10 through at least one conducting structure 45. In other embodiments, the second circuit substrate 40 may be double-sided panel or a multilayer panel.
Specifically, referring to
In other embodiments, after removing the base 21, a completed second circuit substrate 40 may be fitted onto the first circuit substrate 10 through the adhesive layer 50, and the conducting structure 45 is further formed to electrically connect the second circuit substrate 40 and the first circuit substrate 10.
In this embodiment, the adhesive layer 50 is made of a viscous resin. The viscous resin may be at least one of Polypropylene, epoxy, polyurethane, phenolic, urea-formaldehyde, melamine-formaldehyde and polyimide.
The upper manufacturing steps in blocks 202-205 may be repeated to add layers.
In
The first circuit substrate 10 includes a first basic layer 11 and a first pattern layer 12. The first basic layer 11 is insulated. The first pattern layer 12 is formed onto the first basic layer 11. The first pattern layer 12 includes the welding pad 120.
The second circuit substrate 40 includes a second basic layer 41 and a second pattern layer 42. The second basic layer 41 is insulated. The second pattern layer 42 is formed onto the second basic layer 41. The adhesive layer 50 bonds the first pattern layer 12 and the second basic layer 41.
A thickness of the thin-film resistor 23 is thinner than 1 μm.
In this embodiment, the conducting resin 25 is an anisotropic conductive adhesive. The embedded flexible circuit board 100 further includes at least one conducting structure 45. The conducting structure 45 electronically connects the first pattern layer 12 and the second pattern layer 42.
In the embodiment, the embedded flexible circuit board 100 further includes a conducting layer 13. The conducting layer 13 is formed onto the first basic layer 11 and is opposite from the first pattern layer 12. The conducting layer 13 is electronically connected with the first pattern layer 12.
The method of manufacturing a embedded flexible circuit board 100 has simple manufacturing process, and does not need to form a resistance layer by an etching process, thereby avoiding large resistance value deviation caused by the etching process, so that the accuracy of manufacturing the embedded flexible circuit board 100 is improved, and the problem of excessive thickness of the circuit board caused by embedding elements is avoided.
The embodiments shown and described above are only examples. Many details are often found in the art such as the other features of manufacturing an embedded flexible circuit board. Therefore, many such details are neither shown nor described. Even though numerous characteristics and advantages of the present technology have been set forth in the foregoing description, together with details of the structure and function of the present disclosure, the disclosure is illustrative only, and changes may be made in the details, including in matters of shape, size, and arrangement of the parts within the principles of the present disclosure, up to and including the full extent established by the broad general meaning of the terms used in the claims. It will therefore be appreciated that the embodiments described above may be modified within the scope of the claims.
Number | Date | Country | Kind |
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201810041301.7 | Jan 2018 | CN | national |
This is a divisional application of patent application Ser. No. 16/051,089, filed on Jul. 31, 2018, entitled “EMBEDDED FLEXIBLE CIRCUIT BOARD AND METHOD FOR MANUFACTURING THE SAME”, assigned to the same assignee, which is based on and claims priority to Chinese Patent Application No. 201810041301.7 filed on Jan. 16, 2018, the contents of which are incorporated by reference herein.
Number | Date | Country | |
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Parent | 16051089 | Jul 2018 | US |
Child | 16426164 | US |