The invention relates to a method for producing a semiconductor structure comprising a superficial layer, at least one embedded layer, and a support, which method comprises:
a step of forming, on a first support, patterns in a first material,a step of forming a semiconductor layer, between and on said patterns,a step of assembling said semiconductor layer with a second support.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 shows a mixed BSOI-type structure,
FIGS. 2A to 2G show various steps of a production method according to the invention,
FIG. 3 shows a structure according to the invention from a top view,
FIG. 4 shows an alternative of a device according to the invention,
FIG. 5 shows the case of epitaxial growth on different surfaces.
Claims
1. Method for producing a semiconductor structure comprising a superficial layer, at least one buried layer, and a substrate, which method comprises:
a step of forming, on a first substrate, patterns in a first material,a step of forming a layer made of a second, semiconductor material between and on said patterns,a step of heat-treating the layer made of a second material, so as to totally or partially modify the crystallinity thereof,a step of assembling the layer made of a second material with a second substrate.
2. Method according to claim 1, said layer made of a second material being made of monocrystalline and/or polycrystalline and/or amorphous silicon.
3. Method according to claim 1, said layer made of the second material comprising zones of a first type of crystallinity and zones of a second type of crystallinity, different from the first.
4. Method according to claim 1, said patterns being produced from a first layer made of a dielectric material.
5. Method according to claim 4, said dielectric material being an oxide or a nitride.
6. Method according to claim 5, said dielectric material being an oxide, produced by thermal oxidation, or by oxide deposition using the LPCVD technique, or by oxide deposition using the PECVD technique.
7. Method according to claim 1, said patterns being produced from a first layer made up of different materials and/or multilayers.
8. Method according to claim 1, said layer made of a second material being formed by epitaxy or deposition.
9. Method according to claim 8, said layer made of a second material being formed by epitaxy, at a speed dependent on the surface on which the epitaxy is performed.
10. Method according to claim 1, comprising a step of planarisation of the layer made of a second material before assembly with the second substrate (30).
11. Method according to claim 1, a hydrophilic or hydrophobic step of preparation of the surface of the layer made of a second material being performed before assembly with the second support.
12. Method according to claim 1, an annealing step being performed after assembly of the layer made of a second material with the second substrate.
13. Method according to claim 1, further comprising a step of thinning at least one of the two substrates.
14. Method according to claim 1, said patterns being produced by etching.
15. Method for producing a semiconductor structure comprising a superficial layer, at least one buried layer, and a substrate, which method comprises:
a step of forming, on a first substrate, patterns in a first material,a step of forming a layer, made of a second material, made of amorphous silicon or monocrystalline silicon, between and on said patterns,a step of assembling this layer of a second material with a second substrate.
16. Method according to claim 15, also comprising a step of heat treating the amorphous silicon or monocrystalline silicon layer, so as to modify the crystallinity thereof.
17. Method according to claim 15, said amorphous silicon or monocrystalline silicon layer comprising zones of a first type of crystallinity and zones of a second type of crystallinity, different from the first.
18. Method according to claim 15, said patterns being produced from a first layer made of a dielectric material.
19. Method according to claim 18, said dielectric material being an oxide or a nitride.
20. Method according to claim 19, said dielectric material being an oxide, produced by thermal oxidation, or by oxide deposition using the LPCVD technique, or by oxide deposition using the PECVD technique.
21. Method according to claim 15, said patterns being produced from a first layer made up of different materials and/or multilayers.
22. Method according to claim 15, said layer made of a second material being formed by epitaxy or deposition.
23. Method according to claim 15, said layer made of a second material being formed by epitaxy, at a speed dependent on the surface on which the epitaxy is performed.
24. Method according to claim 15, comprising a step of planarisation of the layer made of a second material before assembly with the second substrate (30).
25. Method according to claim 15, a hydrophilic or hydrophobic step of preparation of the surface of the layer made of a second material being performed before assembly with the second substrate.
26. Method according to claim 15, an annealing step being performed after assembly of the layer made of a second material with the second substrate.
27. Method according to claim 15, further comprising a step of thinning at least one of the two substrates.
28. Method according to claim 15, said patterns being produced by etching.
29. Method for producing a semiconductor structure comprising a superficial layer, at least one buried layer, and a substrate, which method comprises:
a step of forming, on a first substrate, patterns in a first material,a step of forming a layer made of a second, semiconductor material, between and on said patterns, which semiconductor layer comprises zones of a first type of crystallinity and zones of a second type of crystallinity, different from the first,a step of assembling this layer made of a second material with a second substrate.
30. Method according to claim 29, said layer made of a second material being made of monocrystalline and/or polycrystalline and/or amorphous silicon.
31. Method according to claim 29, said patterns being produced from a first layer made of a dielectric material.
32. Method according to claim 31, said dielectric material being an oxide or a nitride.
33. Method according to claim 32, said dielectric material being an oxide, produced by thermal oxidation, or by oxide deposition using the LPCVD technique, or by oxide deposition using the PECVD technique.
34. Method according to claim 29, said patterns being produced from a first layer made up of different materials and/or multilayers.
35. Method according to claim 29, said layer made of a second material being formed by epitaxy or deposition.
36. Method according to claim 35, said layer made of a second material being formed by epitaxy, at a speed dependent on the surface on which the epitaxy is performed.
37. Method according to claim 29, comprising a step of planarisation of the layer made of a second material before assembly with the second substrate (30).
38. Method according to claim 29, a hydrophilic or hydrophobic step of preparation of the surface of the layer made of a second material being performed before assembly with the second substrate.
39. Method according to claim 29, an annealing step being performed after assembly of the layer made of a second material with the second substrate.
40. Method according to claim 29, further comprising a step of thinning at least one of the two substrates.
41. Method according to claim 29, said patterns being produced by etching.
42. Semiconductor device comprising a superficial layer, at least one buried or embedded layer, and a substrate, said buried or embedded layer comprising a first sublayer made of amorphous or monocrystalline silicon, and a second sublayer comprises an alternation of patterns of a first material and zones of amorphous or monocrystalline silicon.
43. Semiconductor device comprising a superficial layer, at least one buried or embedded layer, and a substrate, said the buried or embedded layer comprises a first sublayer comprising an alternation of patterns made of a first material and zones made of a second, semiconductor material, and a second sublayer comprising zones of a first type of crystallinity and zones of a second type of crystallinity.
44. Device according to claim 43, said second sublayer being made of monocrystalline and/or polycrystalline and/or amorphous silicon.
45. Device according to claim 43, said first material being a dielectric material.
Patent Application
20070200144
