Claims
- 1. A method of forming a metallization feature on an edge of an integrated circuit chip and extending onto both major surfaces of the integrated circuit chip, said method comprising the steps of
- enclosing said integrated circuit chip in a mask which exposes an area on an edge of said integrated circuit chip and areas on major surfaces of the integrated circuit chip contiguous to said area on said edge of said integrated circuit chip, and
- applying metal to said area of said edge of said integrated circuit chip and said areas on said major surfaces of said integrated circuit chip exposed by said mask.
- 2. A method as recited in claim 1, wherein said depositing step is carried out by a dry deposition process.
- 3. A method as recited in claim 2, wherein said dry deposition process is sputtering.
- 4. A method as recited in claim 2, wherein said dry deposition process is evaporation.
- 5. A method as recited in claim 1, wherein said depositing step is carried out by electroless deposition from a fluid solution.
- 6. A method as recited in claim 1, wherein said mask includes openings therein formed by grooves.
- 7. A method as recited in claim 6, wherein said grooves are formed by electric discharge machining.
- 8. A method as recited in claim 6, wherein said grooves are formed by etching.
- 9. A method as recited in claim 1, wherein said integrated circuit chip is included in a stack of integrated circuit chips.
- 10. A method as recited in claim 1, wherein said integrated circuit chip is included in a stack of integrated circuit strips of chips.
Parent Case Info
This application is a divisional application of U.S. Ser. No. 09/225,316 filed Jan. 5, 1999, U.S. Pat. No. 6,059,939 issued May 9, 2000 which is a divisional application of U.S. Ser. No. 08/785,195 filed Jan. 17, 1997 U.S. Pat. No. 5,903,437 issued May 11, 1999.
US Referenced Citations (35)
Foreign Referenced Citations (1)
Number |
Date |
Country |
3 282 547 |
Dec 1991 |
JPX |
Non-Patent Literature Citations (1)
Entry |
"Edge-Mounted Chip Assembly For Microprocessor"; IBM Technical Disclosure Bulletin, vol. 23, No. 2, Jul. 1980; H.I. Stoller; pp. 581 and 582. |
Divisions (2)
|
Number |
Date |
Country |
Parent |
225316 |
Jan 1999 |
|
Parent |
785195 |
Jan 1997 |
|