Patent Grant
7271082
1. Field of the Invention
The present invention relates to an apparatus for forming a semiconductor device on or within a surface of a substrate. In particular, the present invention relates to an apparatus which is capable of processing a substrate sequentially without exposing to the outside air. Also, the present invention relates to a multi-purpose substrate processing apparatus which can be used to manufacture a thin film integrated circuit.
2. Prior Art
Integrated circuits which use semiconductor substrates or glass substrates are known. The former is known as IC or LSI and the latter is known, for example, as a liquid crystal device of an active matrix type. It is necessary to carry out each process successively in order to manufacture the integrated circuits. For example, when manufacturing an insulated gate field effect semiconductor device, it is desired that a channel forming semiconductor region and a gate insulating layer contacting thereto be formed sequentially without exposing to the air.
Also, there was a manufacturing system for producing a semiconductor device which utilizes an amorphous silicon or a single crystalline silicon, however, there was no manufacturing system which is suitable for manufacturing a semiconductor device which utilizes a polycrystalline silicon.
It is an object of the present invention to provide a substrate processing apparatus which can be used multi-purposely, more specifically, which is capable of performing each step of manufacturing a semiconductor device successively in one apparatus.
It is another object of the present invention to provide a method and a manufacturing apparatus for manufacturing a polycrystalline semiconductor device successively, for example, for forming a silicon film and performing a crystallization thereof in different chambers successively.
In accordance with a first accept of the present invention, a substrate processing apparatus includes a plurality of evacuable treatment chambers (i.e. chambers capable of being evacuated) connected to one another via an evacuable common chamber, and the common chamber is provided with means for transporting a substrate between each treatment chamber.
More specifically, a substrate processing apparatus includes a plurality of evacuable treatment chambers, at least one of said treatment chambers having a film formation function through a vapor phase reaction therein, at least one of said treatment chambers having an annealing function with light irradiation and at least one of said treatment chambers having a heating function therein. The apparatus also has a common chamber through which said plurality of evacuable treatment chambers are connected to one another, and a transportation means provided in said common chamber for transporting a substrate between each treatment chamber.
Also, a method for operating the substrate processing apparatus in accordance with the first aspect of the present invention is characterized by the steps of transferring a substrate between a treatment chamber and a common chamber while the pressure in both chambers is maintained equal with each other.
In accordance with a second aspect of the present invention, a method for manufacturing a semiconductor device which utilizes a polycrystalline silicon comprises the steps of forming a non-single crystalline silicon film in a first chamber through LPCVD using polysilane such as disilane and performing another step, for example, a formation of an insulating film adjacent to the silicon film or a crystallization thereof, in a second chamber successively without exposing a substrate to the outside air. The inventors found that when a silicon film is formed through a glow discharge plasma CVD, the quality of the silicon film tends to be hindered because hydrogen effuses from the silicon film when it is crystallized. Accordingly, even if a multi-chamber system was used, the quality of the polycrystalline silicon semiconductor device could not be so improved. Based on the recognition of this problem, the silicon film is formed through LPCVD using a polysilane. Moreover, quality of an interface between the silicon film and its adjacent insulating film can be improved by forming the silicon film and the insulating film adjacent thereto successively without exposing them to the air.
The foregoing and other features of the invention will be described in preferred embodiments of the invention with reference to the attached drawings in which:
A first preferred embodiment in accordance with the first aspect of the invention will be described with reference to
Referring to
The transfer of a substrate between each chamber is carried in the following manner. Provided that a substrate initially held in the auxiliary chamber is moved into the treatment chambers 103 and 104 and treated therein sequentially, following which it is transferred into the auxiliary chamber 102, the substrate conveying process comprises the following sequential steps of:
(1) while evacuating the auxiliary chamber 101 and the transfer chamber 107 to a same degree of vacuum, opening a gate valve 110 and transferring the substrate 109 to the transfer chamber 107 using the robot arm 108, after that the gate valve 110 is closed;
(2) while evacuating the transfer chamber 107 and the treatment chamber 103 to a same degree of vacuum, opening a gate valve 112 and transferring the substrate 109 into the treatment chamber 103 following which the gate valve 112 is closed;
(3) performing a predetermined treatment on the substrate in the treatment chamber 103;
(4) after evacuating the treatment chamber 103 to a same degree as in the transfer chamber 107, opening the gate valve 112 and transferring the substrate 109 into the transfer chamber 107 with a robot arm following which the gate valve 112 is closed;
(5) while evacuating the transfer chamber 107 and the treatment chamber 104 to a same degree of vacuum, opening a gate valve 113 and transferring the substrate 109 into the treatment chamber 104 following which the gate valve 113 is closed;
(6) performing a predetermined treatment on the substrate in the treatment chamber 104;
(7) after evacuating the treatment chamber 104 to a same degree as in the transfer chamber 107, opening the gate valve 113 and transferring the substrate with a robot arm following which the gate valve 113 is closed; and then,
(8) while maintaining the transfer chamber 107 and the auxiliary chamber 102 at a same degree of a vacuum, opening a gate valve 111 and transferring the substrate to the auxiliary chamber 102 with the robot arm 108, and then closing the gate valve 111.
In the above manner, it is possible to perform two or more treatments successively without exposing the substrate to an outside air.
Substrates held in the cassette in the auxiliary chambers 101 can be processed one by one successively by repeating the foregoing steps (1) to (8). A substrate on which the predetermined process has be finished is automatically put into a cassette placed in the auxiliary chamber 102. Also, it is possible to clean the treatment chamber 104 while performing a film formation in the chamber 103 or to clean the treatment chamber 103 while performing a film formation in the chamber, 104. Accordingly, it is possible to perform the predetermined process in one chamber and to clean another treatment chamber(s) at the same time without stopping the operation of the entire apparatus. NF3 can be used as a cleaning gas for plasma cleaning the inside of the chambers.
This example is directed to a manufacture of a thin film integrated circuit including at least one thin film transistor.
Referring again to
Initially, a Corning 7059 glass substrate 109 (4×4 inches square, 5×5 inches square or 5×6 inches) is placed in the auxiliary chamber 101. The chamber 101 is evacuated preferably to a same degree of vacuum as in the transfer chamber 107 which is maintained at a sufficiently high vacuum. Then, after opening the gate valve 110, the substrate 109 is transferred from the auxiliary chamber 101 to the transfer chamber 107 with the robot arm 108. Then, while maintaining the treatment chamber 103 at a same vacuum as in the transfer chamber 107, the gate valve 112 is opened and the substrate is transferred to the treatment chamber 103, following which the gate valve 112 is closed. In the treatment chamber 103, an aluminum nitride film 202 is formed on the substrate to a thickness of 2000-5000 Å through plasma CVD. Al(C4H9)3 or Al(CH3)3 is used as a starting material gas together with a nitrogen gas. It is possible to add N2O at a small amount in order to reduce a thermal expansion stress.
After the formation of the aluminum nitride 202, the treatment chamber 103 is again evacuated to the same degree of vacuum as the transfer chamber 107, following which the gate valve 112 is opened and the substrate 109 is transferred from the treatment chamber 103 into the transfer chamber 107. In the later steps, the transfer of the substrate between each treatment chamber and the transfer chamber will be done in this manner. Also, needless to say, films formed on the substrate 109 are transferred together with the substrate when the substrate is transferred between the chambers although it is not specifically mentioned.
The substrate 109 is then transferred into the chamber 104 to perform a rapid thermal annealing. The annealing is done in an atmosphere of nitrogen, ammonium (NH3) or dinitrogen monoxide (N2O). The aluminum nitride film 202 is rapidly heated by the annealing and becomes transparent. At the same time, the insulating property and the thermal conductivity of the film can be improved. It is possible to form a silicon nitride film in order to prevent an impurity such as sodium from diffusing into a semiconductor film from the glass substrate. The silicon nitride film can be formed through plasma CVD at a substrate temperature 350° C., at a pressure of 0.1 Torr, using a mixture gas of SiH4 and NH3.
After the rapid thermal annealing, the substrate is transferred from the chamber 104 to the chamber 105 through the transfer chamber 107 in the same manner as explained above. In the chamber 105, a silicon oxide film 203 is formed to a thickness of 50-2000 Å through a plasma CVD using a TEOS gas mixed with oxygen as a starting material. The process parameters are shown below:
It is possible to add a C2F6 gas to the starting gas in order to form a film expressed by a formula SiOFx. The silicon oxide film 203 will be an underlying layer for a thin film transistor to be formed later. Also, it is possible to carry out a rapid thermal annealing in the treatment chamber 104 after the formation of the silicon oxide film 203.
Then, the substrate is transferred into the treatment chamber 106 where an amorphous silicon film 204 is formed to a thickness of 100-1500 Å, preferably, from 300 to 800 Å through a plasma CVD or LPCVD with the following formation parameters:
The amorphous silicon film may be formed using Si2H6 and Si3H8 in a LPCVD (low pressure thermal CVD). An example of a formation condition in the case of using LPCVD is shown below.
Further, the substrate is transferred to the treatment chamber 105 where a silicon oxide film 212 is formed to a thickness of 500-1500 Å through a plasma CVD using TEOS as a starting material. This film functions as a blocking layer for the silicon film. The formation conditions of the silicon oxide film 212 is as follows:
As a result, an aluminum nitride or silicon nitride blocking film 202, a silicon oxide film 203, a silicon semiconductor film 204 and a blocking film 212 can be laminated on a substrate 109 successively as shown in FIG. 2A. Since each treatment chamber is divided from the transfer chamber 107 by the gate valve, a mutual contamination with impurities between each chamber can be avoided. As a result, it is possible to reduce a concentration of C, N and O in the silicon film to at least 5×1018 atoms/cm3 or less, respectively.
Next, the substrate having the above laminated structure thereon is taken out from the auxiliary chamber 102 in order to pattern the silicon semiconductor film into an island form as shown in FIG. 2B. Then, a silicon oxide film 205 is formed on the patterned silicon film 204 to a thickness of 200-150 Å, preferably 500-1000 Å to form a gate insulating film. The silicon oxide film 205 is formed using TEOS gas and oxygen gas at a volume ratio 1:1 to 1:3, at a pressure of 0.05-0.5 Torr, and at an RF power of 100-250 W. This step may be carried out in the treatment chamber 105. In this case, it is preferable to perform a rapid thermal annealing with IR light in N2O atmosphere in the annealing chamber 104 after the formation of the silicon oxide film 205. Alternatively, the silicon oxide film can be formed through a LPCVD or an atmospheric pressure CVD using TEOS and ozone gas at 350-600° C. substrate temperature, preferably, 400-550° C.
After the formation of the silicon oxide film 205, the silicon oxide film is annealed in oxygen or ozone atmosphere at 400-600° C. for 30-60 minutes. The interface states in the silicon oxide film 205 and the silicon film 204 can be greatly reduced by the annealing step.
Then, as shown in
Next, an aluminum film is formed to a thickness of 2000 Å to 1 μm by an electron beam evaporation method, following which the aluminum film is patterned to be a gate electrode 206. It is possible to add scandium (Sc) to the aluminum at 0.15-0.2 weight %. Then, the aluminum gate electrode 206 is subjected to an anodic oxidation in an electrolyte. The electrolyte is ethylene glycol mixed with a tartaric acid at 1-3%. The pH of the electrolyte is set about 7. Also, the aluminum gate electrode functions as an anode while platinum is used as a cathode. At a first stage of the anodic oxidation, a voltage is increased to 220 V while maintaining a current constant, then this condition is maintained for 1 hour. The voltage is increased at a rate of 2-5 V/minute. Thus, an anodic oxide film 209 is formed to a thickness of 1500-3500 Å, for example, 2000 Å as shown in FIG. 2C.
When a high temperature treatment is necessary, it is desirable to use tantalum instead of aluminum.
After the formation of the anodic oxide film 209, an impurity (phosphorous) is added into a portion of the silicon film 204 by an ion doping method (also called as a plasma doping method) with the gate electrode portion used as a mask in a self-aligning manner. Phosphine (PH3) is used as a dopant gas. The dose amount is 1-4×1015 atoms/cm2.
Further, a KrF excimer laser 216 (wavelength 248 nm or 308 nm, pulse width 20 nsec) is irradiated as shown in
A silicon oxide film 210 is then formed on the entire surface as an interlayer insulator. The deposition is carried out in the treatment chamber 105 using a mixture of TEOS and oxygen as a starting gas. The CVD may be any one of plasma CVD, low pressure CVD or atmospheric pressure CVD. The thickness of the silicon oxide film is 0.3 μm to 1 μm, for example, 0.3 μm (3000 Å). The substrate temperature during the deposition is in the range of 250-450° C., for example, 350° C. The silicon oxide film is mechanically polished to obtain a leveled surface. This step may be replaced by an isotropic dry etching in a chamber provided in an apparatus of FIG. 1. Further, an ITO film is formed by sputtering and patterned to form a pixel electrode 211 as shown in FIG. 2E.
The interlayer insulator 210 is etched as shown in
The use of the aluminum nitride or silicon nitride film 202 is particularly advantageous for obtaining the top-side contact because it prevents the substrate surface from being etched or damaged during forming the contact holes. Namely, even if the underlying silicon oxide film 203 is unintentionally etched off during the formation of the contact holes, the aluminum nitride or silicon nitride film 202 functions as an etching stopper.
Also, the top-side contact is advantageous because the size of the contact holes may be made relatively larger. In the prior art, the size of the contact hole should be smaller than the size of the source/drain region. However, in the top-side contact structure, the contact hole may be larger than the silicon island. Accordingly, the formation of the contact holes can be eased.
Finally, the entire structure is annealed in hydrogen at 300-400° C. for 1 to 2 hours in order to hydrogenate the silicon. Although not shown in the drawings, a plurality of TFTs are formed on the same substrate in the form of a matrix at the same time. Also, a peripheral circuit constituted by TFTs may be formed on the same substrate at through the same process. Thus, a circuit substrate for a monolithic type active matrix liquid crystal device is formed.
The substrate processing apparatus of the present invention is controlled by a microcomputer in order to obtain a higher production yield and a cost performance.
The third example of the present invention in accordance with a second aspect of the present invention will be described. The same apparatus shown in
Initially, a crystal glass substrate 109 which has a high heat resistivity, for example, N-0 glass manufactured by Nippon Electric Glass Co. is introduced into the substrate processing apparatus from the load-unload chamber 101. The transfer of the substrate is done in the same way as in the first example of the invention. The substrate 109 is transferred to the transfer chamber 107 and then introduced into the plasma CVD chamber 103 by the robot arm 108. In the chamber 103, a silicon nitride film 202 is formed through plasma CVD as shown in
Then, the substrate is transferred into the chamber 105 via the transfer chamber 107 to form a silicon oxide film 203. The silicon oxide film 203 is formed to a thickness of 50-2000 Å by plasma CVD using TEOS and oxygen as a starting material with the following process condition:
Also, C2F6 may be added to the above starting material to form a film expressed by a chemical formula SiOFx. The silicon oxide film 203 functions as a base film for a TFT to be formed thereon.
Then, the substrate is transferred to the chamber 106 in order to form an amorphous silicon film 204 through LPCVD with the following process condition:
The use of a polysilane such as disilane is advantageous for obtaining a polycrystalline silicon film with an excellent property having an average grain size in the range of 250-8000 Å after a heat crystallization.
On the amorphous silicon film 204, a blocking film 212 comprising silicon oxide is formed in the chamber 105 by a plasma CVD using TEOS and oxygen as a starting material. Subsequently, the substrate is returned to the load-unload chamber 101 and taken out to the outside in order to pattern the amorphous silicon 204 together with the blocking film 212 into an island form and crystallize it. Since the patterning step and the crystallization step are not performed in a reduced pressure and take much longer time as compared with other steps, it is preferable that these steps are carried out with a different system in order to increase the operation rate of the apparatus. Accordingly, the blocking film 212 prevents the surface of the amorphous silicon film 204 form being contaminated by the air.
The patterning of the amorphous silicon film 204 is carried out by a known photolithography into a predetermined island pattern.
The heat crystallization is done at 550-600° C. in a nitrogen atmosphere for 8-56 hours. At this relatively low temperature, it is possible to obtain polycrystalline film with a large grain size as said above.
Then, a thermal annealing is performed at a higher temperature. The temperature is as high as the N-0 glass substrate can endure it, for example, 800-850° C. Thereby, the crystallinity within each crystal grain can be further improved. Also, this step may be carried out in an oxidizing atmosphere, for example, dry oxygen in order to form a thermal oxidation film. When using the thermal oxidation film as a gate insulating film, the appropriate thickness of the film is 500-2000 Å.
After the heat crystallization, the substrate is introduced again into the apparatus of the present invention from the auxiliary chamber 101. Depending upon necessity, the substrate is further transferred to the chamber 105, in which a silicon oxide film 205 is to be formed through a RF plasma CVD. Of course, the blocking film is removed by etching before the formation of the silicon oxide film 205 in an appropriate one of the chambers of the apparatus in order to expose a clean surface of the silicon film 204. The plasma CVD is carried out using TEOS and oxygen as a starting material and the substrate temperature at 300-450° C. The pressure ratio of the TEOS and oxygen is 1:1-1:3, and the entire pressure is 0.05-0.5 Torr. Also, the RF power is 100-250 W. Instead of plasma CVD, it is possible to form the silicon oxide film through LPCVD or atmospheric pressure CVD using TEOS mixed with ozone gas at a substrate temperature 350-600° C., preferably, 400-550° C.
Thus, as shown in
It is advantageous to perform a rapid thermal annealing with an IR light in N2O atmosphere in the chamber 104 after the formation of the silicon oxide film 205 in order to reduce interface states between the silicon oxide film 205 and the silicon film 204.
Then, transferring the substrate into the chamber 102, a phosphorous doped polysilicon film is formed through LPCVD to a thickness of 1000-4000 Å to form a gate electrode 217 as shown in FIG. 3C.
The steps starting from the formation of the underlying film and to the formation of the material for the gate electrode are carried out substantially without exposing the surface of each layer to the air. Thereby, it is possible to improve the each interface quality which is a main factor for determining the device property.
After the formation of the phosphorous doped polysilicon film, the substrate is taken out from the load-unload chamber 101. The next steps will be carried out outside of the apparatus of FIG. 1.
The phosphorous doped polysilicon film is patterned into a gate electrode 217 by drying etching. (
Then, the silicon island 204 is selectively doped with a dopant impurity (phosphorous) in a self-aligning manner using the gate electrode 217 in order to form source and drain regions 208 and 209. The doping is carried out by ion doping. Phosphine (PH3) is used as a dopant gas. Also, the dose amount is 1-4×1015/cm2.
Subsequently, the substrate is heated at 600° C. for 12 hours in a nitrogen atmosphere in order to activate the dopant, following which it is heat annealed in a hydrogen atmosphere at 400° C. for 1 hour in order to perform hydrogenation of the semiconductor film and reduce a defect level density.
A silicon oxide film 210 is then formed on the entire surface as an interlayer insulator. The deposition is carried out in the treatment chamber 105 using a mixture of TEOS and oxygen as a starting gas. The CVD may be any one of plasma CVD, low pressure CVD or atmospheric pressure CVD. Alternatively, the silicon oxide film 210 may be formed in a different apparatus from the apparatus of FIG. 1. The thickness of the silicon oxide film is 0.3 μm to 1 μm, for example, 0.3 μm (3000 Å). The substrate temperature is in the range of 250-450° C., for example, 350° C. The silicon oxide film is mechanically polished to obtain a leveled surface. This step may be replaced by an isotropic dry etching in a chamber provided in an apparatus of FIG. 1. Further, an ITO film is formed by sputtering and patterned to form a pixel electrode 211 as shown in FIG. 3E.
The interlayer insulator is etched as shown in
Finally, the entire structure is annealed in hydrogen at 300-400° C. for 1 to 2 hours. As a result, the silicon is hydrogenated. Although not shown in the drawings, a plurality of TFTs are formed on the same substrate in the form of a matrix at the same time. Also, a peripheral circuit constituted by TFTs may be formed on the same substrate. Thus, a circuit substrate for a monolithic type active matrix liquid crystal device is formed.
While the present invention is described with reference to the preferred embodiments, the present invention should not be limited to these particular examples but limited only to the appended claims. Many modifications may be made without departing the scope of the invention.
For example, various kinds of substrates may be processed in the apparatus of the present invention, for example, glass substrate, semiconductor substrate such as silicon substrate, or other insulating materials including a semiconductive or conductive substrates having an insulating surface thereon. For example, a glass substrate is suitable when forming an electro-optical device such as an active matrix liquid crystal device or an image sensor. Also, when using quartz as a substrate, the silicon nitride film 202 and silicon oxide film 203 may be omitted. Further, it is possible to raise the temperature of the thermal annealing after heat crystallization or heat oxidation to about 1000° C. when using a quartz substrate. Accordingly, it is possible to obtain a crystalline silicon film having an improved crystallinity.
Also, the TFT formed in the present invention may be a bottom gate type TFT.
| Number | Date | Country | Kind |
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| 5-291268 | Oct 1993 | JP | national |
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Divisional of prior application Ser. No. 08/685,788 filed Jul. 24, 1996, now U.S. Pat. No. 6,482,752 which is a Continuation of application Ser. No. 08/321,321 filed Oct. 11, 1994, now abandoned.
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| Number | Date | Country | |
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| Child | 10164019 | US |
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| Child | 08685788 | US |
