Claims
- 1. An integrated circuit comprising an interface layer between a conductive material and a dielectric material, the interface layer selected from the group consisting of aluminum oxide and lanthanide oxides and having a thickness less than or equal to about 4 molecular monolayers.
- 2. The integrated circuit of claim 1, wherein the conductive material comprises silicon.
- 3. The integrated circuit of claim 1, wherein the conductive material is a single-crystal silicon structure.
- 4. The integrated circuit of claim 1, wherein the conductive material is a silicon-germanium alloy.
- 5. The integrated circuit of claim 1, wherein the dielectric material is characterized by a dielectric constant greater than about 10.
- 6. The integrated circuit of claim 5, further comprising a second interface layer directly contacting an opposite side of the dielectric material, and a second conductive material directly over the second interface layer, the second interface layer selected from the group consisting of aluminum oxide and lanthanide oxides and having a thickness of less than or equal to about 4 molecular monolayers.
- 7. The integrated circuit of claim 6, wherein the conductive material comprises a silicon substrate, wherein the second conductive material comprises a gate electrode, and wherein the interface layer, dielectric material and second interface layer form a gate dielectric for an integrated transistor.
- 8. The integrated circuit of claim 6, wherein the conductive material comprises a storage electrode in a memory cell, and the second conductive material comprises a reference electrode, wherein the interface layer, dielectric material and second interface layer form a capacitor dielectric for an integrated capacitor.
- 9. The integrated circuit of claim 5, wherein the interface layer has a thickness between about 3 Å and 15 Å.
- 10. The integrated circuit of claim 9, wherein the interface layer has a thickness between about 3 Å and 9 Å.
- 11. The integrated circuit of claim 1, further comprising a plurality of alternating interface and dielectric layers, each interface layer selected from the group consisting of aluminum oxide and lanthanide oxides and having a thickness between about 1 Å and 15 Å, each dielectric layer having a dielectric constant of greater than about 5.
- 12. The integrated circuit of claim 11, wherein each interface layer comprises aluminum oxide and each dielectric layer comprises zirconium oxide.
REFERENCE TO RELATED APPLICATIONS
[0001] The present application is a divisional of non-provisional application Ser. No. 09/945,463, filed Aug. 31, 2001, entitled METHODS FOR MAKING A DIELECTRIC STACK IN AN INTEGRATED CIRCUIT and claims the priority benefit under 35 U.S.C. §119(e) to prior provisional application No. 60/239,040, filed Oct. 10, 2000, entitled METHOD OF DEPOSITING OXIDE THIN FILMS, provisional application No. 60/244,789, filed Oct. 31, 2000 entitled ALUMINUM OXIDE INTERFACE FILMS AND METHODS THEREFOR, and provisional application No. 60/247,115, filed Nov. 10, 2000, entitled DIELECTRIC INTERFACE FILMS AND METHODS THEREFOR.
Provisional Applications (3)
|
Number |
Date |
Country |
|
60247115 |
Nov 2000 |
US |
|
60244789 |
Oct 2000 |
US |
|
60239040 |
Oct 2000 |
US |
Divisions (1)
|
Number |
Date |
Country |
| Parent |
09945463 |
Aug 2001 |
US |
| Child |
10653737 |
Sep 2003 |
US |