Claims
- 1. A method of fabricating a semiconductor device, comprising:
forming a patterned implant mask over a semiconductor device, the implant mask exposing at least a portion of a gate structure and covering remaining upper surfaces of the semiconductor device; and selectively implanting dopants into an exposed portion of the gate structure.
- 2. The method of claim 1, wherein forming the patterned mask comprises:
depositing a film over the semiconductor device; and removing a portion of the film over the gate structure to expose a portion of the gate structure.
- 3. The method of claim 2, wherein depositing the film comprises depositing a substantially conformal film over the semiconductor device, and wherein removing a portion of the film comprises planarizing the semiconductor device to expose a portion of the gate structure.
- 4. The method of claim 3, wherein planarizing the semiconductor device comprises performing a chemical mechanical polishing operation to remove upper portions of the film to expose the portion of the gate structure.
- 5. The method of claim 3, wherein depositing the film comprises depositing a substantially conformal oxide material over the semiconductor device to a thickness of about 2000 Å or more and about 3000 Å or less using a chemical vapor deposition process.
- 6. The method of claim 3, wherein depositing the film comprises depositing a substantially conformal oxide material over the semiconductor device to a thickness of about 2 times a thickness of the gate structure or more and about 3 times the thickness of the gate structure or less.
- 7. The method of claim 3, wherein selectively implanting dopants into an exposed portion of the gate structure comprises performing an implantation process to provide dopants to the exposed portion of the gate structure at an angle with respect to an upper surface of the gate structure.
- 8. The method of claim 2, wherein depositing the film comprises depositing a substantially non-conformal film over the semiconductor device, and wherein removing a portion of the film comprises etching the semiconductor device to expose a portion of the gate structure.
- 9. The method of claim 8, wherein etching the semiconductor device comprises performing a reactive ion etch to remove an upper portion of the film to expose the portion of the gate structure.
- 10. The method of claim 9, wherein depositing the substantially non-conformal film comprises depositing one of a photoresist, an SOG material, and a BPSG material over the semiconductor device.
- 11. The method of claim 8, wherein depositing the substantially non-conformal film comprises depositing a spin-on material over the semiconductor device.
- 12. The method of claim 11, wherein depositing the substantially non-conformal film comprises depositing one of a photoresist, an SOG material, and a BPSG material over the semiconductor device.
- 13. The method of claim 1, wherein forming the patterned implant mask comprises depositing a substantially non-conformal film over the semiconductor device.
- 14. The method of claim 13, wherein depositing the substantially non-conformal film comprises substantially exposing a portion of a gate structure and covering remaining upper surfaces of the semiconductor device.
- 15. A method of forming a transistor gate in a semiconductor device, the method comprising:
forming a gate structure over a semiconductor substrate; forming a film over the semiconductor device; exposing at least a portion of the gate structure through the film; and selectively implanting dopants into the exposed portion of the gate structure.
- 16. The method of claim 15, wherein forming the film comprises depositing a substantially conformal film over the semiconductor device, and wherein exposing at least a portion of the gate structure comprises planarizing the semiconductor device to expose a portion of the gate structure.
- 17. The method of claim 16, wherein planarizing the semiconductor device comprises performing a chemical mechanical polishing operation to remove upper portions of the film to expose the portion of the gate structure.
- 18. The method of claim 16, forming the film comprises depositing a substantially conformal oxide material over the semiconductor device to a thickness of about 2 times a thickness of the gate structure or more and about 3 times the thickness of the gate structure or less using a chemical vapor deposition process.
- 19. The method of claim 15, wherein forming the film comprises depositing a substantially non-conformal film over the semiconductor device, and wherein exposing at least a portion of the gate structure comprises etching the semiconductor device to expose a portion of the gate structure.
- 20. The method of claim 19, wherein etching the semiconductor device comprises performing a reactive ion etch to remove an upper portion of the film to expose the portion of the gate structure.
- 21. The method of claim 19, wherein depositing the substantially non-conformal film comprises depositing one of a photoresist, an SOG material, and a BPSG material over the semiconductor device.
- 22. A method of fabricating a semiconductor device, comprising
forming a gate structure over a semiconductor substrate; performing a first implantation to provide dopants to prospective source/drain regions in the substrate; performing a second implantation to selectively provide dopants into the gate structure substantially without providing dopants to the prospective source/drain regions; and performing a third implantation to provide dopants to the prospective source/drain regions.
- 23. The method of claim 22, wherein performing the first implantation comprises performing one of an LDD implant process and a source/drain implant process, and wherein performing the third implantation comprises performing the other of the LDD implant process and the source/drain implant process.
- 24. The method of claim 22, wherein performing the second implantation comprises:
forming a film over the semiconductor device after performing the first implantation; exposing at least a portion of the gate structure through the film; and selectively implanting dopants into the exposed portion of the gate structure.
- 25. The method of claim 24, wherein forming the film comprises depositing a substantially conformal film over the semiconductor device, and wherein exposing at least a portion of the gate structure comprises planarizing the semiconductor device to expose a portion of the gate structure using a chemical mechanical polishing process.
- 26. The method of claim 24, wherein forming the film comprises depositing a substantially non-conformal film over the semiconductor device, and wherein exposing at least a portion of the gate structure comprises etching the semiconductor device to expose a portion of the gate structure using a reactive ion etch process.
RELATED APPLICATION
[0001] This application is a Continuation-In-Part of Ser. No. 10/123,686, filed Apr. 16, 2002, which is entitled “METHODS FOR TRANSISTOR GATE FORMATION USING GATE SIDEWALL IMPLANTATION”.
Continuation in Parts (1)
|
Number |
Date |
Country |
Parent |
10123686 |
Apr 2002 |
US |
Child |
10226536 |
Aug 2002 |
US |