Patent Application
20070158105
This application claims priority to prior Japanese patent applications JP 2005-334216 and JP 2006-291246, the disclosures of which are incorporated herein by reference.
This invention relates to a multilayer wiring board and, in particular, relates to a multilayer wiring board having a capacitor function between a power supply layer and a ground layer for noise suppression of the board.
In recent years, reduction in size and weight and advanced functionality have been required for portable electronic devices such as portable telephones and notebook personal computers. Following it, increase in transmission rate, in addition to high-density wiring and reduction in size and weight, has been required for circuit boards for use in semiconductor or LSI packages and so on.
However, following the increase in signal speed, there arises a problem that noise, which is not a problem at low speeds, prevents transmission of information. In order to increase the transmission rate, a circuit board design is required that can reduce the noise.
Generally, there has been employed a method that reduces electrical noise by mounting decoupling capacitors on a multilayer wiring board.
However, the signal transmission frequency has been increased more and more in recent years and, following it, the number of capacitors mounted on a board has also been increased. Using many capacitors makes a wiring design difficult, for example, making it impossible to provide the shortest wiring between components and making it difficult to achieve synchronization, and, further, it prevents miniaturization of a circuit board and causes an increase in cost.
In view of this, in recent years, a method has been proposed that reduces electrical noise by providing a layer made of a high-permittivity material in a multilayer wiring board of an LSI package or the like and thus incorporating a structure adapted to function as a capacitor in the multilayer wiring board. Such a technique is disclosed, for example, in Japanese Unexamined Utility Model Application Publication (JP-U) No. Hei 07-10979 or Japanese Unexamined Patent Application Publication (JP-A) No. 2002-217545. In this method, since the capacitor can be disposed right under an LSI, the LSI and the capacitor can be connected together by a much shorter line as compared with the case of a decoupling capacitor mounted on a board and thus the circuit parasitic inductance can be reduced, thereby enabling a reduction in noise of an LSI power supply.
However, as regards the multilayer wiring board disclosed in JP-U No. Hei 07-10979, there has been a problem that it is still necessary to add decoupling capacitors on the board or the LSI package with respect to noise in a frequency band that cannot be removed by the high-permittivity material incorporated in the multilayer wiring board.
Further, as regards the multilayer wiring board disclosed in JP-A No. 2002-217545, since a capacitance layer is provided for each supply-ground layer pair comprised of a power supply layer and a ground layer, the total number of layers is large and the structure is complicated, and therefore, miniaturization of the circuit board cannot be sufficiently achieved.
It is therefore an object of this invention to provide a multilayer wiring board that can reduce noise in the board over a wide frequency band with a simple structure.
According to an aspect of this invention, there is provided a multilayer wiring board comprising first, second, and third conductive layers, a first insulating layer formed between the first and the second conductive layers, and a second insulating layer formed between the second and the third conductive layers. The first and the second insulating layers are different in capacitance from each other.
According to another aspect of this invention, there is provided a multilayer wiring board comprising first, second, third, and fourth conductive layers, a first insulating layer formed between the first and the second conductive layers, a second insulating layer formed between the second and the third conductive layers, and a third insulating layer formed between the third and the fourth conductive layers. At least two of the first, the second, and the third insulating layers are different in capacitance from one another.
According to still another aspect of this invention, there is provided a multilayer wiring board comprising an inner conductive layer which is sandwiched between first and second insulating layer and which is further sandwiched between two outer conductive layers. The inner conductive layer serves as one of a power supply layer and a ground layer. Each of the outer conductive layers serves as the other of the power supply layer and the ground layer. The first and the second insulating layers are different in capacitance from each other.
According to another aspect of this invention, there is provided a multilayer wiring board comprising an inner conductive layer which is sandwiched between first and second insulating layer and which is further sandwiched between two outer conductive layers and an additional outer conductive layer formed on one of the outer conductive layers through a third insulating layer. The inner conductive layer serves as one of a power supply layer and a ground layer. Each of the outer conductive layers serves as the other of the power supply layer and the ground layer. The additional outer conductive layer serves as a secondary power supply layer or a secondary ground layer. At least two of the first, the second, and the third insulating layers are different in capacitance from one another.
According to another aspect of this invention, there is provided a multilayer wiring board manufacturing method comprising the steps of forming conductive layers on both sides of a first capacitance layer, thereby fabricating a first member, forming a conductive layer on one side of a second capacitance layer, thereby fabricating a second member, and stacking together the first and the second member by pressing such that a surface, not formed with the conductive layer, of the second member is butted to one of the conductive layers of the first member. The first and the second capacitance layers are different in capacitance from each other.
According to another aspect of this invention, there is provided a multilayer wiring board manufacturing method comprising the steps of forming conductive layers on both sides of a first capacitance layer, thereby fabricating a first member, forming a conductive layer on one side of a second capacitance layer, thereby fabricating a second member, forming a conductive layer on one side of a third capacitance layer, thereby fabricating a third member, and stacking together the first, the second, the third members by pressing such that a surface, not formed with the conductive layer, of the second member is butted to the one of the conductive layers of the first member and that a surface, not formed with the conductive layer, of the third member is butted to the other of the conductive layers of the first member. At least two of the first, the second, and the third capacitance layers are different in capacitance from one another.
In order to facilitate understanding of this invention, a conventional multilayer wiring board will first be described.
In
Conductive layers disposed on the low-capacitance layers 811 and 812 on the back and front sides of the multilayer wiring board 80 are signal layers 831 and 832, respectively. The signal layers 831 and 832 are connected to the electronic component 60 such as the LSI chip, mounted on the front side, through bonding wires. Between the two signal layers 831 and 832, the low-capacitance layer 811, a power supply layer 85, the high-capacitance layer 82, a ground layer 84, and the low-capacitance layer 812 are stacked in the order named from below. The electronic component 60 such as the LSl chip is connected to the ground layer 84 and the power supply layer 85 through a ground via 87 and a power supply via 88, respectively.
On the other hand, according to this invention, a multilayer wiring board incorporates a structure that exhibits the function of two or more capacitors. Therefore, it is possible to reduce noise over a wide frequency band and, further it is possible to reduce the number of decoupling capacitors or eliminate them all.
Further, this invention provides a structure in which at least one of a supply-ground layer pair comprised of a power supply layer and a ground layer with an insulating layer having a capacitance therebetween is also used for another supply-ground layer pair. Accordingly, there is an effect that the total number of layers is smaller and the structure is simpler as compared with the conventional structure having a plurality of supply-ground layer pairs independent of each other.
Hereinbelow, embodiments of this invention will be described in detail with reference to the drawings.
A multilayer wiring board 10 comprises low-capacitance layers 111 and 112 made of an insulating material generally used in circuit boards and having the same low capacitance between conductive layers, and two high-capacitance layers 121 and 122 each having a capacitance between conductive layers which is higher than that of each of the low-capacitance layers 111 and 112.
The low-capacitance layers 111 and 112 are respectively disposed on the back side of the multilayer wiring board 10 and on the front side thereof where an electronic component 60 such as an LSI chip is mounted.
The high-capacitance layers 121 and 122 have mutually different capacitances and are disposed adjacent to each other.
Conductive layers disposed on the low-capacitance layers 111 and 112 on the back and front sides of the multilayer wiring board 10 are signal layers 131 and 132, respectively. The signal layer 132 is connected to the electronic component 60 such as the LSI chip, mounted on the front side, through bonding wires, Between the two signal layers 131 and 132, the low-capacitance layer 111, a ground layer 141, the high-capacitance layer 121, a power supply layer 15, the high-capacitance layer 122, a ground layer 142, and the low-capacitance layer 112 are stacked in the order named from below.
The signal layers 131 and 132, the ground layers 141 and 142, and the power supply layer 15 may be in the form of copper foils, but not limited thereto, and may be made of a material generally used for conductive layers of multilayer wiring boards.
As described above, the multilayer wiring board 10 of this invention is formed by sandwiching the power supply layer 15 between the high-capacitance layers 121 and 122 having mutually different capacitances, further sandwiching them between the ground layers 141 and 142, and further sandwiching them between the signal layers 131 and 132 through the low-capacitance layers 111 and 112,
The signal layers 131 and 132 include ground wires, power supply wires, and signal wires, respectively. A ground via 17 is formed between the ground wires of the signal layers 131 and 132 and the ground layers 141 and 142. A power supply via 18 is formed between the power supply wires of the signal layers 131 and 132 and the power supply layer 15. Although not illustrated, a via may be formed between the signal wire of the signal layer 131 on the back side and the signal wire of the signal layer 132 on the front side. As shown in
Basically, the ground layers 141 and 142 and the power supply layer 15 are formed in the maximum ranges that avoid interference with the power supply via 18 and the ground via 17, respectively.
The insulating material of the low-capacitance layers 111 and 112 has, for example, a relative permittivity of approximately 2 to 5. The insulating material of the low-capacitance layers 111 and 112 is obtained, for example, by impregnating a glass cloth with an epoxy resin and drying them, but is not limited thereto. Assuming, for example, that use is made of a material having a relative permittivity of 4.2 and its thickness is set to 200 μm, the capacitance per unit area is approximately 0.2 pF/mm2.
The capacitance of the high-capacitance layer 122 is set to a value that can substitute for that of a small-capacitance decoupling capacitor adapted to absorb high-frequency noise. As defined by the following formula (1), the capacitance C of a capacitor is proportional to an electrode area A and a relative permittivity εr of a dielectric and inversely proportional to a distance d between electrodes.
C =ε0·εr·A/d (1)
(ε0: vacuum permittivity)
For example, using the same insulating material as that of the low-capacitance layers 111 and 112 with the relative permittivity of 4.2 and setting its thickness to 50 μm, the capacitance is set to 0.78 pF/mm2.
The capacitance of the high-capacitance layer 121 is set to a value that can substitute for that of a large-capacitance decoupling capacitor adapted to absorb power supply ripple voltage or the like, and is preferably set to 2 pF/mm2 or more. In this embodiment, as an insulating material of the high-capacitance layer 121, use is made of a material whose permittivity is increased as compared with that of the high-capacitance layer 122. For example, use is made of a material obtained by filling a barium titanate-based high-permittivity filler into an epoxy resin of the same insulating material as that of the high-capacitance layer 122 so as to obtain a relative permittivity of 16. By setting its thickness to 50 μm, the capacitance of the high-capacitance layer 121 is set to 2.8 pF/mm2.
As described above, in this embodiment, the dielectric materials of the high-capacitance layers 121 and 122 respectively have the capacitances that differ from each other. The effect of this will be explained with reference to
Further, this embodiment is configured such that the power supply layer 15 of a supply-ground layer pair comprised of the power supply layer 15 and the ground layer 142 with the high-capacitance layer 122 interposed therebetween is also used in the other supply-ground layer pair having the high-capacitance layer 121 interposed therebetween. Accordingly, there is an effect that the total number of layers is smaller and the structure is simpler as compared with the conventional structure having a plurality of supply-ground layer pairs independent of each other.
Now, a modification of this embodiment will be described.
This modification differs from the embodiment of
The high-capacitance layer 121′ is made of the same insulating material as that of low-capacitance layers 111 and 112 and the high-capacitance layer 122 with a relative permittivity of 4.2 and, for example, by setting its thickness to 25 μm, the capacitance is set to 1.56 pF/mm2. With this configuration, since the respective layers are made of the same insulating material, i.e. use is not made of insulating materials having different permittivities for the respective layers, thermal expansion coefficients and so on of the low-capacitance layers 111 and 112 and the two high-capacitance layers 121′ and 122 are equal to each other, thus resulting in higher reliability.
Referring now to
(Process 1) There are prepared resin-formed copper foils or copper foil-clad resin members each comprising an insulating member of the corresponding layer and a copper foil attached to one side or each of both sides of the insulating member.
Specifically, for manufacturing the board according to the embodiment shown in
The copper foil-clad resin member A101 is such that a copper foil A131 is attached to one side of a member A111 having a relative permittivity of 4.2 and a thickness of 200 μm, which is obtained by impregnating a glass cloth with an epoxy resin and drying them. The copper foil-clad resin member A102 is such that a copper foil A141 is attached to one side of a member A121 having a relative permittivity of 16 and a thickness of 50 μm, which is obtained by impregnating a glass cloth with an epoxy resin filled with a barium titanate-based high-permittivity filler and drying them. The core member A103 is such that copper foils A15 and A142 are attached to both sides of a member A122 having a relative permittivity of 4.2 and a thickness of 50 μm, which is obtained by impregnating a glass cloth with an epoxy resin and drying them.
The copper foil-clad resin member A104 is such that a copper foil A132 is attached to one side of a member A112 having a relative permittivity of 42 and a thickness of 200 μm, which is obtained by impregnating a glass cloth with an epoxy resin and drying them.
When manufacturing the board according to the modification shown in
The copper foil A15, the copper foils A141 and A142, and the copper foils A131 and A132 are all formed with circuits by etching.
(Process 2) As shown in
(Process 3) As shown in
In Processes 1 to 3, five copper foils are stacked and thus a five-layer board is fabricated. The copper foil A15 corresponds to the power supply layer 15 in
(Process 4) As shown in
As described above, the multilayer wiring board of this invention is manufactured by preparing the copper foil-clad resin members each having the insulating member, which will serve as the high-capacitance layer, and the copper foil attached to one side or each of both sides of the insulating member, forming the copper foils with the circuits, pressing the copper foil-clad resin members, building up the copper foil-clad resin members each having the insulating member, which will serve as the low-capacitance layer, and then forming the ground via, the power supply via, and so on. Accordingly, it can be manufactured more efficiently and easily than forming layers one by one in sequence.
Now, referring to
A multilayer wiring board 20 comprises low-capacitance layers 111 and 112 made of an insulating material generally used in circuit boards and having a relatively low permittivity, and each sandwiched between conductive layers, and three high-capacitance layers 121, 122, and 123 each having a capacitance higher than that of each of the low-capacitance layers 111 and 112.
The low-capacitance layers 111 and 112 are respectively disposed on the back side of the multilayer wiring board 20 and on the front side thereof where an electronic component 60 such as an LSI chip is mounted.
The high-capacitance layers 121, 122, and 123 have mutually different capacitances and are disposed adjacent to each other.
Conductive layers disposed on the low-capacitance layers 111 and 112 on the back and front sides of the multilayer wiring board 20 are signal layers 131 and 132, respectively. The signal layer 132 is connected to the electronic component 60 such as the LSI chip, mounted on the front side, through bonding wires.
A conductive layer between the high-capacitance layer 123 and the low-capacitance layer 112 and a conductive layer between the high-capacitance layers 121 and 122 are ground layers 142 and 141, respectively. Further, a conductive layer between the high-capacitance layers 122 and 123 and a conductive layer between the high-capacitance layer 121 and the low-capacitance layer 111 are power supply layers 152 and 151, respectively. The signal layers 131 and 132, the ground layers 141 and 142, and the power supply layers 151 and 152 may be in the form of copper foils, but not limited thereto, and, like the signal layers, the ground layers, and the power supply layer in the first embodiment, may be made of a material generally used for conductive layers of multilayer wiring boards.
As described above, this embodiment incorporates two structures each corresponding to the structure of the first embodiment, That is, this embodiment includes a first structure in which the power supply layer 152 is sandwiched between the high-capacitance layers 122 and 123 having mutually different capacitances and further sandwiched between the ground layers 141 and 142, and a second structure in which the ground layer 141 is sandwiched between the high-capacitance layers 121 and 122 having mutually different capacitances and further sandwiched between the power supply layers 151 and 152. These first and second structures each correspond to the structure of the first embodiment.
Aground via 17 is formed between ground wires of the signal layers 131 and 132 and the ground layers 141 and 142. A power supply via 18 is formed between power supply wires of the signal layers 131 and 132 and the power supply layers 151 and 152. A via may be formed between a signal wire of the signal layer 132 on the front side and a signal wire of the signal layer 131 on the back side. Also in this embodiment, as shown in
Also in this embodiment, the ground layers 141 and 142 and the power supply layers 151 and 152 are basically formed in the maximum ranges that avoid interference with the power supply via 18 and the ground via 17, respectively.
Like in the first embodiment, the insulating material of the low-capacitance layers 111 and 112 has, for example, a relative permittivity of approximately 2 to 5. The insulating material of the low-capacitance layers 111 and 112 is obtained, for example, by impregnating a glass cloth with an epoxy resin and drying them, but is not limited thereto. Assuming, for example, that use is made of a material having a relative permittivity of 4.2 and its thickness is set to 200 μm, the capacitance per unit area is approximately 0.2 pF/mm2.
The capacitance of the high-capacitance layer 123 is set to a value that can substitute for that of a small-capacitance decoupling capacitor adapted to absorb high-frequency noise. For example, like in the case of the high-capacitance layer 122 of the first embodiment, using the same insulating material as that of the low-capacitance layers 111 and 112 with the relative permittivity of 4.2 and setting its thickness to 50 μm, the capacitance is set to 0.78 pF/mm2.
The capacitance of the high-capacitance layer 122 is set to a value that can substitute for that of a large-capacitance decoupling capacitor adapted to absorb power supply ripple voltage or the like, and is preferably set to 2 to 5 pF/mm2. In this embodiment, as an insulating material of the high-capacitance layer 122, use is made of a material whose permittivity is increased as compared with that of the high-capacitance layer 123. For example, like in the case of the high-capacitance layer 121 of the first embodiment, use is made of a material obtained by filling a barium titanate-based high-permittivity filler into an epoxy resin of the same insulating material as that of the high-capacitance layer 123 so as to obtain a relative permittivity of 16. By setting its thickness to 50 μm, the capacitance of the high-capacitance layer 122 is set to 2.8 pF/mm2.
The capacitance of the high-capacitance layer 121 is set to a value that can substitute for that of a still larger-capacitance decoupling capacitor, and is preferably set to 5 pF/mm2 or more. In this embodiment, as an insulating material of the high-capacitance layer 121, use is made of a material whose permittivity is increased as compared with that of the high-capacitance layer 122. For example, use is made of a material obtained by filling a larger amount of a barium titanate-based high-permittivity filler into an epoxy resin of the same insulating material as that of the high-capacitance layer 123 so as to obtain a relative permittivity of 40. By setting its thickness to 30 μm, the capacitance of the high-capacitance layer 121 is set to 11 pF/mm2.
As described above, in this embodiment, since the capacitances of at least two of the high-capacitance layers 121, 122, and 123 differ from each other, the noise reduction effects are obtained in a plurality of frequency bands.
Instead of the high-capacitance layers 122 and 123, high-capacitance layers each having a smaller capacitance than the high-capacitance layer 121 may be formed by increasing the thickness of the insulating material having the same permittivity as that of the high-capacitance layer 121. On the other hand, instead of the high-capacitance layers 122 and 123, use may be made of high-capacitance layers obtained by reducing and increasing the thickness of the insulating material having the same permittivity as that of the high-capacitance layer 121, respectively. With this configuration, since the high-capacitance layers are made of the same insulating material, thermal expansion coefficients and so on of the respective layers are equal to each other, thus resulting in higher reliability.
In this embodiment, the power supply layer 152 of a supply-ground layer pair comprised of the power supply layer 152 and the ground layer 142 with the high-capacitance layer 123 interposed therebetween is also used in another supply-ground layer pair having the high-capacitance layer 122 interposed therebetween. Further, the ground layer 141 of a supply-ground layer pair comprised of the power supply layer 152 and the ground layer 141 with the high-capacitance layer 122 interposed therebetween is also used in still another supply-ground layer pair having the high-capacitance layer 121 interposed therebetween. Accordingly, there is an effect that the total number of layers is smaller and the structure is simpler as compared with the conventional structure having a plurality of supply-ground layer pairs independent of each other.
Referring now to
(Process 1) There are prepared resin-formed copper foils or copper foil-clad resin members each comprising an insulating member of the corresponding layer and a copper foil attached to one side or each of both sides of the insulating member. Specifically, as shown in
The copper foil-clad resin member A201 is such that a copper foil A131 is attached to one side of a member A111 having a relative permittivity of 4.2 and a thickness of 200 μm, which is obtained by impregnating a glass cloth with an epoxy resin and drying them. The copper foil-clad resin member A202 is such that a copper foil A151 is attached to one side of a member A121 having a relative permittivity of 40 and a thickness of 30 μm, which is obtained by impregnating a glass cloth with an epoxy resin filled with a barium titanate-based high-permittivity filler and drying them, The core member A203 is such that copper foils A141 and A152 are attached to both sides of a member A122 having a relative permittivity of 16 and a thickness of 50 μm, which is obtained by impregnating a glass cloth with an epoxy resin filled with a smaller amount of a barium titanate-based high-permittivity filler and drying them. The copper foil-clad resin member A204 is such that a copper foil A142 is attached to one side of a member A123 having a relative permittivity of 4.2 and a thickness of 50 μm, which is obtained by impregnating a glass cloth with an epoxy resin and drying them. The copper foil-clad resin member A205 is such that a copper foil A132 is attached to one side of a member A112 having a relative permittivity of 4.2 and a thickness of 200 μm, which is obtained by impregnating a glass cloth with an epoxy resin and drying them.
All the copper foils are formed with circuits by etching.
(Process 2) As shown in
(Process 3) As shown in
In Processes 1 to 3, six copper foils are stacked and thus a six-layer board is fabricated. The copper foils A141 and A142 correspond to the ground layers 141 and 142 in
(Process 4) As shown in
As described above, the multilayer wiring board of this invention is manufactured by preparing the copper foil-clad resin members each having the insulating member, which will serve as the high-capacitance layer, and the copper foil attached to one side or each of both sides of the insulating member, forming the copper foils with the circuits, pressing the copper foil-clad resin members, building up the copper foil-clad resin members each having the insulating member, which will serve as the low-capacitance layer, and then forming the ground via, the power supply via, and so on. Accordingly, it can be manufactured more efficiently and easily than forming layers one by one in sequence.
The third embodiment of this invention has a structure such that the power supply layer and the ground layers in the first embodiment shown in
Referring to
The low-capacitance layers 111 and 112 are respectively disposed on the back side of the multilayer wiring board 30 and on the front side thereof where electronic components 61 and 62 such as LSI chips are mounted.
The signal layers 131 and 132 include ground wires, first power supply wires, second power supply wires, and signal wires, respectively, A ground via 17 is formed between the ground wires of the signal layers 131 and 132 and the ground layer 14. A first power supply via 181 is formed between the first power supply wires of the signal layers 131 and 132 and the first power supply layer 15. A second power supply via 182 is formed between the second power supply wires of the signal layers 131 and 132 and the second power supply layer 16.
In an LSI package having a variety of power supplies, it is possible to provide different high-capacitance layers for the respective power supplies, thereby achieving noise reduction effects in different frequency bands for the respective power supplies. For example, assuming that the operating frequency of a circuit of the LSI chip 61 operated by a power supply V1 connected to the first power supply layer 15 is 1 GHz, while the operating frequency of a circuit of the LSI chip 62 operated by a power supply V2 connected to the second power supply layer 16 is 100 MHZ, the frequency bands of noise also differ from each other. Accordingly, by providing insulating layers having different capacitances (high-capacitance layers 121 and 122), it is possible to adapt to the respective frequency bands.
Also in this embodiment, the high-capacitance layer 121 having a larger capacitance than the high-capacitance layer 122 may be formed by reducing the thickness of an insulating material having the same permittivity as that of the high-capacitance layer 122. Conversely, the high-capacitance layer 122 having a smaller capacitance than the high-capacitance layer 121 may be formed by increasing the thickness of an insulating material having the same permittivity as that of the high-capacitance layer 121. With this configuration, since the high-capacitance layers are made of the same insulating material, thermal expansion coefficients and so on of the respective layers are equal to each other, thus resulting in higher reliability.
Further, this embodiment is also configured such that the ground layer 14 of a supply-ground layer pair comprised of the first power supply layer 15 and the ground layer 14 with the high-capacitance layer 121 interposed therebetween is also used in the other supply-ground layer pair having the high-capacitance layer 122 interposed therebetween. Accordingly, there is an effect that the total number of layers is smaller and the structure is simpler as compared with the conventional structure having a plurality of supply-ground layer pairs independent of each other.
The fourth embodiment of this invention has a structure such that the power supply layers and the ground layers in the second embodiment shown in
Referring to
The low-capacitance layers 111 and 112 are respectively disposed on the back side of the multilayer wiring board 40 and on the front side thereof where electronic components 61 and 62 such as LSI chips are mounted.
A conductive layer between the high-capacitance layer 123 and the low-capacitance layer 112 and a conductive layer between the high-capacitance layers 121 and 122 are a second power supply layer 16 and a first power supply layer 15, respectively. Further, a conductive layer between the high-capacitance layers 122 and 123 and a conductive layer between the high-capacitance layer 121 and the low-capacitance layer 111 are ground layers 142 and 141, respectively.
Conductive layers disposed on the low-capacitance layers 111 and 112 on the back and front sides of the multilayer wiring board 40 are signal layers 131 and 132, respectively. The signal layer 132 is connected to the electronic components 61 and 62 such as the LSI chips, mounted on the front side, through bonding wires.
The signal layers 131 and 132 include ground wires, first power supply wires, second power supply wires, and signal wires, respectively. A ground via 17 is formed between the ground wires of the signal layers 131 and 132 and the ground layers 141 and 142. A first power supply via 181 is formed between the first power supply wires of the signal layers 131 and 132 and the first power supply layer 15. A second power supply via 182 is formed between the second power supply wires of the signal layers 131 and 132 and the second power supply layer 16.
It can be said that this embodiment incorporates two structures each corresponding to the structure of the third embodiment. That is, this embodiment includes a first structure in which the ground layer 142 is sandwiched between the high-capacitance layers 122 and 123 having mutually different capacitances and further sandwiched between the first and the second power supply layers 15 and 16, and a second structure in which the first power supply layer 15 is sandwiched between the high-capacitance layers 121 and 122 having mutually different capacitances and further sandwiched between the ground layers 141 and 142. These first and second structures each correspond to the structure of the third embodiment.
As described above, in this embodiment, since the capacitances of at least two of the high-capacitance layers 121, 122, and 123 differ from each other, the noise reduction effects are obtained in a plurality of frequency bands.
Also in this embodiment, instead of the high-capacitance layers 122 and 123, high-capacitance layers each having a smaller capacitance than the high-capacitance layer 121 may be formed by increasing the thickness of the insulating material having the same permittivity as that of the high-capacitance layer 121. On the other hand, instead of the high-capacitance layers 122 and 123, use may be made of high-capacitance layers obtained by reducing and increasing the thickness of the insulating material having the same permittivity as that of the high-capacitance layer 121, respectively. With this configuration, since the high-capacitance layers are made of the same insulating material, thermal expansion coefficients and so on of the respective layers are equal to each other, thus resulting in higher reliability.
In this embodiment, the ground layer 142 of a supply-ground layer pair comprised of the second power supply layer 16 and the ground layer 142 with the high-capacitance layer 123 interposed therebetween is also used in another supply-ground layer pair having the high-capacitance layer 122 interposed therebetween. Further, the first power supply layer 15 of a supply-ground layer pair comprised of the ground layer 142 and the first power supply layer 15 with the high-capacitance layer 122 interposed therebetween is also used in still another supply-ground layer pair having the high-capacitance layer 121 interposed therebetween. Accordingly, there is an effect that the total number of layers is smaller and the structure is simpler as compared with the conventional structure having a plurality of supply-ground layer pairs independent of each other.
In description of these embodiments, detailed explanation of portions that are the same as or equivalent to those in the first to fourth embodiments shown in FIGS. 3 to 11 will be omitted.
Referring to
The capacitances of at least two of the high-capacitance layers 121 to 124 differ from each other.
The signal layers 131 and 132 are disposed on the low-capacitance layers 111 and 112 on the back and front sides of the multilayer wiring board 50a, respectively. The signal layer 132 is connected to an electronic component 60 such as an LSI chip, mounted on the front side, through bonding wires.
The signal layers 131 and 132 include ground wires, power supply wires, and signal wires, respectively. A ground via 17 is formed between the ground wires and the ground layers 141 and 142. A power supply via 18 is formed between the power supply wires and the power supply layers 151 to 153.
Referring to
The capacitances of at least two of the high-capacitance layers 121 to 124 differ from each other.
The signal layers 131 and 132 are disposed on the low-capacitance layers 111 and 112 on the back and front sides of the multilayer wiring board 50b, respectively. The signal layer 132 is connected to electronic components 61 and 62 such as LSI chips, mounted on the front side, through bonding wires.
The signal layers 131 and 132 include ground wires, first power supply wires, second power supply wires, and signal wires, respectively. A ground via 17 is formed between the ground wires and the ground layers 141 and 142. A first power supply via 181 is formed between the first power supply wires and the first power supply layer 15. A second power supply via 182 is formed between the second power supply wires and the second power supply layers 161 and 162.
Referring to
The capacitances of at least two of the high-capacitance layers 121 to 124 differ from each other.
The signal layers 131 and 132 are disposed on the low-capacitance layers 111 and 112 on the back and front sides of the multilayer wiring board 50c, respectively. The signal layer 132 is connected to electronic components 61 and 62 such as LSI chips, mounted on the front side, through bonding wires.
The signal layers 131 and 132 include ground wires, first power supply wires, second power supply wires, and signal wires, respectively. A ground via 17 is formed between the ground wires and the ground layers 141 and 142. A first power supply via 181 is formed between the first power supply wires and the first power supply layers 151 and 152. A second power supply via 182 is formed between the second power supply wires and the second power supply layer 16.
Referring to
The capacitances of at least two of the high-capacitance layers 121 to 124 differ from each other.
The signal layers 131 and 132 are disposed on the low-capacitance layers 111 and 112 on the back and front sides of the multilayer wiring board 50d, respectively. The signal layer 132 is connected to an electronic component 60 such as an LSI chip, mounted on the front side, through bonding wires.
The signal layers 131 and 132 include ground wires, power supply wires, and signal wires, respectively. A ground via 17 is formed between the ground wires and the ground layers 141 to 143. A power supply via 18 is formed between the power supply wires and the power supply layers 151 and 152.
Referring to
The capacitances of at least two of the high-capacitance layers 121 to 124 differ from each other.
The signal layers 131 and 132 are disposed on the low-capacitance layers 111 and 112 on the back and front sides of the multilayer wiring board 50e, respectively. The signal layer 132 is connected to electronic components 61 and 62 such as LSI chips, mounted on the front side, through bonding wires.
The signal layers 131 and 132 include ground wires, first power supply wires, second power supply wires, and signal wires, respectively. A ground via 17 is formed between the ground wires and the ground layers 141 to 143. A first power supply via 181 is formed between the first power supply wires and the first power supply layer 15. A second power supply via 182 is formed between the second power supply wires and the second power supply layer 16.
In the fifth to ninth embodiments, since the capacitances of at least two of the high-capacitance layers 121 to 124 differ from each other as described above, the noise reduction effects are obtained in a plurality of frequency bands.
Also in the fifth to ninth embodiments, the required capacitances may be obtained according to the forming thicknesses of the respective capacitance layers. In this case, since the high-capacitance layers are made of the same insulating material, thermal expansion coefficients and so on of the respective layers are equal to each other, thus resulting in higher reliability.
Further, also in the fifth to ninth embodiments, since the power supply layer or the ground layer is shared between the adjacent supply-ground layer pairs, there is an effect that the total number of layers is smaller and the structure is simpler as compared with the conventional structure having a plurality of supply-ground layer pairs independent of each other.
While this invention has been described in terms of the preferred embodiments, this invention is not to be limited thereto, but can be carried out with various changes without departing from the gist of this invention.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2005-334216 | Nov 2005 | JP | national |
| 2006-291246 | Oct 2006 | JP | national |
