The present invention relates generally to semiconductor fabrication and more specifically to methods of forming gap-filling films between metal structures.
Fluorine silicate glass (FSG) films still suffer from thermal stability issues. The high density plasma chemical vapor deposition (HDP-CVD) deposition rate of FSG films is about 3200 Å/minute which is lower than a CVD deposition of silicon oxide (SiO2). The dielectric constant (k) of conventional FSG film is 3.70 and the gap fill for conventional FSG film can only reach 0.21 μm aspect ratio.
U.S. Pat. No. 6,077,764 to Sugiarto et al. describes an FSG deposition process including an N2 flow during deposition.
U.S. Pat. No. 6,221,793 B1 to Ngo et al. describes an oxide deposition process including an N2 flow during deposition.
U.S. Pat. No. 5,827,785 to Bhan et al. describes an FSG process that includes an N-containing gas (NF3).
U.S. Pat. No. 5,429,995 to Nishiyama et al. describes a nitrogen and FSG layer.
U.S. Pat. No. 6,242,338 to Liu et al. describes an N2 plasma treatment of an FSG layer.
U.S. Pat. No. 6,136,680 to Lai et al. describes various treatments of FSG including a nitrogen-treatment.
U.S. Pat. No. 6,103,601 to Lee et al. describes an FSG process and a post treatment.
Accordingly, it is an object of one or more embodiments of the present invention to provide an improved method of forming an FSG film.
Other objects will appear hereinafter.
It has now been discovered that the above and other objects of the present invention may be accomplished in the following manner. Specifically, a structure is provided. An FSG film is formed over the structure by an HDP-CVD process under the following conditions: no Argon (Ar)—side sputter; SiF4 flow: from about 53 to 63 sccm; an N2 flow: from about 25 to 35 sccm; and an RF power to provide a uniform plasma density.
The present invention will be more clearly understood from the following description taken in conjunction with the accompanying drawings in which like reference numerals designate similar or corresponding elements, regions and portions and in which:
Unless otherwise specified, all structures, layers, steps, methods, etc. may be formed or accomplished by conventional steps or methods known in the prior art.
Problem Known to the Inventors—Not to be Considered Prior Art
When gaps/openings between metal structures/lines are filling with FSG using conventional HDP-CVD deposition recipes, the corners of the metal structures/lines are clipped off due to sputtering conducted at about a 45° angle.
Brief Summary of the HDP-CVD Recipe of the Present Invention
The HDP-CVD recipe of the present invention includes, inter alia:
As shown in
Structure 10 is preferably a silicon substrate and is understood to possibly include a semiconductor wafer or substrate, active and passive devices formed within the wafer, conductive layers and dielectric layers (e.g., inter-poly oxide (IPO), intermetal dielectric (IMD), etc.) formed over the wafer surface. The term “semiconductor structure” is meant to include devices formed within a semiconductor wafer and the layers overlying the wafer.
Structures 12 are preferably metal structures or lines and are preferably comprised of copper, aluminum or gold and are more preferably copper or aluminum.
The gaps 14 between a pair of adjacent structures 12 are preferably from about 0.19 to 0.21 μm and may be as narrow as from about 0.17 to 0.21 μm.
Formation of N-FSG Film 16—
As shown in
HDP-CVD Recipe of the Current Invention
Table I below summarizes the more preferable conditions under which the N-FSG film 16 of the present invention is formed and also lists the conditions of the formation of conventional FSG films for comparison.
It is noted from Table I that in the present invention compared to the conventional process/recipe: the Ar—side is eliminated to decrease the sputter effect and so prevents corner clipping; a greater quantity of SiH4—side is employed; a greater flow of O2 is employed; a greater flow of SiF4 is employed to increase F etch ability; N2 is added during the deposition of the N-FSG to trap fluorine to prevent [F] outgassing; and the RF power (RF—top, RF—side and Bias RF) is fine tuned to achieve a uniform plasma density.
The preferably conditions for Table I are:
Further, the following Table II compares selected characteristics of the convention recipe FSG film to the more preferably characteristics those of the present invention recipe N-FSG film 16:
where:
The preferably characteristics of the N-FSG film 16 for Table II are:
It is noted from Table II that the N-FSG film 16 of the present invention as compared to the convention FSG film has: a lower dielectric constant (k) which can reduce line to line (L/L) capacitance about 8%; better gap filling ability (an aspect ratio of about 3.5:1); a lower THK U%; a lower range; a higher D/R; a greater deposition rate (by about 40%); a higher percentage of fluorine; and a lower F%U%.
Further, the N-FSG film 16 was found to be more stable than the conventional recipe FSG film as to, inter alia: the F%; lack of F outgassing; lack of formation of Si—OH bonds; thermal stability; and high moisture resistance.
The inventors have determined that no Si—OH peak in a Fourier transform infrared spectrum (FTIR) was detected after one week in the N-FSG film 16 formed in accordance with the present invention. Thus, without the presence of Si—OH bonds formed on the N-FSG film 16, water (H2O) will not be absorbed by the N-FSG film 16. Also, no bubble after 7 alloys (at about 400° C., N2, 45 minute furnace for 7 times—worse case for thermal test) was detected on a patterned wafer employing the N-FSG film 16 of the present invention meaning that fluorine within the N-FSG film 16 was stable and did not outgas, attacking metal structures/lines 14.
As way of example, the inventors have determined the following film quality comparison experimental data between a conventional FSG recipe (SID) film and a present invention FSG recipe film (NFSG):
Advantages of the Present Invention
The advantages of one or more embodiments of the present invention include:
While particular embodiments of the present invention have been illustrated and described, it is not intended to limit the invention, except as defined by the following claims.