Patent Application
20230100911
Wafer-level packaging is a packaging technique often used to isolate sensitive circuits and components from the package environment. For example, microelectromechanical systems (MEMS) such as bulk acoustic wave resonators, accelerometers, optical sensors, microactuators, and the like can be sensitive to vertical or lateral stresses from their packages. In wafer-level packaging, the MEMS is affixed to a substrate by an anchor, tether, or a spring, and couples an electric signal to a bond pad on the substrate. A cap wafer is affixed to the substrate over the MEMS and bond pad, and partially diced to expose the bond pad.
However, the partial dicing process can require high-precision alignment to ensure the cap wafer is diced at an appropriate location and high-precision depth control to ensure the dicing blades do not cut too deep and damage the substrate underneath. A misaligned blade can dice the cap wafer too dose to a bonding site and compromise the bonding between the cap wafer and the substrate. In addition, a misaligned blade can dice the cap wafer in a manner that does not fully expose the bond pad or deposits dust onto the bond pad, damaging it. A too-low height setting for the blade can cause the blade to dice the cap wafer too deeply and can damage the substrate and bond pad beneath, while a too-high setting for the blade can cause the blade to not fully cut through the cap wafer.
An encapsulation chip manufacturing method comprises forming a first dicing groove and a second dicing groove in a surface of a cap wafer and aligning the cap wafer and a device substrate such that the surface of the cap wafer faces a surface of the device substrate. The device substrate includes a device affixed to the surface of the device substrate and a bond pad on the surface of the device substrate and coupled to the device. The cap wafer is then bonded to the device substrate and partially diced at the first and second dicing grooves, such that the bond pad is exposed. In some implementations, aligning the cap wafer and the device substrate comprises aligning the first and second dicing grooves between the bond pad and a bonding area at which the cap wafer is bonded to the device substrate. A width of the first and second dicing grooves is such that cap wafer dust formed during the partial dicing does not fall on the bond pad.
In some embodiments, bonding the cap wafer to the device includes bonding a first portion of the cap wafer and a first portion of the device substrate with a bonding polymer and bonding a second portion of the cap wafer and a second portion of the device substrate with the bonding polymer. The first and second portions of the device substrate are on opposite sides of the device. In some implementations, the second portion of the device substrate is between the device and the bond pad. Aligning the cap wafer and the device substrate includes aligning at least one of the first and second dicing grooves between the second portion of the device substrate and the bond pad in some embodiments.
Partially dicing the cap wafer and the first and second dicing grooves comprises sawing through the cap wafer to a depth of the first and second dicing grooves, in some implementations. The device comprises one of an integrated circuit and a microelectromechanical system device.
The same reference number is used in the drawings for the same or similar (either by function and/or structure) features.
The described partial dicing processes include forming dicing grooves on an inner surface of a cap wafer. A device substrate has an integrated circuit or a MEMS device and a bond pad affixed to a substrate surface. The device substrate and the cap wafer are bonded together at bonding areas and aligned such that the inner surface of the cap wafer faces the substrate surface and the dicing grooves are aligned between the bonding area and the bond pad. The cap wafer and the device substrate are bonded together, and the cap wafer is partially diced at the dicing grooves to expose the bond pad on the substrate surface. During the partial dicing process, the blades are aligned with portions of an outer surface of the cap wafer that correspond to the dicing groove and saw partway through the cap wafer to a depth of the dicing grooves.
The stress-sensitive device 105A is affixed to a surface of the substrate 130 between the isolation trenches 110A and 1108, and the stress-sensitive device 1058 is affixed to the surface of the substrate 130 between the isolation trenches 110C and 110D. In this example, the stress-sensitive devices 105A and 1058 are formed separately from the substrate 130 and affixed to the surface of the substrate 130. In other implementations, the stress-sensitive devices 105A and 1058 can be formed directly on the surface of substrate 130.
The lead 115A couples the stress-sensitive device 105A to the bond pad 120A, and the lead 115B couples the stress-sensitive device 105B to the bond pad 120B. The cap wafer 140 is bonded to the surface of the substrate 130 using the bonding polymers 150A, 150B, 150C, and 150D to form cavities 145A and 145B over and around the stress-sensitive devices 105A and 105B, respectively. The bonding polymers 150A, 150B, 150C, and 150D are arranged on the surface of the substrate 130 outside the isolation trenches 110A, 110B, 110C, and 110D from the stress-sensitive devices 105A and 105B. The bonding polymer 150B is further arranged between the isolation trench 110B and the bond pad 120A, and the bonding polymer 150C is further arranged between the isolation trench 110C and the bond pad 120B.
During the partial dicing step of the wafer-level packaging process, the blades 160A and 160B cut the cap wafer 140 into three portions 140A, 140B, and 140C. The cap wafer portion 140A remains affixed to the substrate 130 over the stress-sensitive device 105A by the bonding polymers 150A and 150B, and the cap wafer portion 140B remains affixed to the substrate 130 over the stress-sensitive device 105B by the bonding polymers 150C and 150D. The cap wafer portion 140C is removed from between portions 140A and 140B to expose the bond pads 120A and 120B. The partial dicing process requires high-precision alignment of the blades 160A and 160B over the cap wafer 140 to ensure the cap wafer 140 is diced at an appropriate location.
In callout 170, the blade 160A is aligned too close to the bonding polymer 150B and may affect how well the cap wafer 140A is affixed to the substrate 130. For example, the blade 160A can cut away a portion of the bonding polymer 150B, leaving an insufficient amount of bonding polymer 150B to hold the cap wafer 140A to the substrate 130. As another example, the blade 160A can cut the cap wafer 140 at a portion that is bonded by the bonding polymer 150B, such that the cap wafer portion 140C is at least partially adhered to the substrate 130 by the bonding polymer 150B. Removing the cap wafer portion 140C to expose the bond pads 120A and 120B then requires additional and difficult processing. For example, an etching process to remove a portion of the bonding polymer 150B adhering the cap wafer portion 140C to substrate 130 must not affect the integrity of the remaining bonding polymer 150B or damage the bond pads 120A and 120B.
In addition, the height of blades 160A and 160B must be carefully controlled to ensure that the blades 160A and 160B cut all the way through cap wafer 140 to expose the bond pads 120A and 120B but do not cut too deep so that the substrate 130 is damaged. In callout 180, the blade 160B cuts too deeply through the cap wafer 140 and damages the bond pad 120B and substrate 130 beneath. Even with high-precision alignment and height control, the partial dicing process can cause dust from cap wafer 140 to land on bond pads 120A and 120B, causing damage.
A depth and width of the dicing grooves 250A and 250B can be chosen based on the capabilities of the manufacturing system, as discussed further herein with respect to
During the capsulation wafer bonding step, the cap wafer 240 is aligned over the substrate 130 such that the dicing groove 250A and the bonding polymer 150B are positioned between the isolation trench 110B and the bond pad 120A. Similarly, the dicing groove 250B and the bonding polymer 150C are positioned between the isolation trench 110C and the bond pad 120B. In some manufacturing systems, it is simpler to align the cap wafer 240 over the substrate 130 than to align the blades 160A and 160B over the cap wafer 140 shown in
The width and depth of dicing grooves 250A and 250B can be chosen to relax the manufacturing control for the blades 260A and 260B compared to the blades 160A and 160B described herein with reference to
In callout 270, the blade 260A is aligned too close to the bonding polymer 150B, similar to blade 160A in callout 170 shown in
In this description, the term “couple” may cover connections, communications, or signal paths that enable a functional relationship consistent with this description. For example, if device A generates a signal to control device B to perform an action: (a) in a first example, device A is coupled to device B by direct connection; or (b) in a second example, device A is coupled to device B through intervening component C if intervening component C does not alter the functional relationship between device A and device B, such that device B is controlled by device A via the control signal generated by device A.
A circuit or device that is described herein as including certain components may instead be adapted to be coupled to those components to form the described circuitry or device. For example, a structure described as including one or more semiconductor elements (such as transistors), one or more passive elements (such as resistors, capacitors, and/or inductors), and/or one or more sources (such as voltage and/or current sources) may instead include only the semiconductor elements within a single physical device (e.g., a semiconductor die and/or integrated circuit (IC) package) and may be adapted to be coupled to at least some of the passive elements and/or the sources to form the described structure either at a time of manufacture or after a time of manufacture, for example, by an end-user and/or a third-party.
Unless otherwise stated, “aligned” or “substantially aligned” means the two are ninety percent or more aligned with each other. Unless otherwise stated, “about,” “approximately,” or “substantially” preceding a value means+/−10 percent of the stated value. Modifications are possible in the described examples, and other examples are possible within the scope of the claims.
Modifications are possible in the described embodiments, and other embodiments are possible, within the scope of the claims.
