BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a vertical cross-sectional view showing a schematic construction of a plasma etching apparatus according to an embodiment of the present invention;
FIG. 2 is a circuitry diagram of an impedance varying part;
FIG. 3(
a) and FIG. 3(b) are views to explain a case where of a hole is formed in a semiconductor wafer by etching, FIG. 3(a) showing a state where etching with high anisotropy is performed and FIG. 3(b) showing a state where the hole has a bowing shape;
FIG. 4 is a circuit diagram showing a modified example of an impedance varying circuit;
FIG. 5 is a vertical cross-sectional view showing a schematic construction of a plasma etching apparatus according to an embodiment where a focus ring serves as a chemical component emitting member;
FIG. 6 is a vertical cross-sectional view showing a schematic construction of a plasma etching apparatus according to an embodiment where a chemical component emitting member is disposed around plasma generated in a process vessel;
FIG. 7 is a graph showing etching rate in center and peripheral edge portions of a semiconductor wafer; and
FIG. 8 is a vertical cross-sectional view showing a schematic construction of a plasma etching apparatus according to an embodiment including sensors detecting emission intensity (radical density) of plasma in the center and peripheral edge portions of the semiconductor wafer.