I. Field of the Invention
The present invention relates to a package structure. More particularly, the present invention relates to an electronic package structure.
II. Description of the Prior Art
Electronic package structures are formed by complicated package processes. Different electronic package structures have different electrical performances and capacities of heat dissipation, and therefore a designer may select an electronic package structure with a desired electrical performance and capacity of heat dissipation according to a design requirement.
It should be noted that the electronic elements 120 of the conventional electronic package structure 100 are all disposed on the surface 112 of the PCB 110, and the electronic elements 220 of the conventional electronic package structure 200 are all disposed on the surface 212 of the circuit substrate 210. Therefore, in the conventional electronic package structures 100 and 200, spatial utilization of the PCB 110 and the circuit substrate 210 is relatively low, and sizes of the conventional electronic package structures 100 and 200 are relatively great.
In accordance with the present invention, an electronic package structure can achieve a relatively high utilization of an internal space thereof, so that a size of the electronic package structure can be reduced.
In one embodiment of the present invention, an electronic package structure includes at least a first electronic element, a second electronic element and a first lead frame. The second electronic element includes a body having a cavity. The first electronic element is disposed in the cavity. The lead frame has a plurality of leads. Each of the leads has a first end and a second end, and the first end of at least one of the leads extends to the cavity to electrically connect the first electronic element.
In one embodiment of the present invention, an electronic package structure includes at least one first electronic element, a second electronic element and a lead frame. The second electronic element includes a body having a first surface. The lead frame has a plurality of leads. Each of the leads has a first end and a second end. The first ends are disposed on the first surface, and the first electronic element is disposed on the first surface and electrically connected to at least one of the leads.
In one embodiment, an electronic package structure includes a circuit substrate, at least one first electronic element and a second electronic element. The circuit substrate has a first surface. The first electronic element is disposed on the first surface of the circuit substrate and electrically connected to the circuit substrate. The second electronic element is disposed above the first surface of the circuit substrate and includes a body and a plurality of leads. Each of the leads has a first end and second end, and the second end of each of the leads extends out from the body to electrically connect the circuit substrate. The first electronic element is located among the body of the second electronic element, the first surface of the circuit substrate and the leads.
In the above embodiments of the present invention, since the first electronic element can be disposed in the cavity of the second electronic element or on the second electronic element, or the second electronic element can be stacked on the first electronic element, compared to the conventional electronic package structures, utilization of an internal space of the electronic package structure is relatively high.
In order to make the aforementioned and other objects, features and advantages of the present invention comprehensible, a preferred embodiment accompanied with figures is described in detail below.
The detailed technology and above preferred embodiments implemented for the present invention are described in the following paragraphs accompanying the appended drawings for people skilled in this field to well appreciate the features of the claimed invention.
The foregoing aspects and many of the accompanying advantages of this invention will become more readily appreciated as the same becomes better understood by reference to the following detailed description when taken in conjunction with the accompanying drawings, wherein:
The detailed explanation of the present invention is described as following. The described preferred embodiments are presented for purposes of illustrations and descriptions, and they are not intended to limit the scope of the present invention.
The second electronic element 320 includes a body 322 having a cavity 322a. The first electronic elements 310 are disposed in the cavity 322a. In the embodiment, the body 322 of the second electronic element 320 has a first surface 322b, a second surface 322c opposite to the first surface 322b and a side surface 322d. The cavity 322a sinks in a direction from the second surface 322c towards the first surface 322b. The side surface 322d connects the first surface 322b and the second surface 322c. Besides, the second electronic element 320 can be an energy-storage element used for storing electric energy. In detail, the second electronic element 320 further includes a coil 324 and a plurality of first external electrodes 326. The coil 324 is disposed within the body 322. The first external electrodes 326 are respectively connected to two opposite ends of the coil 324, and extend outside the body 322 to locate on the first surface 322b and the side surface 322d. The body 322 comprising a magnetic body encloses the coil 324. The second electronic element 320 can be an inductive element, such as an inductor, with a greater inductance and a greater size than the first electronic elements 310.
The first lead frame 330 has a plurality of leads 332. Each of the leads 332 has a first end 332a and a second end 332b, and the first end 332a of each of the leads 332 can be embedded in the body 322 and extends to the cavity 322a for electrically connecting to the first electronic elements 310. The second end 332b of each of the leads 332 is disposed on the first surface 322b of the body 322 to form a second external electrode 332c, and a part of each of the leads 332 connecting the first end 332a and the second end 332b is disposed on the side surface 322d of the body 322.
In the present embodiment, the electronic package structure 300 further includes a platform, such as a circuit substrate 340, and an insulating encapsulant 350. The circuit substrate 340 is disposed in the cavity 322a of the body 322. The first electronic elements 310 can be disposed on the circuit substrate 340 and electrically connected to the circuit substrate 340. The circuit substrate 340 is electrically connected to the first end 332a of each of the leads 332 extending to the cavity 322a. The first electronic elements 310 may be electrically connected to the circuit substrate 340 via a wire bonding technology, a flip-chip bonding technology or a surface mount technology. The circuit substrate 340 has a first circuit layer 342, a second circuit layer 344, a dielectric layer 346 disposed between the first circuit layer 342 and the second circuit layer 344, and at least a conductive channel 348. The first electronic elements 310 are disposed on the first circuit layer 342, and the conductive channel 348 penetrates the dielectric layer 346 for electrically connecting the first circuit layer 342 and the second circuit layer 344. It should be noted that the circuit board 340 of the electronic package structure 300 may be omitted according to a design requirement of a designer, though it is not illustrated.
Moreover, the insulating encapsulant 350 is disposed in the cavity 322a and encapsulates the first electronic elements 310 and the circuit substrate 340 for protecting the first electronic elements 310 and the circuit substrate 340, and enhancing a whole mechanical strength of the electronic package structure 300.
Since the first electronic elements 310 and the circuit substrate 340 are disposed in the cavity 322a of the second electronic element 320, compared to a conventional electronic package structures of
Furthermore, a platform, such as a circuit substrate 440, is disposed on the first surface 422a and electrically connected to the leads 432, and the first electronic elements 410 are disposed on the circuit substrate 440 and electrically connected to the circuit substrate 440. It should be noted that the circuit substrate 440 of the electronic package structure 400 may be omitted according to a design requirement of the designer, or the circuit substrate 440 may be substituted by a lead frame, though it is not illustrated.
Still referring to
First, the plurality of first electronic elements 510 and any other components of the electronic package structure 500 are mounted to the circuit substrate 530, the bottom pads of the components are soldered to corresponding pads of the circuit substrate.
Next, the upper pads (if any are present) of the components are wire bonded to corresponding pads of the circuit substrate 530.
Then, the leads 524 of the second electronic element 520 are shaped, and the second electronic element 520 is mounted to the circuit substrate 530, e.g., by soldering the leads to corresponding pads of the circuit substrate.
Next, the insulating encapsulant 540 is formed between the second electronic element 520 and the circuit substrate 530 and encapsulating the first electronic elements 510 by conventional methods. Alternatively, the insulating encapsulant 540 can also be formed to encapsulate at least part of the circuit substrate 530, the first electronic elements 510 and the second electronic element 520, or completely encapsulate all of them by conventional methods, such as injection molding of epoxy resin.
Then, the leads (not shown in
It should be noted that the electronic package structure 500 further includes an electromagnetic-interference-shielding element (EMI-shielding element) 550 covering the first electronic elements 510. In the present embodiment, the EMI-shielding element 550 is disposed on the body 522 of the second electronic element 520, and is located between the body 522 of the second electronic element 520 and the circuit substrate 530. Therefore, during operation of the electronic package structure 500, it may be reduced by means of the EMI-shielding element 550 that electrical signals transmitted in the circuit substrate 530 is interfered by a magnetic force generated by the second electronic element 520 which functions as an inductive element.
In addition to the module 700, the system 70 includes an apparatus, such as a load 702, which receives a regulated voltage Vout from the module, and a filter capacitor (C) 704. Examples of the load 702 include an integrated circuit such as a processor or memory. In operation, a power-supply component, such as the controller 710 as shown in
Still referring to
In summary, in the aforementioned embodiments of the present invention, since the first electronic elements can be disposed in the cavity of the second electronic element or can be disposed on the second electronic element, or the second electronic element can be stacked on the first electronic elements, compared to the conventional electronic package structures, utilization of an internal space of the electronic package structure is relatively high, so that a size of the electronic package structure can be reduced.
It will be apparent to those skilled in the art that various modifications and variations can be made to the structure and method of the present invention without departing from the scope or spirit of the invention. In view of the foregoing, it is intended that the present invention cover modifications and variations of this invention provided they fall within the scope of the following claims and their equivalents.
Number | Date | Country | Kind |
---|---|---|---|
97105555 A | Feb 2008 | TW | national |
This application is a continuation-in-part of U.S. patent application Ser. No. 12/971,671 filed on Dec. 17, 2010, now U.S. Pub. No. 2011/0090648, which is a divisional of U.S. patent application Ser. No. 12/143,143 filed on Jun. 20, 2008, now U.S. Pub. No. 2009/0207574, now abandoned, which claims priority of Taiwan application Ser. No. 97105555 filed on Feb. 18, 2008. The entirety of the above-mentioned patent applications are hereby incorporated by reference herein and made a part of specification.
Number | Name | Date | Kind |
---|---|---|---|
4096581 | Carlo et al. | Jun 1978 | A |
5621635 | Takiar | Apr 1997 | A |
7560811 | Sakakibara et al. | Jul 2009 | B2 |
20010023983 | Kobayashi et al. | Sep 2001 | A1 |
20030031339 | Marshall et al. | Feb 2003 | A1 |
20030143971 | Hongo et al. | Jul 2003 | A1 |
20040130020 | Kuwabara et al. | Jul 2004 | A1 |
20040238857 | Beroz et al. | Dec 2004 | A1 |
20070215996 | Otremba | Sep 2007 | A1 |
20070247268 | Oya et al. | Oct 2007 | A1 |
20080029907 | Koduri | Feb 2008 | A1 |
20080150623 | Lin et al. | Jun 2008 | A1 |
20080179722 | Chen et al. | Jul 2008 | A1 |
20080180921 | Chen et al. | Jul 2008 | A1 |
20080303125 | Chen et al. | Dec 2008 | A1 |
20080309442 | Hebert | Dec 2008 | A1 |
20090057822 | Wen et al. | Mar 2009 | A1 |
Number | Date | Country | |
---|---|---|---|
20120262145 A1 | Oct 2012 | US |
Number | Date | Country | |
---|---|---|---|
Parent | 12143143 | Jun 2008 | US |
Child | 12971671 | US |
Number | Date | Country | |
---|---|---|---|
Parent | 12971671 | Dec 2010 | US |
Child | 13481887 | US |