Patent Application
20070023387
1. Technical Field
The invention relates to the field of wiring boards for electronic devices, and more particularly to methods for laminating multiple large-layer-count substrates with reliable mechanical and electrical connections.
2. Background Art
Multilayer substrates potentially offer the advantages of more efficient use of space in a circuit board design, but require more complex connection capability and circuit modularity. Significant problems exist in aligning, laminating, drilling and plating multilayer substrates, particularly for large-layer-count (LLC) substrates and substrates with high densities of electronic components.
While multilayer substrates typically offer the advantage of more efficient use of space in a circuit board design, multilayer substrates typically require more complex connection capabilities and circuit modularity. These complexities give rise to several problems. For one, it generally is difficult to establish an electrical interconnection between components of separate substrates because solder used in establishing connections may spread or migrate to other components causing electrical shorts. As a result, the failure of a single connection may cause an entire multilayer package to be discarded as incurably defective.
Known methods of joining layers of a LLC have been taught in U.S. Pat. Nos. 5,786,238; 5,986,339; 6,742,247; and 6,856,008.
While eliminating some of the problems discussed above, these techniques have a number of limitations such as mentioned above. It also is to be appreciated that printed wiring boards (PWBs) with plated solder bumps typically are difficult to handle as solder slivers may also separate from the plated bumps and cause problems in subsequent manufacturing operations unless the boards are reflowed to melt and secure the bumps.
Therefore, there is a need in the art for an improved process of interconnecting two or more independent substrates.
While the above cited references introduce and disclose a number of noteworthy advances and technological improvements within the art, none completely fulfills the specific objectives achieved by this invention.
The present invention permits the deposit and control of solder bumps used to establish electrical connections between various layers in a multi-layer printed circuit board.
In accordance with the present invention, a multi-layer printed circuit board or package includes a first multi-layer substrate layer that has a selected surface with electrical components for mating. The first substrate layer further includes conductive material formed into at least one first body or bump that is in electrical contact with the area selected for electrical interconnection on the first surface of the first multi-layer substrate. A dam network composed of a solder resist material is formed on the desired surface of the first multi-layer substrate to minimize undesired spreading of the conductive material of the first body.
A second multi-layer substrate layer having a second surface complementary to the selected first surface of the first substrate layer similarly includes conductive material formed into at least one second body or bump that is in electrical contact with the area selected for electrical interconnection on the surface of the second multi-layer substrate. A dam network composed of a solder resist material is formed on the desired surface of the second multi-layer substrate to minimize undesired spreading of the conductive material of the second body.
A bonding material or film is disposed between a first selected surface of the first multi-layer substrate and the second complementary surface of the second multi-layer substrate. The bonding material has at least one aperture formed substantially located between the first conductive material body and the complementary second conductive material body. An electrical connection is formed between the first conductive material body and the second conductive material body establishing the electrical interface between the substrates without an electrical short being formed by excess conductive material being squeezed into contact with an adjoining electrical component such as a via.
These and other objects, advantages and preferred features of this invention will be apparent from the following description taken with reference to the accompanying drawings, wherein is shown the preferred embodiments of the invention.
A more particular description of the invention briefly summarized above is available from the exemplary embodiments illustrated in the drawings and discussed in further detail below. Through this reference, it can be seen how the above cited features, as well as others that will become apparent, are obtained and can be understood in detail. The drawings nevertheless illustrate only typical, preferred embodiments of the invention and are not to be considered limiting of its scope as the invention may admit to other equally effective embodiments.
So that the manner in which the above recited features, advantages, and objects of the present invention are attained can be understood in detail, more particular description of the invention, briefly summarized above, may be had by reference to the embodiment thereof that is illustrated in the appended drawings. In all the drawings, identical numbers represent the same elements.
For illustrative purposes, the interface between only two sub-assemblies or layers and 12 of a known type of multi-layer printed circuit board 14 will be demonstrated. Additional layers subject to being interfaced may be used.
The present process can work with multiple laminations since the disclosed capture method precludes electrical shorts.
A multi-layer printed circuit board or package 14 includes a first multi-layer substrate layer 10 that has a selected surface 38a with electrical components 22 for mating. The first substrate layer 10 further includes conductive material 28 formed into at least one first body or bump 30a that is in electrical contact with an area selected for electrical interconnection generally on the first surface 38a of the first multi-layer substrate 10. A dam network 34 composed of a solder resist material 32 is formed on the desired surface 38 of the first multi-layer substrate 10 to minimize undesired spreading of the conductive material 28 of the first body 30a during the application of the conductive material 28 or during a subsequent bonding step.
A second multi-layer substrate layer 12 having a second surface 38b complementary to the selected first surface 38a of the first substrate layer 10 similarly includes conductive material 28 formed into at least one second body or bump 30b that is in electrical contact with an area selected for electrical interconnection generally on the surface 38b of the second multi-layer substrate 12. A dam network 34 composed of a solder resist material 32 is similarly formed on the desired surface 38 of the second multi-layer substrate 12 to minimize undesired spreading of the conductive material 28 of the second body 30b during the application of the conductive material 28 or during the bonding of the first multi-layer substrate layer 10 with the second multi-layer substrate layer 12.
A known bonding material or film 36 for securing or bonding the first multi-layer substrate layer 10 with the second multi-layer substrate layer 12 is disposed between first selected surface 38a of the first multi-layer substrate 10 and the second complementary surface 38b of the second multi-layer substrate 12. The bonding material 36 has a pattern formed with at least one aperture 40 formed in a manner or patter such that the hole is substantially located between the first conductive material body 30a and the complementary second conductive material body 30b when the two substrate layer halves or portions are joined.
An electrical connection is formed between the first conductive material body 30a and the second conductive material body 30b establishing the electrical interface between the substrates without an electrical short being formed by excess conductive material 28 being squeezed into contact with an adjoining electrical component such as a via 22.
During the lamination or bonding phase, a pressure and temperature are selected to be sufficient to melt the solder or other chosen conductive material of the first and second bodies. This creates an intermingling of two fluids that during a “freezing” period of the solder becoming a single joined body or contact. Even so, there are some systems that may require only intimate contact or a pressure contact rather than a “melting” of the conductive material. Such a pressure contact implies that the conductive material would not reflow or become fluid, and therefore, would have a mashed or compression type contact. Such would include any polymer thick films or other non-reflowable materials to do the same thing. Solder has been used simply as an example because of its ease of use.
The first and second dam networks 34 cooperating with the first surface 38a of the first multi-layer substrate 10 and the second complementary surface 38b of the second multi-layer substrate 12 form a sealed void about the first and second conductive material bodies 30a and 30b, respectively, for preventing undesired flow or movement of the material composing the conductive bodies during bonding of the first and second multi-layer substrate layers.
An alternative embodiment of the present invention may utilize a single dam network that is associated with either the first multi-layer substrate layer 10 or the second multi-layer substrate layer 12 such that the dam network 34 cooperates with the first surface 38a of the first multi-layer substrate 10 and the second complementary surface 38b of the second multi-layer substrate 12 when the layers are bonded to form a sealed void about the first and second conductive material bodies 30a and 30b, respectively, for preventing undesired flow or movement of the material composing the conductive bodies during bonding of the first and second multi-layer substrate layers.
Use of a single dam network 34 would still require a mask of some sort on the second sub-assembly or layer to prevent solder bridging between copper connections associated with the second or complementary layer. An important issue with multilayer printed circuit boards 14 is density of interconnections per square inch (cm or whatever measurement unit is named). Solder generally will wick along a “solderable surface” to an area of low pressure. Low pressure in a lamination package generally occurs between two closely spaced copper features. Thus, use of a single dam network may require an image of some type on the second sub-lamination to control the flow. Nevertheless, it is believed that the embodiment depicted generally in
Method of Manufacture
First, sub-laminations or printed circuit board layers 10 and 12 are to be completed through a known solder strip step or process. All surface solder should preferably be removed to allow for controlling the movement of solder on a selected surface 38 of the printed circuit board layer. It should also be understood that the sub-laminations can include, as is known in the art, filled or unfilled vias 22. To simplify the explanation of the present invention, the accompanying drawing figures show only vias 22 filled with an organic fill 24.
In
Any known suitable method may be used to create a cylindrical void 26 in the first stencil layer 20 for application of the solder paste 28. The method of forming the wells 26 may include, but is not limited to, drill, laser ablation, or photo-imaging. The chosen organic or inorganic stencil 20 is configured in combination with the above step to give necessary solder paste 28 volume for the specific project. See
With reference to
Next, the solder paste 28 is fused in accordance with the specifications for the solder paste to form a solder bump or body 30. See
Referring to
In
The size or dimensions of the dam network 34 is preferably selected in order to permit the interconnection of the first and second bodies when the first and second substrate layers are mated or joined.
The above described sequence is then repeated or duplicated on a matching or complementary sub-lamination 12 for the assembly into the completed multi-layer or laminated printed circuit board 14. See
The next step in forming the interfaced multi-layer printed circuit board 14 is bonding between the two ‘halves’ or layers 10 and 12 that is accomplished through a controlled lamination cycle using a known adhesive or low-flow prepreg material 36. The bonding material 36 has apertures 40 formed in it to allow for a body 28 on substrate layer to make contact with a complementary body 28 associated with substrate layer 12.
It is important that the gasket 34 formed from the solder resist material 32 pinches off available routes for the solder flow to take. The gasket or dam 34 directs any excess solder material, whether from over-pressure, thin bonding material, or excess solder paste to a safe ‘dump’ zone preventing any shorting issues between the various electrical components of the printed circuit board.
The foregoing disclosure and description of the invention are illustrative and explanatory thereof, and various changes in the size, shape and materials, as well as in the details of the illustrated construction may be made without departing from the spirit of the invention.
This application claims the benefit of U.S. Provisional Application Ser. No. 60/595,697, filed Jul. 28, 2005, entitled PRINTED CIRCUIT BOARD INTERCONNECTION AND METHOD.
| Number | Date | Country | |
|---|---|---|---|
| 60595695 | Jul 2005 | US |
