Claims
- 1. A process for manufacturing a semiconductor device, comprising the steps of:
- a) forming, on a single-crystalline semiconductor region of a substrate, a first insulating film having a first opening portion with a first lateral dimension for exposing the single-crystalline semiconductor region therethrough;
- b) forming, on the first insulating film, a second insulating film having a second opening portion with a second lateral dimension larger than the first lateral dimension, the second opening portion overlying the first opening portion for exposing the single-crystalline semiconductor region therethrough;
- c) applying a non-single-crystalline material on a sidewall inside of the second opening portion;
- d) growing a single-crystalline semiconductor body in the first and the second opening portions to have a portion on the first insulating film;
- e) introducing a dopant into the portion of the single-crystalline semiconductor body which is on the first insulating film to form spaced source and drain regions having a conductivity type opposite to a conductivity type of the single-crystalline semiconductor body; and
- f) forming a gate insulating film and a gate electrode on the single-crystalline semiconductor body between the source and drain regions.
- 2. Said process according to claim 1, wherein the non-single-crystalline material is amorphous silicon.
- 3. Said process according to claim 1, wherein the non-single-crystalline material is polycrystalline silicon.
- 4. Said process according to claim 1, wherein the non-single-crystalline material is further applied on a sidewall inside of the first opening portion.
- 5. Said process according to claim 1, wherein the non-single-crystalline material is further applied on the first insulating film within the second opening portion.
- 6. Said process according to claim 1, wherein after forming the single-crystalline semiconductor body, the second insulating film is removed.
- 7. Said process according to claim 1, wherein after forming the gate electrode, the source and drain regions are formed by ion implantation.
- 8. Said process according to claim 1, wherein the single-crystalline semiconductor body is formed by vapor phase epitaxial growth.
- 9. Said process according to claim 1, wherein after depositing amorphous silicon as the non-single-crystalline material in said step (c), the single-crystalline semiconductor body is formed by solid phase epitaxial growth.
- 10. Said process according to claim 1, wherein the substrate is a single-crystalline substrate and the single-crystalline semiconductor region of the substrate is formed by implanting ions into a surface of the single-crystalline substrate.
Priority Claims (3)
Number |
Date |
Country |
Kind |
3-97257 |
Apr 1991 |
JPX |
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3-97244 |
Apr 1991 |
JPX |
|
3-129506 |
May 1991 |
JPX |
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Parent Case Info
This application is a division of application Ser. No. 08/158,371 filed Nov. 29, 1993, now U.S. Pat. No. 5,428,237 which was a continuation of application Ser. No. 07/872,294 filed Apr. 22, 1992, now abandoned.
US Referenced Citations (7)
Foreign Referenced Citations (3)
Number |
Date |
Country |
0436038A1 |
Jul 1991 |
EPX |
58-3286A |
Jan 1983 |
JPX |
2-83980A |
Mar 1990 |
JPX |
Divisions (1)
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Number |
Date |
Country |
Parent |
158371 |
Nov 1993 |
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Continuations (1)
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Number |
Date |
Country |
Parent |
872294 |
Apr 1992 |
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