Claims
- 1. A process for producing a multi-layer printed wiring board comprising the steps of:
providing an inter-laminar adhesive film, wherein said inter-laminar adhesive film comprises a support film base layer and a resin composition that is solid at ambient temperatures; providing an internal-layer circuit board having an electric conductor layer pattern thereon; laminating said inter-laminar adhesive film to said internal-layer circuit board electric conductor layer pattern under lamination conditions; wherein, under said lamination conditions, said resin composition has a resin flow that is of the depth of a superficial via hole, if present, in the internal layer circuit; or the resin flow is ½-fold or more the depth of a through-hole, if present, in the internal-layer circuit board.
- 2. A process for producing a multi-layer printed wiring board comprising the steps of:
providing an inter-laminar adhesive film for laminating, wherein said adhesive film comprises a support film base layer and a resin composition that is solid at ambient temperatures; providing an internal-layer circuit board having an electrical conductor pattern thereon; laminating said inter-laminar adhesive film to the surface of the internal-layer circuit board by contacting the surface of the internal-layer circuit board with the resin composition layer under lamination conditions, including a lamination temperature and pressure, thereby adhering the inter-laminar adhesive film to the surface of the internal-layer circuit board; wherein at least 10% by weight of the resin composition layer comprises a resin having a softening point lower than the lamination temperature, and the resin composition has a thickness greater than a thickness of the electric conductor layer; and wherein, under the lamination conditions, the resin composition has a resin flow that:
(i) is at least of the thickness of the electric conductor, (ii) is at least the depth of a superficial via hole, if present, in the internal-layer circuit board, or (iii) is ½-fold or more the depth of a through-hole, if present, in the internal-layer circuit board singly or in combination with a superficial via hole.
- 3. A process for producing a multi-layer printed wiring board comprising the steps of:
providing an internal-layer circuit board having an electrical conductor pattern thereon; providing an inter-laminar adhesive film, which comprises a support film base layer and a layer of a resin composition that is solid at ambient temperature; laminating said inter-laminar adhesive film to the internal-layer circuit board by contacting the surface of the internal-layer circuit board with the resin composition layer under lamination conditions, including a lamination temperature and pressure, thereby adhering the inter-laminar adhesive film to the surface of the internal-layer circuit board; wherein said resin composition comprises:
(A) an epoxy resin that is liquid at ambient temperature; (B) a polyfunctional epoxy resin with a softening point higher than the lamination temperature and having two or more epoxy groups per epoxy resin molecule; and (C) a latent epoxy curing agent capable of initiating a reaction at a temperature higher than the lamination temperature.
- 4. The process of claim 3, wherein said resin composition further comprises from 10 to 55% by weight of the composition of a liquid resin other than the liquid epoxy resin (A) or an organic solvent or a combination thereof.
- 5. A process for producing a multi-layer printed wiring board comprising the steps of:
providing an internal-layer circuit board having an electric conductor pattern thereon; providing an inter-laminar adhesive film, which comprises a support film base layer and a resin composition that is solid at ambient temperature; laminating said inter-laminar adhesive film to the internal-layer circuit board by contacting the surface of the internal-layer circuit board with the resin composition layer under laminating conditions, including a lamination temperature and pressure, thereby adhering the inter-laminar adhesive film to the surface of the internal-layer circuit board; wherein said resin composition comprises:
(A) an epoxy resin that is liquid at ambient temperature; (B) a polyfunctional epoxy resin with a softening point lower than the lamination temperature and having two or more epoxy groups per epoxy resin molecule; (C) a latent epoxy curing agent capable of initiating a reaction at a temperature higher than the lamination temperature; and (D) a binder polymer with a weight average molecular weight within a range of 5,000 to 100,000.
- 6. The process of claim 5, wherein said resin composition further comprises from 10 to 55% of a liquid resin other than the liquid epoxy resin (A) or an organic solvent or a combination thereof; and wherein component (D) constitutes from 5 to 50% by weight of the composition.
- 7. The process according to claim 1, 2, 3, 4 or 5, wherein the resin composition further comprises (i) at least one scrubbing component selected from the group consisting of rubber components, amino resins, inorganic fillers, organic fillers, or (ii) at least one electroless plating catalyst selected from the group consisting of metals, metal compounds and inorganic compositions having metal or metal compounds absorbed or coated thereon, or a combination thereof, wherein the scrubbing component constitutes 5 to 40% by weight of the resin composition, and wherein the said electroless plating catalyst constitutes 0.05 to 3% by weight of the resin composition.
- 8. The process according to claim 1, 2, 3, 4, or 5, wherein said inter-laminar adhesive film comprises a layer of a scrubbable resin composition solid at ambient temperature interposed between said support film base layer and said solid resin composition, wherein said scrubbable resin composition comprises:
(a) a polyfunctional epoxy resin having two or more epoxy groups per epoxy resin molecule; (b) an epoxy curing agent; and (c) at least one scrubbing component selected from the group consisting of rubber components, amino resins, inorganic fillers, and organic fillers.
- 9. The process of claim 8, wherein said scrubbable resin composition further comprises an organic solvent.
- 10. The process according to claim 8, wherein said scrubbable resin composition further comprises at least one electroless plating catalyst selected from the group consisting of metals, metal compounds, and inorganic compositions having metal or metal compounds absorbed or coated thereon.
- 11. The process according to claim 1, 2, 3, 4 or 5 wherein said inter-laminar adhesive film comprises a layer of an additive resin composition solid at ambient temperature interposed between said support film base layer and said solid resin composition, wherein the additive resin composition comprises:
(a) a polyfunctional epoxy resin having two or more epoxy groups per epoxy resin molecule; (b) an epoxy curing agent; and (c) at least one electroless plating catalyst selected from the group consisting of metals, metal compounds, and inorganic compositions having metal or metal compounds absorbed or coated thereon.
- 12. The process according to claim 1, 2, 3, 4, or 5 wherein said process further comprises:
(i) peeling off the support base film layer and optionally thermally curing the resin composition subsequent to laminating the inter-laminar adhesive film, and (ii) laminating a copper foil on the optionally thermally cured adhesive layer by the use of heat or adhesive.
- 13. The process according to claim 1, 2, 3, 4, or 5 wherein said lamination conditions are selected from temperatures for contact bonding in the range of from 70 to 200° C., pressure in the range of from 1 to 10 kgf/cm2 and reduced pressures of 1 to 20 mmHg.
- 14. The process according to claim 13, wherein said process further comprises:
(i) peeling off the support base film and optionally, thermally curing the resin composition subsequent to laminating the inter-laminar adhesive film; and (ii) laminating a copper foil on the optionally thermally cured adhesive layer by the use of heat or adhesive.
- 15. The process according to claim 1, 2, 3, 4 or 5 wherein said process further comprises:
(i) peeling off the support base film and optionally thermally curing the resin composition subsequent to laminating the inter-laminar adhesive film; (ii) piercing the optionally cured resin composition by means of laser or drill; (iii) scrubbing the surface of the optionally cured resin composition by a dry process and optionally, a wet process; and (iv) forming a conductor layer as an upper layer thereof by dry plating and optionally wet plating.
- 16. The process according to claim 15, wherein said process further comprises:
(i) peeling off the support base film and optionally, thermally curing the resin composition subsequent to laminating the inter-laminar adhesive film; (ii) piercing the optionally cured resin composition by means of laser or drill; (iii) scrubbing the surface of the optionally cured resin composition by a dry process and optionally a wet process; and (iv) forming a conductor layer as an upper layer thereof by dry plating and optionally wet plating.
- 17. A multi-layer printed wiring board produced by the process of claim 1.
- 18. A multi-layer printed wiring board produced by the process of claim 2.
- 19. A multi-layer printed wiring board produced by the process of claim 3.
- 20. A multi-layer printed wiring board produced by the process of claim 4.
- 21. A multi-layer printed wiring board produced by the process of claim 5.
- 22. A multi-layer printed wiring board produced by the process of claim 8.
- 23. A multi-layer printed wiring board produced by the process of claim 11.
- 24. A multi-layer printed wiring board produced by the process of claim 12.
- 25. A multi-layer printed wiring board produced by the process of claim 13.
- 26. A multi-layer printed wiring board produced by the process of claim 15.
- 27. A multi-layer printed wiring board produced by the process of claim 16.
Priority Claims (3)
Number |
Date |
Country |
Kind |
188235/1997 |
Jul 1997 |
JP |
|
168632/1997 |
Jun 1997 |
JP |
|
348448/1996 |
Dec 1996 |
JP |
|
CROSS-REFERENCE TO RELATED APPLICATIONS
[0001] This is a divisional of U.S. application Ser. No. 09/721,664 filed Nov. 27, 2000; which is a continuation of U.S. application Ser. No. 08/999,332, filed Dec. 29, 1997, now abandoned.
Divisions (1)
|
Number |
Date |
Country |
Parent |
09721664 |
Nov 2000 |
US |
Child |
10080408 |
Feb 2002 |
US |
Continuations (1)
|
Number |
Date |
Country |
Parent |
08999332 |
Dec 1997 |
US |
Child |
09721664 |
Nov 2000 |
US |