Patent Application
20070085220
The present invention is related in general to the filed of semiconductor devices and processes and more specifically to structure and assembly method of high density solder ball grid array packages featuring high reliability.
During and after assembly of an integrated circuit (IC) chip to an external part such as a circuit board by solder reflow, and then during device operation, significant temperature differences and temperature cycles appear between the semiconductor chip and the board. This is especially true of flip-chip type mounting schemes. The reliability of the solder joint is strongly influenced by the coefficients of thermal expansion of the semiconductor material and the board material. For example, there is more than one order of magnitude difference between the coefficients of thermal expansion of silicon and FR-4. This difference causes thermo-mechanical stresses, most of which are absorbed by the solder joints.
Thermo-mechanical stress difficulties are aggravated by coplanarity problems of the solder balls and the difficulties involved in obtaining a favorable height-to-diameter ratio and uniformity of the solder interconnection. These difficulties start with the solder ball attach process. As an example, when solder paste is dispensed, the volume of solder paste may vary in volume, making it difficult to control the solder ball height. When prefabricated solder balls are used, the difficulty of avoiding a missed attachment site is well known.
Furthermore, evidence suggests that solder connections of short length and non-uniform width are unfavorable for stress distribution and strain absorption. The stress remains concentrated in the region of the chip-side solder joint, where it may lead to early material fatigue and crack phenomena. Accordingly, solder connections of generally spherical shape are likely to be more sensitive to stress than elongated connections.
The fabrication methods and reliability problems involving flip-chips re-appear, in somewhat modified form, for ball-grid array type packages, including chip-scale packages (CSP). Most CSP approaches are based on flip-chip assembly with solder bumps or solder balls on the exterior of the package, to interface with system or wiring boards.
Following the solder reflow step, flip-assembled chips and packages often use a polymeric underfill between the chip, or package, and the interposer, substrate, or printed circuit board (PCB). These underfill materials alleviate some of the thermo-mechanical stress caused by the mismatch of the coefficients of thermal expansion (CTE) of package components. But as a process step, underfilling is time-consuming and expensive, and is preferably avoided.
During the last decade, a number of variations in device structure, materials, or process steps have been implemented in manufacturing in order to alleviate the thermo-mechanical stress problem. All of them suffer from some drawback in cost, fabrication flow, material selection, and so forth.
Applicant realizes the need for a coherent, low-cost methodology of assembling flip-chip integrated circuit chips and semiconductor devices that provides a high degree of thermo-mechanical stress reliability. The methodology should be flexible enough to be applied for different semiconductor product families and a wide spectrum of design and process variations. Preferably, these innovations should be accomplished using the installed equipment base so that no investment in new manufacturing machines is needed.
One embodiment of the invention comprises a substrate, which has a sheet-like base of insulating material with first and second surfaces. A conductive terminal is on the first base surface. A reflow element is attached to the terminal. At least one elastic member is inside the element. This member is protruding from the terminal and shaped to withstand mechanical stress exerted on the element. The member may be formed as one or more straight pins, or as a pin with one or more bendings to enable spring-like reaction, or as a spring; the member may have a surface composition metallurgically suitable for solder attachment, such as nickel or palladium.
The second base surface may be suitable for the assembly of a semiconductor chip.
Another embodiment of the invention is a semiconductor device consisting of a substrate as described above and a semiconductor chip assembled on the second base surface. Further, the device may include encapsulation material surrounding the chip.
Another embodiment of the invention is an electronic system comprising a semiconductor device and a circuit board. The device consists of a sheet-like substrate of insulating material with first and second surfaces, a plurality of conductive terminals on the first base surface, at least one elastic member protruding from each terminal, the members enclosed by a reflow element attached to the respective terminal and shaped to withstand mechanical stress exerted on the element, and a semiconductor chip assembled on the second base surface. The circuit board has a plurality of conductive terminals in locations matching the locations of the terminals on the first base surface. Reflow elements are attached to the terminals on the first base surface and also to the terminals of the circuit board, one by one.
Another embodiment of the invention is a method for fabricating a substrate for the assembly of semiconductor devices. The method provides a sheet-like base of insulating material with first and second surfaces; the second surface may be suitable for the assembly of a semiconductor chip. A conductive terminal is then formed on the first base surface. At least one elastic member is attached to the terminal so that the at least one member protrudes from the terminal; the at least one member is shaped to withstand mechanical stress. A reflow element is finally attached to the terminal so that the element encloses the at least one member.
The technical advances represented by the invention, as well as the aspects thereof, will become apparent from the following description of the preferred embodiments of the invention, when considered in conjunction with the accompanying drawings and the novel features set forth in the appended claims.
As a typical example of the known technology, the schematic cross section of
The dimensions of terminal 102 are related to the need of creating a large enough interface between reflow element 103 and metal 102 to insure a reliable solder joint after reflow, especially when connection 100 is employed for attaching the substrate to a circuit board. Thermo-mechanical stresses are exerted in the attaching process as well as typically during the operation of the assembly. As a consequence of this reliability requirement, terminal 102 has to consume significant amounts of area. As a common example, terminal 102 has to be sized from about 50% to about 75% of the diameter 103a of the reflow element.
Experience has shown, however, that even with large-sized terminals, the reliability of the solder joints is often risky, especially in the recently required drop tests. FIGS. 2 to 6 illustrate embodiments of the present invention, which greatly enhance the reliability of solder reflow interconnections, even under the most demanding stress test conditions.
A reflow element 204 is attached to terminal 202. Preferred materials for element 204 are tin or a tin alloy, binary or ternary; other options include indium or an indium alloy. The diameter 204a of reflow element 204 is determined by the lateral dimensions of terminal 202.
Inside reflow element 204 is at least one elastic member 205, which protrudes from the terminal 202. Preferably, member 205 is electrically conductive; in other embodiments, it may be an insulator. In
In the embodiment of
The second surface 201b of the substrate base 201 is in many applications suitable for the assembly of a semiconductor chip. When semiconductor devices are fabricated by such assembly, the devices are typically attached in a subsequent assembly step to external boards using the reflow elements 204 for the attachment process. Since typically materials of widely different coefficients of thermal expansion are used in semiconductor devices and boards, thermo-mechanical stresses are exerted on the solder joints in the assembly steps as well as later by temperature excursions in device tests and operations. The solder joints in devices with solder connections strengthened by the pins of the invention illustrated in
Referring now to
Referring to the embodiment of
The concept of a spring-shaped elastic member is carried one step further by the embodiment of
Another embodiment of the invention is schematically illustrated in
Another embodiment of the invention is schematically illustrated
The semiconductor device has an insulating substrate 810 with first surface 810a and second surface 810b. A plurality of conductive terminals 811 are on first substrate surface 810a. At least one elastic member 812 is protruding from each terminal 811. The members are enclosed, at least partially, by a reflow element 803, which is attached to the respective terminal 811. The members 812 are shaped to withstand mechanical stresses exerted on the reflow element; in the example of
The circuit board 802 has a plurality of conductive terminals 820 in locations, which match the locations on the terminals 811 on the first substrate surface 810a.
The reflow elements 803, which are attached to the terminals 811 on the first substrate surface 810a, are also attached to the terminals 820 of the circuit board 802, one by one. It is this arrangement, which causes frequently significant amounts of thermo-mechanical stress on the solder joints, because of the differences in the coefficient of thermal expansion between the materials of the device 801 (especially the semiconductor chip) and the circuit board 802 (frequently a plastic-based material such as FR-4). The embodiment of
Another embodiment of the invention is a method for fabricating a substrate. A sheet-line substrate of insulating material is provided, which has first and second surfaces. Conductive terminals are formed on the first substrate surface. At least one elastic member is attached to each terminal so that this at least one member protrudes from the terminal. A preferred method is a brazing technique. The member is shaped to withstand mechanical stress. Finally, a reflow element such as a solder ball is attached to each terminal so that the element encloses the at least one member. The second surface of the substrate may be suitable for the assembly of a semiconductor chip.
Another embodiment of the invention is a method for assembling a semiconductor device. A sheet-line substrate of insulating material is provided, which has first and second surfaces. A plurality of conductive terminals is formed on the first substrate surface. At least one elastic member is attached to each terminal so that this at least one member protrudes from the terminal. A preferred method is a brazing technique. The member is shaped to withstand mechanical stress. Next, a semiconductor chip is provided. The chip is assembled on the second substrate surface. Finally, a reflow element such as a solder ball is attached to each terminal so that the element encloses the at least one member.
While this invention has been described in reference to illustrative embodiments, this description is not intended to be construed in a limiting sense. Various modifications and combinations of the illustrative embodiments, as well as other embodiments of the invention, will be apparent to persons skilled in the art upon reference to the description.
As an example, the base material of the substrate may be compliant instead of stiff; preferably, the temperatures used in the member brazing process remain within the elastic regime of the material.
As another example, the members may be heated to facilitate an easy solder reflow step associated with attaching the solder ball to the package.
As another example, the encapsulation compound may be added after the solder elements are attached.
It is therefore intended that the appended claims encompass any such modifications or embodiments.
