Claims
- 1. A method, for use in testing multiple integrated circuit modules, of assembling and disassembling a pressed joint between each integrated circuit module sequentially and a temperature regulating unit; said method including the steps of:providing each integrated circuit module with a first contact surface which consists of a first material, and providing said temperature regulating unit with a flat second contact surface which consists of a second material and which completely covers and extends continuously past said first contact surface; disposing on said second contact surface, a continuous layer of a thermal conductor which adheres in a solid state to said second material but not said first material and which is selected from the group of (1) a metal alloy and (2) a single metal; squeezing said first contact surface of one particular integrated circuit module directly against said second contact surface, while said continuous layer of thermal conductor on said second contact surface is in a liquid state, to thereby squeeze a portion of said thermal conductor from between said first and second contact surfaces onto an adjacent part of said second contact surface while keeping said layer continuous; testing said one particular integrated circuit module after said squeezing step while said continuous layer of said thermal conductor in on said second contact surface; separating said first contact surface of said one particular integrated circuit module from said second contact surface, after said testing step, while said continuous layer of said thermal conductor in said solid state on said second contact surface; heating, after said separating step, said continuous layer of thermal conductor on said second contact surface until said continuous layer melts; repeating said squeezing step, testing step, separating step, and heating step multiple times, using the same temperature regulating unit and a different integrated circuit module in each repetition.
- 2. The method according to claim 1 wherein heat is applied from an external source during said forming step to put said thermal conductor in said liquid state.
- 3. The method according to claim 1 wherein electrical power is dissipated in said one particular integrated circuit module during said forming step to put said thermal conductor in said liquid state.
- 4. The method according to claim 1 wherein said one particular integrated circuit module is tested by said testing step while said temperature regulating unit sends heat to said one particular integrated circuit module through said thermal conductor.
- 5. The method according to claim 1 wherein said one particular integrated circuit module is tested by said testing step while said temperature regulating unit receives heat from said one particular integrated circuit module through said thermal conductor.
- 6. The method according to claim 1 wherein said one particular integrated circuit module is tested by said testing step at temperatures where said thermal conductor stays in said solid state.
- 7. The method according to claim 1 wherein said one particular integrated circuit module is tested by said testing step at temperatures where said thermal conductor stays in said liquid state.
- 8. A The method according to claim 1 wherein said alloy is comprised of two or more metals selected from the group of lead, tin, bismuth, cadmium, indium, and antimony.
- 9. The method according to claim 1 wherein said alloy is comprised of two or more metals selected from the group of lead, tin, bismuth, cadmium, indium, and antimony that are mixed with non-metal particles.
- 10. A The method according to claim 1 wherein said first material is selected from the group of silicon dioxide and a ceramic; and said second material is selected from the group of copper, nickel and zinc.
CROSS-REFERENCES TO RELATED APPLICATION
This application shares a common Detailed Description with co-pending application, U.S. Ser. No. 08/986,772, filed Dec. 8, 1997, and now U.S. Pat. No. 6,108,208.
US Referenced Citations (18)
Foreign Referenced Citations (4)
Number |
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JP |
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Non-Patent Literature Citations (2)
Entry |
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Chip with Lengthened Solder Joints using Shape Memory Alloy, IBM Technical Disclosure, vol. 29, No. 12, p. 5213, May 1987. |