Semiconductor device and method of manufacturing the same

Abstract

A trench is formed extending from a surface of a hetero semiconductor region of a polycrystal silicon to the drain region. Further, a driving point of the field effect transistor, where a gate insulating film, the hetero semiconductor region and the drain region are adjoined, is formed at a position spaced apart from a side wall of the trench.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

The description herein makes reference to the accompanying drawings wherein like reference numerals refer to like parts throughout the several views, and wherein:

FIG. 1 is a cross-sectional view of a semiconductor device constructed in accordance with a first embodiment of the invention;

FIGS. 2 a to 2k are cross-sectional views for illustrating a method of manufacturing a semiconductor device constructed in accordance with the first embodiment;

FIG. 3 is a cross-sectional view of a semiconductor device constructed in accordance with a second embodiment of the invention;

FIG. 4 is a cross-sectional view of a semiconductor device constructed in accordance with a third embodiment of the invention;

FIG. 5 is a cross-sectional view of a semiconductor device constructed in accordance with a fourth embodiment of the invention;

FIG. 6 is a cross-sectional view of a semiconductor device constructed in accordance with a fifth embodiment of the invention;

FIG. 7 is a cross-sectional view of a semiconductor device constructed in accordance with a sixth embodiment of the invention;

FIGS. 8 a to 8f are cross-sectional views for illustrating a method of manufacturing a semiconductor device constructed in accordance with a seventh embodiment of the invention;

FIGS. 9 a to 9b are cross-sectional views for illustrating the characteristics of an isotropic etching;

FIGS. 10 a to 10d are cross-sectional views for illustrating a method of manufacturing a semiconductor device constructed in accordance with an eighth embodiment of the invention; and

FIGS. 11 a to 11d are cross-sectional views for illustrating a method of manufacturing a semiconductor device constructed in accordance with a ninth embodiment of the invention.

Claims

1. A semiconductor device, comprising: a semiconductor substrate of a first conductive-type, the semiconductor substrate having a trench formed therein;a heterojunction forming portion adjoined to a main surface of the semiconductor substrate and forming a heterojunction with the semiconductor substrate;a gate electrode disposed adjacent to a junction end of the heterojunction forming portion and the semiconductor substrate using a gate insulating film;a source electrode connected to the heterojunction forming portion;a drain electrode connected to the semiconductor substrate; anda driving point of the semiconductor substrate where the gate insulating film, the hetero semiconductor region and the semiconductor substrate are adjoined is at a position spaced apart from a side wall of the trench.

2. The semiconductor device according to claim 1 wherein the heterojunction forming portion around the driving point is of the first conductive-type.

3. The semiconductor device according to claim 1 wherein the semiconductor substrate comprises at least one of a silicon carbide, a gallium nitride and a diamond.

4. The semiconductor device according to claim 1 wherein the heterojunction forming portion comprises at least one of a single crystal silicon, a polycrystal silicon, an amorphous silicon, a single silicon germanium, a polycrystal silicon germanium and an amorphous silicon germanium.

5. A method of manufacturing a semiconductor device, comprising: depositing a hetero semiconductor region on a semiconductor substrate of a first conductive-type, wherein the hetero semiconductor region forms a heterojunction with the semiconductor substrate;forming a trench by selectively removing portions of the semiconductor substrate and the hetero semiconductor region by a dry etching;forming a sacrificial oxide film by thermally oxidizing the semiconductor substrate and the hetero semiconductor region forming at least a side wall of the trench;removing the sacrificial oxide film;forming a gate insulating film on an exposed surface of the semiconductor substrate and the hetero semiconductor region including an inner surface of the trench after removing the sacrificial oxide film;forming a gate electrode adjacent to a junction end of the semiconductor substrate and the hetero semiconductor region using the gate insulating film;forming a source electrode connected to the hetero semiconductor region; andforming a drain electrode connected to the semiconductor substrate; and wherein a device driving point where the gate insulating film, the hetero semiconductor region and the semiconductor substrate are adjoined is at a position spaced apart from a side wall of the trench.

6. The method according to claim 5 wherein forming the source electrode connected to the hetero semiconductor region occurs after forming the gate electrode.

7. The method according to claim 6 wherein forming the drain electrode connected to the semiconductor substrate occurs after forming the source electrode.

8. A method of manufacturing a semiconductor device, comprising: depositing a hetero semiconductor region on a semiconductor substrate of a first conductive-type, wherein the hetero semiconductor region forms a heterojunction with the semiconductor substrate;forming a trench by selectively removing the semiconductor substrate and the hetero semiconductor region by a dry etching;selectively etching the semiconductor substrate and the hetero semiconductor region by a wet etching, wherein the wet etching has different selecting ratios for the semiconductor substrate and the hetero semiconductor region;forming a gate insulating film in the semiconductor substrate and the hetero semiconductor region including an inner surface of the trench after selectively etching the semiconductor substrate and the hetero semiconductor region by the wet etching;forming a gate electrode adjacent to a junction end of the semiconductor substrate and the hetero semiconductor region using the gate insulating film;forming a source electrode connected to the hetero semiconductor region; andforming a drain electrode connected to the semiconductor substrate; and wherein a driving point of the semiconductor device where the gate insulating film, the hetero semiconductor region and the semiconductor substrate are adjoined is at a position spaced apart from a side wall of the trench.

9. The method according to claim 8 wherein forming the trench by selectively removing the semiconductor substrate and the hetero semiconductor region by the dry etching further includes selectively removing the semiconductor substrate and the hetero semiconductor region using a mask material, the method further comprising: reducing the mask material used in selectively removing the semiconductor substrate and the hetero semiconductor region prior to selectively etching the semiconductor substrate and the hetero semiconductor region by the wet etching.

10. The method according to claim 8 wherein forming the drain electrode connected to the semiconductor substrate occurs after forming the gate electrode.

11. The method according to claim 10 wherein forming the source electrode connected to the hetero semiconductor region occurs after forming the gate electrode and before forming the drain electrode.

12. A method of manufacturing a semiconductor device, comprising: depositing a hetero semiconductor region on a first conductive-type semiconductor substrate, wherein the hetero semiconductor region forms a heterojunction with the semiconductor substrate;forming a trench by selectively removing the hetero semiconductor region by a dry etching, wherein a bottom surface of the trench is a junction interface of the semiconductor substrate and the hetero semiconductor region;forming a sacrificial oxide film by thermally oxidizing the semiconductor substrate and the hetero semiconductor region forming at least an inner portion of the trench;removing the sacrificial oxide film;forming a gate insulating film on the semiconductor substrate and the hetero semiconductor region including the inner surface of the trench after removing the sacrificial oxide film;forming a gate electrode adjacent to a junction end of the semiconductor substrate and the hetero semiconductor region using the gate insulating film;forming a source electrode connected to the hetero semiconductor region; andforming a drain electrode connected to the semiconductor substrate; and wherein a driving point of the semiconductor device where the gate insulating film, the hetero semiconductor region and the semiconductor substrate are adjoined is formed at a position spaced apart from a side wall of the trench before forming the sacrificial oxide film.

13. The method according to claim 12 wherein forming the source electrode connected to the hetero semiconductor region occurs after forming the gate electrode.

14. The method according to claim 12 wherein forming the drain electrode connected to the semiconductor substrate occurs after forming the gate electrode.

15. A method of manufacturing a semiconductor device, comprising: depositing a hetero semiconductor region on a first conductive-type semiconductor substrate, wherein the hetero semiconductor region forms a heterojunction with the semiconductor substrate;forming a trench wherein a bottom portion of the trench extends to the semiconductor substrate and a thickness of a portion of the hetero semiconductor region around the trench is smaller than a thickness of other portions of the hetero semiconductor region, wherein forming the trench includes selectively removing the semiconductor substrate and the hetero semiconductor region by an isotropic etching;forming a sacrificial oxide film by thermally oxidizing at least the hetero semiconductor region after forming the trench;selectively removing the portion of the hetero semiconductor region around the trench smaller that the thickness of the other portions by removing the sacrificial oxide film;forming the gate insulating film on the semiconductor substrate and the hetero semiconductor region including an inner surface of the trench after removing the sacrificial oxide film;forming a gate electrode adjacent to a junction end of the semiconductor substrate and the hetero semiconductor region using the gate insulating film;forming a source electrode connected to the hetero semiconductor region; andforming a drain electrode connected to the semiconductor substrate; and wherein a driving point of the semiconductor device where the gate insulating film, the hetero semiconductor region and the semiconductor substrate are adjoined is at a position spaced apart from a side wall of the trench.

16. The method according to claim 15 wherein forming the trench further comprises: performing an anisotropic etching by using a mask pattern used in the isotropic etching after performing the isotropic etching; andselectively removing the semiconductor substrate and the hetero semiconductor region after performing the anisotropic etching and before forming the sacrificial oxide film.

17. The method according to claim 15 wherein forming the trench further comprises: selectively removing, through an anisotropic etching, an edge portion of a mask pattern used by the isotropic etching; andselectively removing the semiconductor substrate and the hetero semiconductor region using the mask pattern after the anisotropic etching and before forming the sacrificial oxide film.

18. The method according to claim 17 wherein the mask pattern includes a resist material and an edge portion thereof is formed in a taper form by an exposure or development process.

19. The method according to claim 15 wherein the isotropic etching is a wet etching or a chemical dry etching.

20. The method according to claim 15 wherein the semiconductor substrate comprises at least one of a silicon carbide, a gallium nitride and a diamond, and wherein the hetero semiconductor region comprises at least one of a single crystal silicon, a polycrystal silicon, an amorphous silicon, a single silicon germanium, a polycrystal silicon germanium and an amorphous silicon germanium.