Patent Application
20120199919
This invention relates to a semiconductor device, which has a high-permittivity insulating film and a metal gate electrode, a method of manufacturing the semiconductor device, and a manufacturing program, and relates particularly to a technique for improving the performance of an MOSFET (Metal Oxide Semiconductor Field Effect Transistor).
In advanced CMOS (complementary MOS) device development realized miniaturization of a transistor, deterioration of a drive current due to depletion of a polysilicon (poly-Si) electrode and increase in gate current due to thinning of a gate insulating film become problems. Thus, there has been studied a complex technology for preventing the depletion of the electrode by the application of a metal gate, and, at the same time, increasing a physical film thickness by using a high permittivity material in a gate insulating film to thereby reduce gate leak current. For example, a pure metal, a metal nitride, or a silicide material has been considered as a material used in a metal gate electrode. However, in any case, a threshold value voltage (Vth) of an N-type MOSFET (MOS field-effect transistor) and a P-type MOSFET must be able to be set to an appropriate value. When a conventional gate electrode with interposition of a polycrystalline silicon layer is used, the threshold value voltage of a transistor is determined by an impurity concentration of a channel region and an impurity concentration in the polycrystalline silicon film. Meanwhile, when a metal gate electrode is used, the threshold value voltage of the transistor is determined by the impurity concentration of the channel region and a work function of a gate electrode. To realize a threshold voltage (Vth) of a CMOS transistor (a gate voltage at which drain current stops flowing in a CMOS transistor) of not more than ±0.5V, for the N-type MOSFET, a material with a work function of not more than the mid-gap of Si (4.6 eV), preferably not more than 4.4 eV is required to be used in the gate electrode, and for the P-type MOSFET, a material with a work function of not less than the mid-gap of Si (4.6 eV), preferably not less than 4.8 eV is required to be used in the gate electrode.
As one of means for achieving such gate electrodes, the use of titanium nitride (TiN) as a metal gate electrode material has been researched.
For example, Patent Document 1 discloses, as a method of changing the work function of TiN, a technique for changing the work function by a nitrogen concentration of titanium nitride, using a gate electrode having a stacked structure of high-melting-point metals such as TiN and tungsten. The Patent Document 1 discloses that according to this method, the work function can be reduced by the increase of the flow ratio of nitrogen gas in the formation of TiN by ion implantation of nitrogen into a TiN film and reactive sputtering and by the increase of the percentage of nitrogen contained in the TiN film. The Patent Document 1 further discloses that the nitrogen content percentage in the reactive sputtering is 100%, so that the crystalline orientation of the TiN film is changed to (200) substantially, whereby TiN with a low work function suitable for a gate electrode of an N-type channel MOSFET can be obtained.
Patent Document 2 discloses an apparatus for manufacturing a semiconductor device, which is capable of suppressing variations in the work function of a gate electrode by aligning the plane directions of a metal gate electrode of a portion in contact with a gate insulating film so that variations in the threshold of a transistor are reduced. The Patent Document 2 discloses that the work function of TiN is changed by the surface orientation (crystalline orientation of a surface) of TiN, and the work function is 4.3 eV in the (100) orientation (crystalline orientation) and is 4.6 eV in the (111) orientation (crystalline orientation).
Patent Document 3 discloses a method using a gate electrode having a stacked structure of polycrystalline silicon, PVD-TiN (second metal layer), and CVD-TiN (first metal layer). The Patent Document 3 discloses that according to this method, TiN which is the first metal layer is formed at a low temperature of not more than 450° C. by a thermal CVD method using TiCl4 and NH3, whereby gate leak current can be reduced by suppressing damage to a gate insulating film, and TiN suitable for a metal gate of the P-type MOSFET and having a work function of 4.8 eV can be realized. The Patent Document 3 further discloses that TiN which is the second metal layer is formed at 500° C. (higher than the temperature when TiN as the first metal layer is formed) by a PVD method, whereby TiN oriented in a (100) plane is formed. The Patent Document 1 further discloses that a gate electrode in which diffusion of silicon from polycrystalline silicon is suppressed by the PVD-TiN (second metal layer) can be obtained.
Patent Document 4 discloses that the device characteristics of a semiconductor device comprising a gate electrode having a stacked structure of TiN and tungsten and a high-permittivity gate insulating film (hafnium nitride silicate film) are improved by allowing TiN to have a film density of not less than 5.0 g/cm3, a crystal structure with a (100) orientation, and a film composition (Ti/N) of 1.0 to 1.2 so that cross reaction between TiN and the high-permittivity gate insulating film can be inhibited.
Patent Document 1: Japanese Patent Application Laid-Open No. 2001-203276 (FIGS. 1 and 5)
Patent Document 2: Japanese Patent No. 3540613 (FIGS. 1 and 4)
Patent Document 3: Japanese Patent Application Laid-Open No. 2008-16538 (FIGS. 1, 14, and 15)
Patent Document 4: Japanese Patent Application Laid-Open No. 2009-59882
However, the above techniques have the following problems.
The method described in the Patent Document 1 is an effective technique capable of controlling the work function by the nitrogen concentration of titanium nitride. However, this method uses a silicon nitride film or a silicon oxynitride film as the gate insulating film, therefore does not state the film composition and crystalline orientation of the TiN film suitable for the high- permittivity gate insulating film.
The method of controlling the surface orientation (crystalline orientation of a surface) of the TiN film described in the Patent Document 2 does not state the film composition for obtaining the optimal work function.
Further, the method disclosed in the Patent Document 3 using a laminate of a TiN film formed by CVD and a TiN film formed by PDV is a technique effective at obtaining TiN having a high work function, but has a problem that there is no description about the film density, crystalline orientation, and film composition of the TiN film (second metal layer) in a region in contact with a gate insulating film, by which work function is determined.
Further, the method disclosed in the Patent Document 4 for optimizing the film density, crystal structure (orientation), film composition of a TiN film is effective in that reaction between TiN and a gate insulating film is inhibited, but has a problem that there is no description about the film density, crystal structure (orientation), and film composition of TiN for achieving an optimum work function.
In order to solve the above-mentioned problems associated with the conventional techniques, it is an object of this invention to provide a semiconductor device which includes a high-permittivity insulating film as a gate insulating film and a gate electrode having a metal nitride layer containing Ti and N and which is capable of improving its element characteristics by optimizing the film composition, film density, and crystalline orientation of TiN and a method for manufacturing such a semiconductor device.
In order to achieve the above object, this invention provides the following.
A semiconductor device, which comprises a field-effect transistor provided on a silicon substrate and having a gate insulating film and a gate electrode provided on the gate insulating film,
wherein the gate insulating film has a high-permittivity insulating film formed of a metal oxide, a metal silicate, a metal oxide introduced with nitrogen, or a metal silicate introduced with nitrogen,
the gate electrode includes at least a metal nitride layer containing Ti and N,
and at least a part which is in contact with the gate insulating film of the metal nitride layer has a molar ratio between Ti and N (N/Ti ratio) of not less than 1.15 and a film density of not less than 4.7 g/cc.
A method for manufacturing a semiconductor device, which comprises a field-effect transistor provided on a silicon substrate and having a gate insulating film which has a high-permittivity insulating film formed of a metal oxide, a metal silicate, a metal oxide introduced with nitrogen, or a metal silicate introduced with nitrogen and a gate electrode which has a metal nitride layer provided on the gate insulating film and containing Ti and N,
the method comprising the step of forming a metal nitride layer having a molar ratio between Ti and N (N/Ti ratio) of not less than 1.15 and a film density of not less than 4.7 g/cc in at least a part which is in contact with a gate insulating film thereof.
According to this invention, it is possible to achieve a work function suitable particularly for a p-type MOSFET without deteriorating the electric characteristics of an element by controlling the film composition, film density, and preferably, crystalline orientation of TiN.
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Hereinafter, embodiments of this invention will be described in detail based on the drawings.
The present inventors have extensively studied the structure of a titanium nitride film having a high work function in a field-effect transistor element including a high-permittivity gate insulating film and a gate electrode composed of a metal nitride layer containing Ti and N. As a result, the present inventors have newly found a gate electrode that can achieve a high work function, without deteriorating the performance of an element, by using, in at least apart which is in contact with the gate insulating film of its metal nitride layer, a titanium nitride film having a molar ratio between Ti and N (N/Ti ratio) of not less than 1.15, a film density of not less than 4.7 g/cc, and, preferably, a crystalline orientation X of 1.1<X<1.8.
In this invention, the “crystalline orientation” means a ratio between a (200) peak intensity and a (111) peak intensity (C(200)/C(111)) in an X-ray diffraction spectrum of a metal nitride layer containing Ti and N.
The molar ratio between Ti and N (N/Ti ratio), film density, and, preferably, crystalline orientation X of one metal nitride layer included in the gate electrode may be either uniform or nonuniform in the metal nitride layer as long as they are within their respective ranges mentioned above in at least a part which is in contact with the gate insulating film of the metal nitride layer.
An embodiment of a titanium nitride film in this invention for use in realizing a high work function will be described using, as an example, a MIS (Metal Insulator Semiconductor) capacitor element of
A high-permittivity material used in the gate insulating film 2 is a material having a relative permittivity larger than the relative permittivity of SiO2 (3.9) and includes a metal oxide, a metal silicate, a metal oxide introduced with nitrogen, and a metal silicate introduced with nitrogen. Preferred is a high-permittivity film introduced with nitrogen in terms of suppressing crystallization and improving the reliability of an element. As a metal in the high-permittivity material, preferred is Hf or Zr in terms of the heat resistance of a film and the suppression of fixed charge in a film. As the high-permittivity material, preferred are a metal oxide containing Hf or Zr and Si and a metal oxynitride which is the metal oxide further containing nitrogen, and more preferred are HfSiO and HfSiON. In this embodiment, although a silicon oxide film and a high-permittivity film stacked on the silicon oxide film are used as the gate insulating film 2, the embodiment is not limited thereto, and a high-permittivity insulating film can be used alone, or silicon oxynitride film and the high-permittivity film stacked on the silicon oxide film can be used.
A film-formation treatment chamber 100 can be heated to a predetermined temperature by a heater 101. A treated substrate 102 can be heated to a predetermined temperature by a heater 105 through a susceptor 104 incorporated into a substrate support pedestal 103. It is preferable that the substrate support pedestal 103 can be rotated at a predetermined rotation number in terms of uniformity of film thickness. In the film-formation treatment chamber, a target 106 is provided at a position facing the treated substrate 102. The target 106 is provided at a target holder 108 through a back plate 107 formed of metal such as Cu. A form of a target assembly obtained by combining the target 106 and the back plate 107 is formed, as a single component, of a target material, and the form may be attached as a target. Namely, the target may be provided at a target holder. A DC source (DC power supply means) 110 applying power for sputtering discharge is connected to the target holder 108 formed of metal such as Cu, and the target holder 108 is insulated from the wall of the film-formation treatment chamber 100 at a ground potential by an insulator 109. A magnet 111 for use in realizing magnetron-sputtering is provided behind the target 106 as viewed from a sputtering surface. The magnets 111 may be aligned in any manner that generates magnetic flux lines (magnetic flux). The magnets 111 are held by a magnet holder 112 and can be rotated by a magnet holder rotation mechanism (not shown). To uniform erosion of a target, the magnets 111 rotate during discharge. The target 106 is provided at an offset position obliquely upward from the substrate 102. Namely, a center point of the sputtering surface of the target 106 is located at a position deviating by a predetermined dimension from the normal of the center point of the substrate 102. A shield 116 is provided between the target 106 and the treated substrate 102 to control film formation on the treated substrate 102 by sputtering particles emitted from the target 106 receiving electric power.
The Ti metal target 106 is used as a target. A titanium nitride film is deposited by supplying electric power to the metal target 106 by the DC power supply 110 through the target holder 108 and the back plate 107. At this time, an inert gas from an inert gas source (inert gas introduction means) 201 is introduced from near the target into the film-formation treatment chamber 100 through a valve 202, a mass flow controller 203, and a valve 204. A reactive gas comprising nitrogen is introduced from a nitrogen gas source (reactive gas introduction means) 205 to near the substrate in the film-formation treatment chamber 100 through a valve 206, a mass flow controller 207, and a valve 208. The introduced inert gas and reactive gas are discharged by an exhaust pump 118 through a conductance valve 117.
In the deposition of the titanium nitride film 3 in this invention, argon is used as a sputtering gas, and nitrogen is used as a reactive gas. The substrate temperature can be suitably determined within a range of 27° C. to 600° C., the target power can be suitably determined within a range of 50 W to 1000 W, a sputtering gas pressure can be suitably determined within a range of 0.2 Pa to 1.0 Pa, an Ar flow rate can be suitably determined within a range of 0 sccm to 100 sccm (0 Pa·m3/sec to 1.69×10−1 Pa·m3/sec), and a nitrogen gas flow rate can be suitably determined within a range of 0 sccm to 100 sccm (0 Pa·m3/sec to 1.69×10−1 Pa·m3/sec). In this embodiment, in the deposition of the titanium nitride film 3, the substrate temperature is set to 30°, the target power of Ti is set to 750 W, the sputtering gas pressure is set to 0.2 Pa, the argon gas flow rate is changed within a range of 0 sccm to 20 sccm (0 Pa·m3/sec to 3.38×10−2 Pa·m3/sec), and the nitrogen gas flow rate is changed within a range of 2 sccm to 50 sccm (3.38×10−3 Pa·m3/sec to 8.45×10−2 Pa·m3/sec). The molar ratio between Ti elements and N elements in the titanium nitride film and the crystalline orientation are regulated by the blend ratio between argon and nitrogen introduced in the sputtering, using a controller 400 shown in
Next, a silicon film 4 of 20 nm is deposited on the deposited titanium nitride film 3 by a sputtering method.
Next, the TiN film is processed to have a desired size using a lithography technique and an RIE (Reactive Ion Etching) technique, and an element is formed.
The composition of the deposited titanium nitride film is analyzed by X-ray photoelectron spectroscopy (XPS). The crystalline orientation of the titanium nitride film is analyzed by an X-ray diffraction (XRD) method. The film density is analyzed by an X-ray reflectivity technique (X-ray Reflect meter). Further, the electric properties including an effective work function, EOT (Equivalent Oxide Thickness, representing an SiO2 equivalent film-thickness), and leak current characteristics are evaluated by C-V, I-V measurement. In this specification, the “effective work function” is generally obtained by a flat band by CV measurement between a gate insulating film and a gate electrode and is influenced by not only the original work function of the gate electrode but also a fixed charge in the insulating film, a dipole formed at the interface, a Fermi level pinning and so on. The effective work function is distinguished from the original “work function” of a material constituting the gate electrode (the energy required for taking an electron from Fermi level to vacuum level). It can be considered that, in the Patent Documents 1 to 4, the “work function” is used in the sense of effective work function because there is a phrase “work function on the insulating film”. It is to be noted that in this specification, the effective work function (which will be described later) was determined from a flat band obtained by C-V measurement for a gate insulating film and a gate electrode.
Next, EOT (oxide film equivalent film thickness) will be described. Regardless of the kind of insulating film, it is supposed that an insulating film material is a silicon oxide film, and an electric film thickness of an insulating film obtained by calculating back from the capacity is referred to as the oxide film equivalent film thickness. Namely, when the relative permittivity of the insulating film is εh, the relative permittivity of the silicon oxide film is εo, and the thickness of the insulating film is dh, the oxide film equivalent film thickness de is represented by the following formula (1):
de=dh×(εo/ε) (1)
The formula (1) shows that when a material having a permittivity εh larger than the relative permittivity εo of the silicon oxide film is used in the insulating film, the oxide film equivalent film thickness de is equivalent to the silicon oxide film thinner than the film-thickness dh of the insulating film. The relative permittivity εo of the silicon oxide film is approximately 3.9. Thus, for example, in a film constituted of a high-permittivity material in which εh=39, even if the physical film thickness dh is 15nm, the oxide film equivalent film thickness (electric film thickness) de is 1.5 nm, and while the capacity value of the insulating film is kept equal to that of the silicon oxide film with a film-thickness of 1.5 nm, the leak current can be significantly reduced.
Thus, to obtain the work function of not less than 4.6 eV suitable for the P-type MOSFET, the N/Ti ratio is preferably not less than 1.15, and to obtain the work function of not less than 4.9 eV, the N/Ti ratio is preferably not less than 1.2. In the titanium nitride film in this invention, since the effective work function value is increased in accordance with the increase of the film composition (molar ratio) (N/Ti ratio), the titanium nitride film in this invention and the titanium nitride described in the Patent Document 1 (the effective work function is reduced with the increase of the film composition (molar ratio) (N/Ti ratio)) are widely different in the phenomenon.
According to the above results, to realize the effective work function suitable for the P-type MSFET, the molar ratio between Ti and N (N/Ti) of the metal nitride layer in this invention is preferably not less than 1.15, and particularly not less than 1.2. Further, to realize the effective work function suitable for the P-type MSFET and to prevent the deterioration of the element electric properties, the peak intensity ratio X of C[200]/C[111] in the XRD spectrum representing the crystalline orientation of the metal nitride layer is preferably within a range of 1.1<X<1.8. Furthermore, to prevent the deterioration of the element characteristics due to oxidation, the film density is preferably not less than 4.7 g/cc, and particularly not less than 4.8 g/cc.
Further, to suppress a change in the gate shape caused by side etching in an etching process of the gate electrode, the film thickness of the metal nitride layer in this invention is preferably not more than 20 nm but not less than 1 nm, and particularly not more than 10 nm but not less than 1 nm.
On the metal nitride layer containing Ti and N according to this invention, preferably on the entire surface of the metal nitride layer, a metal containing film containing at least one selected from TaN, W, WN, Si, and Al is preferably deposited to suppress oxidation due to exposure to the atmosphere.
Furthermore, to suppress the deterioration of the element characteristics due to plasma damage to the gate insulating film and to control the composition and the crystalline orientation, the deposition of the titanium nitride film in this invention is, as shown in
Furthermore, to improve throughput and suppress the oxidation of the titanium nitride film caused by air exposure, it is preferable to perform the process of forming a metal nitride layer and the process of depositing a metal containing film containing at least one selected from TaN, W, WN, Si, and Ai on the metal nitride layer continuously in a vacuum atmosphere
Furthermore, in the above description, although the element having the gate insulating film using the silicon oxide film and the HfSiO film as a high-permittivity film has been described, this invention is not limited thereto, and the high-permittivity material used in the gate insulating film is a material having a relative permittivity larger than the relative ratio of SiO2 (3.9) and includes a metal oxide, a metal silicate, a metal oxide introduced with nitrogen, and a metal silicate introduced with nitrogen. In terms of the suppression of crystallization and the improvement of the reliability of the element, preferred is a high-permittivity film introduced with nitrogen. As a metal in the high-permittivity material, preferred is Hf or Zr in terms of the heat resistance of a film and the suppression of fixed charge in a film. As the high-permittivity material, preferred are a metal oxide containing Hf or Zr and Si and a metal oxynitride which is the metal oxide further containing nitrogen, and more preferred are HfSiO and HfSiON. In this embodiment, although the silicon oxide film and the high-permittivity film stacked on the silicon oxide film are used as the gate insulating film, this invention is not limited thereto, and a high-permittivity insulating film can be used alone, or silicon oxynitride film and the high-permittivity film stacked on the silicon oxynitride film can be used.
Furthermore, in the above description, although there has been described the element in which the titanium nitride film are formed on the p-type silicon substrate having on its surface the gate insulating film using the silicon oxide film and the HfSiO film as a high-permittivity film, this invention is not limited thereto. Also in the MOSFET element having the gate electrode shown in
Next, a controller of the processing apparatus of
In this invention, the blend ratio between an inert gas such as argon gas and a reactive gas composed of nitrogen, which are introduced during sputtering film formation, is controlled by the controller 400 so that at least a part which is in contact with the gate insulating film of the metal nitride layer has a molar ratio between Ti and N (N/Ti ratio) of not less than 1.15 and a film density of not less than 4.7 g/cc, and preferably, a crystalline orientation X of 1.1<X<1.8.
A manufacturing program of this invention is recorded in a computer (PC) readable recording medium and installed in the storage part 602 of the controller 600. Examples of the recording medium include a magnetic recording medium such as a floppy™ disk and ZIP™, a magneto-optical medium such as MO, and an optical disk such as CD-R, DVD-R, DVD+R, DVD-RAM, DVD+RW™, and PD. Examples of the recording medium further include a flash memory system such as a Compact Flash™, a SmartMedia™, a Memory Stick™, and an SD card and a removable disk such as a Microdrive™ and a Jaz™.
The manufacturing program of this invention installed in the storage part 402 is a program for manufacturing a semiconductor device which comprises a field-effect transistor provided on a silicon substrate and having a gate insulating film which has a high-permittivity insulating film formed of a metal oxide, a metal silicate, a metal oxide introduced with nitrogen, or a metal silicate introduced with nitrogen and a gate electrode which has a metal nitride layer provided on the gate insulating film and containing Ti and N.
The program according to this invention causes a computer to execute the procedure of forming a metal nitride layer having a molar ratio between Ti and N (N/Ti ratio) of not less than 1.15 and a film density of not less than 4.7 g/cc in at least a part which is in contact with the gate insulating film thereof.
More specifically, the procedure of forming a metal nitride layer is a procedure of magnetron-sputtering a Ti target under a mixed atmosphere of a reactive gas composed of nitrogen and an inert gas. In this procedure, when at least apart which is in contact with the gate insulating film of a metal nitride layer is formed, the blend ratio between the reactive gas and the inert gas is controlled so that the molar ratio between Ti and N (N/Ti ratio) is not less than 1.15 and the film density is not less than 4.7 g/cc.
As a procedure for forming the gate insulating film, the manufacturing program of this invention may further have a procedure for heating a silicon substrate and depositing a metal film on a treated substrate by physical vapor deposition using a target and a procedure for supplying a gas containing an element oxidizing the metal film and oxidizing the metal film by a thermo-oxidative reaction to form a high-permittivity insulating film.
A first example of this invention will be described in detail with reference to the drawings.
Next, the TiN film is processed to have a desired size using a lithography technique and an RIE (Reactive Ion Etching) technique.
The composition of the deposited titanium nitride film is analyzed by X-ray photoelectron spectroscopy (XPS). The crystalline orientation of the titanium nitride film is analyzed by an X-ray diffraction (XRD) method. The film density is analyzed by an X-ray reflectivity technique (X-ray reflect meter). The electric properties including the effective work function, EOT, and leak current characteristics are evaluated by C-V, I-V measurement.
Here, the evaluation results of the gate electrode having a stacked structure of a metal nitride layer containing Ti and N and a Si film are shown, but it is confirmed that the same effect can be obtained also by using, as a gate electrode, a single metal nitride layer containing Ti and N or a stacked film comprising a metal nitride film and a metal containing film containing at least one selected from TaN, W, WN, and Al.
Also in an HfSiO film deposited as a gate insulating film by the CVD method, it is confirmed that similar effects are obtained.
After the deposition of HfSiO, even when an HfSiON film formed by a radical nitriding treatment is used as a gate insulating film, it is confirmed that similar effects are obtained.
Even when a material containing Zr as a gate insulating film and selected from a group consisting of ZrSiO, ZrSiON, HfZrSiO, and HfZrSiON is used, it is confirmed that similar effects are obtained.
A second example of this invention will be described in detail with reference to the drawings.
a) to 12(c) are views showing processes of a method of manufacturing a semiconductor device shown in
Next, a titanium nitride film 304 of 2 nm to 10 nm is deposited on the gate insulating film 303 by the same method as in the example 1. In the titanium nitride film 304, the blend ratio between the argon gas flow rate and the nitrogen gas flow rate is regulated using a Ti metal target, whereby the molar ratio between Ti and N is not less than 1.15, the film density is not less than 4.7 g/cc, and the crystalline orientation X has a range of 1.1<X<1.8.
Next, a silicon layer 305 with a film thickness of 20 nm is deposited, and thereafter, as shown in
Further, as shown in
As a result of evaluation of the electric properties of the produced element, it is confirmed that the effective work function (not less than 4.6 eV) suitable for the P-type MOSFET can be obtained without deterioration of EOT and leak current.
Further, it is confirmed that the same effect can be obtained also by using a metal containing film containing at least one selected from TaN, W, WN, and Al instead of the silicon film 305.
Also in an HfSiO film deposited as a gate insulating film by the CVD method, it is confirmed that similar effects are obtained.
After the deposition of HfSiO, even when an HfSiON film formed by the radical nitriding treatment is used as a gate insulating film, it is confirmed that similar effects are obtained.
Even when a material containing Zr as a gate insulating film and selected from a group consisting of ZrSiO, ZrSiON, HfZrSiO, and HfZrSiON is used, it is confirmed that similar effects are obtained.
As described above, also in the MOSFET element in this embodiment, it is confirmed that the effects of this invention are obtained.
1 silicon substrate
2 gate insulating film
3 gate electrode
4 silicon
5 silicon substrate
6 gate insulating film
7 titanium nitride film
8 silicon film
100 film-formation treatment chamber
101 heater
102 treated substrate
103 substrate support pedestal
104 susceptor
105 heater
106 metal target
107 back plate
108 target holder
109 insulator
110 DC source
111 magnet
112 magnet holder
116 shield
117 conductance valve
118 exhaust pump
201 inert gas source
202 valve
203 mass flow controller
204 valve
205 reactive gas source
206 valve
207 mass flow controller
208 valve
301 silicon substrate
302 element isolation region
303 gate insulating film
304 metal nitride layer
305 silicon layer
306 extension region
307 gate side wall
308 source/drain region
| Number | Date | Country | Kind |
|---|---|---|---|
| 2009-176177 | Jul 2009 | JP | national |
| Filing Document | Filing Date | Country | Kind | 371c Date |
|---|---|---|---|---|
| PCT/JP2010/004803 | 7/29/2010 | WO | 00 | 4/23/2012 |
