Semiconductor device manufacturing method

Abstract

After gate insulating film formation films are formed in an element formation region of a semiconductor substrate, a gate electrode formation film is formed on the gate insulating film formation films. A fluorine-containing insulting film is formed on the gate electrode formation film. Then, thermal treatment is performed to diffuse and introduce the fluorine contained in the fluorine-containing insulating film to interfaces between the semiconductor substrate and the gate insulting film formation films.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1A to FIG. 1D are sections showing main steps of a semiconductor device manufacturing method according to Embodiment 1 of the present invention.

FIG. 2A to FIG. 2C are sections showing main steps of the semiconductor device manufacturing method according to Embodiment 1 of the present invention.

FIG. 3A to FIG. 3C are sections showing main steps of the semiconductor device manufacturing method according to Embodiment 1 of the present invention.

FIG. 4A to FIG. 4D are sections showing main steps of a semiconductor device manufacturing method according to Embodiment 2 of the present invention.

FIG. 5A to FIG. 5C are sections showing main steps of the semiconductor device manufacturing method according to Embodiment 2 of the present invention.

FIG. 6A to FIG. 6C are sections showing main steps of the semiconductor device manufacturing method according to Embodiment 2 of the present invention.

FIG. 7A to FIG. 7D are sections showing main steps of a semiconductor device manufacturing method according to Embodiment 3 of the present invention.

FIG. 8A to FIG. 8C are sections showing main steps of the semiconductor device manufacturing method according to Embodiment 3 of the present invention.

FIG. 9A to FIG. 9C are sections showing main steps of the semiconductor device manufacturing method according to Embodiment 3 of the present invention.

Claims

1. A semiconductor device manufacturing method, comprising the steps of: (a) forming a gate insulating film formation film in an element formation region on a semiconductor substrate;(b) forming a gate electrode formation film on the gate insulating film formation film;(c) forming a fluorine-containing insulting film on the gate electrode formation film; and(d) diffusing and introducing, by thermal treatment, fluorine contained in the fluorine-containing insulating film to an interface between the semiconductor substrate and the gate insulting film formation film.

2. The semiconductor device manufacturing method of claim 1, further comprising the step of: (x) implanting fluorine to the gate electrode formation film after the step (b) and before the step (c),wherein the step (d) includes a step of diffusing and introducing the fluorine implanted in the gate electrode formation film to the interface between the semiconductor substrate and the gate insulating film formation film.

3. The semiconductor device manufacturing method of claim 1, further comprising the steps of: (e) removing the fluorine-containing insulating film after the step (d);(f) forming a gate insulting film and a gate electrode by patterning the gate insulating film formation film and the gate electrode formation film; and(g) forming an extension region in a region of the semiconductor substrate which is located below each side of the gate electrode after the step (f).

4. The semiconductor device manufacturing method of claim 3, further comprising the step of: (h) forming a sidewall on each side of the gate electrode after the step (g); and(i) forming a source/drain region in a region of the semiconductor substrate which is located below each side of the sidewall after the step (h).

5. The semiconductor device manufacturing method of claim 2, further comprising the steps of: (e) removing the fluorine-containing insulating film after the step (d);(f) forming a gate insulting film and a gate electrode by patterning the gate insulating film formation film and the gate electrode formation film; and(g) forming an extension region in a region of the semiconductor substrate which is located below each side of the gate electrode after the step (f).

6. The semiconductor device manufacturing method of claim 5, further comprising the step of: (h) forming a sidewall on each side of the gate electrode after the step (g); and(i) forming a source/drain region in a region of the semiconductor substrate which is located below each side of the sidewall after the step (h).

7. The semiconductor device manufacturing method of claim 1, wherein the step (a) includes a step of forming a first gate insulating film formation film as a part of the gate insulating film formation film in a first region in the element formation region and forming a second gate insulating film formation film as the other part of the gate insulting film formation film in a second region other than the first region in the element formation region, andthe step (b) includes a step of forming a first gate electrode formation film as a part of the gate electrode formation film on the first gate insulating formation film and forming a second gate electrode formation film as the other part of the gate electrode formation film on the second gate insulating film formation film.

8. The semiconductor device manufacturing method of claim 7, further comprising the step of: (x) implanting fluorine to one of the first gate electrode formation film and the second gate electrode formation film after the step (b) and before the step (c),wherein the step (d) includes a step of diffusing and introducing the fluorine implanted in the step (x) to an interface between the semiconductor substrate and the first gate insulating film formation film or the second gate insulating film formation film which is located below the one of the gate electrode formation films.

9. The semiconductor device manufacturing method of claim 7, further comprising the steps of: (e) removing the fluorine-containing insulating film after the step (d);(f) forming a first gate insulating film and a first gate electrode by patterning the first gate insulating film formation film and the first gate electrode formation film and a second gate insulating film and a second gate electrode by patterning the second gate insulating film formation film and the second gate electrode formation film; and(g) forming an extension region in a region of the semiconductor substrate which is located below each side of the first gate electrode and forming a LDD region in a region of the semiconductor substrate which is located below each side of the second gate electrode after the step (f).

10. The semiconductor device manufacturing method of claim 9, further comprising the steps of: (h) forming a first sidewall on each side of the first gate electrode and a second sidewall on each side of the second gate electrode after the step (g); and(i) forming a first source/drain region in a region of the semiconductor substrate which is located below each side of the first sidewall and a second source/drain region in a region of the semiconductor substrate which is located below each side of the second sidewall after the step (h).

11. The semiconductor device manufacturing method of claim 8, further comprising the steps of: (e) removing the fluorine-containing insulating film after the step (d);(f) forming a first gate insulating film and a first gate electrode by patterning the first gate insulating film formation film and the first gate electrode formation film and a second gate insulating film and a second gate electrode by patterning the second gate insulating film formation film and the second gate electrode formation film; and(g) forming an extension region in a region of the semiconductor substrate which is located below each side of the first gate electrode and forming a LDD region in a region of the semiconductor substrate which is located below each side of the second gate electrode after the step (f).

12. The semiconductor device manufacturing method of claim 11, further comprising the steps of: (h) forming a first sidewall on each side of the first gate electrode and a second sidewall on each side of the second gate electrode after the step (g); and(i) forming a first source/drain region in a region of the semiconductor substrate which is located below each side of the first sidewall and a second source/drain region in a region of the semiconductor substrate which is located below each side of the second sidewall after the step (h).