BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1A is a plan view illustrating a structure of a semiconductor device according to a first embodiment of the present invention;
FIG. 1B is a sectional view illustrating the structure of the semiconductor device according to the first embodiment of the present invention;
FIG. 2A is a plan view illustrating a structure of a semiconductor device according to a second embodiment of the present invention;
FIG. 2B is a sectional view illustrating the structure of the semiconductor device according to the second embodiment of the present invention;
FIG. 3A is a plan view illustrating a structure of a semiconductor device according to a third embodiment of the present invention;
FIG. 3B is a sectional view illustrating the structure of the semiconductor device according to the third embodiment of the present invention;
FIG. 4A is a plan view illustrating a structure of a semiconductor device according to a fourth embodiment of the present invention;
FIG. 4B is a sectional view illustrating the structure of the semiconductor device according to the fourth embodiment of the present invention; and
FIG. 5 is a sectional view illustrating a structure of an electrode pad in a conventional semiconductor device.