This application is based upon and claims the benefit of priority from Japanese Patent Application No. 2022-146063, filed on Sep. 14, 2022; the entire contents of which are incorporated herein by reference.
Embodiments relate to a semiconductor device.
A semiconductor device is required to have a wide safe operating area (SOA).
According to one embodiment, a semiconductor device includes a base member, a semiconductor chip, and a first conductive member. The base member includes a first surface, a second surface, and a protrusion, the second surface being at a side opposite to the first surface. The protrusion is provided at the second surface side, and protrudes in a first direction perpendicular to the second surface. The semiconductor chip being mounted on the second surface of the base member via a first connection member. The semiconductor chip includes a first electrode, a second electrode, a control pad, and a semiconductor part. The first electrode is provided on a back surface of the semiconductor part. The first connection member is connected to the first electrode. The second electrode and the control pad are provided on a front surface of the semiconductor part, the front surface being at a side opposite to the back surface of the semiconductor part. The control pad is apart from the second electrode. The semiconductor part is positioned between the first electrode and the second electrode and between the first electrode and the control pad. The first conductive member is bonded on the second electrode of the semiconductor chip via a second connection member. The semiconductor chip includes a space between the second electrode and the control pad at the front surface side of the semiconductor part. The semiconductor chip is mounted so that the protrusion of the base member and the space between the second electrode and the control pad overlap in the first direction. The space between the second electrode and the control pad includes a first portion and a second portion. The first portion extends along the front surface of the semiconductor part in a second direction; and the second portion extends along the front surface of the semiconductor part in a third direction crossing the second direction. The first portion of the space has a first long-side length in the second direction; and the second portion of the space has a second long-side length in the third direction. The protrusion of the base member has a first length in the second direction and a second length in the third direction. The first length of the protrusion is equal to or greater than the first long-side length of the first portion of the space between the second electrode and the control pad. The second length of the protrusion is equal to or greater than the second long-side length of the second portion of the space between the second electrode and the control pad.
Embodiments will now be described with reference to the drawings. The same portions inside the drawings are marked with the same numerals; a detailed description is omitted as appropriate; and the different portions are described. The drawings are schematic or conceptual; and the relationships between the thicknesses and widths of portions, the proportions of sizes between portions, etc., are not necessarily the same as the actual values thereof. The dimensions and/or the proportions may be illustrated differently between the drawings, even in the case where the same portion is illustrated.
There are cases where the dispositions of the components are described using the directions of XYZ axes shown in the drawings. The X-axis, the Y-axis, and the Z-axis are orthogonal to each other. Hereinbelow, the directions of the X-axis, the Y-axis, and the Z-axis are described as an X-direction, a Y-direction, and a Z-direction. Also, there are cases where the Z-direction is described as upward and the direction opposite to the Z-direction is described as downward.
The semiconductor device 1 is, for example, a MOS transistor for power control. The semiconductor device 1 includes, for example, a semiconductor chip 10, a base member 20, a first terminal 30, a second terminal 40, a first conductive member 50, and a second conductive member 60.
As shown in
The first terminal 30 is electrically connected to the semiconductor chip 10 via the first conductive member 50. The first conductive member 50 is, for example, a plate-shaped metal connector. The second terminal 40 is electrically connected to the semiconductor chip 10 via the second conductive member 60. The second conductive member 60 is, for example, a plate-shaped metal connector. Alternatively, the second conductive member 60 may be, for example, a metal wire.
As shown in
The first electrode 13 is, for example, the drain electrode of the MOS transistor. The second electrode 15 is, for example, the source electrode of the MOS transistor. The control pad 17 is electrically connected to, for example, the gate electrode (not illustrated) of the MOS transistor. The gate electrode, for example, is provided between the semiconductor part 11 and the second electrode 15.
The base member 20 includes a back surface 20B (a first surface) and a front surface 20F (a second surface). The front surface 20F is positioned at the side opposite to the back surface 20B. The semiconductor chip 10 is mounted on the front surface 20F of the base member 20 via a first connection member 25. The first connection member 25 is, for example, a solder material. The first electrode 13 of the semiconductor chip 10 is connected to the first connection member 25. The semiconductor chip 10 is electrically connected to the base member 20 via the first connection member 25.
The first conductive member 50 is connected to the second electrode 15 via a second connection member 55. The second connection member 55 is, for example, a solder material. The first conductive member 50 is electrically connected to the second electrode 15 via the second connection member 55.
The second conductive member 60 is connected to the control pad 17 via a third connection member 65. The third connection member 65 is, for example, a solder material. The second conductive member 60 is electrically connected to the control pad 17 via the third connection member 65. When a metal wire is used as the second conductive member 60, the second conductive member 60 is directly bonded on the control pad 17.
As shown in
In the semiconductor device 1, the first connection member 25 is provided with a thickness T1 in the Z-direction between the semiconductor chip 10 and the protrusion 20p of the base member 20 and a thickness T2 in the Z-direction between the base member 20 and the second connection member 55. The thickness T1 is less than the thickness T2. Thereby, even when voids are generated in the first connection member 25 during the process of mounting the semiconductor chip 10 on the base member 20, it is possible to prevent a void positioned between the semiconductor chip 10 and the protrusion 20p. Although, in the reflow process of mounting the semiconductor chip 10 on the base member 20, for example, small voids may collect to form a large void, such voids do not form between the semiconductor chip 10 and the protrusion 20p and do not move into a position between the semiconductor chip 10 and the protrusion 20p.
On the other hand, in a semiconductor device 4 according to a comparative example shown in
There may be a case where the first connection member 25 includes a void Vd, for example, when the semiconductor chip 10 has a large size in the X-direction and the Y-direction. Such a void Vd partially inhibits the thermal conduction from the semiconductor chip 10 to the base member 20.
As shown in
As shown in
In contrast, in the semiconductor device 1 according to the embodiment, the protrusion 20p of the base member 20 is provided below the space between the first conductive member 50 and the second conductive member 60. Thereby, it is possible to prevent the void Vd from being positioned below the space between the first conductive member 50 and the second conductive member 60. Accordingly, the wide SOA is maintained in the semiconductor device 1.
As shown in
The first conductive member 50 is connected to the second electrode 15 of the semiconductor chip 10 via the second connection member 55. Also, the first conductive member 50 is connected to the first terminal 30 via a fourth connection member 33. The fourth connection member 33 is, for example, a solder material. The first conductive member 50 is connected to the semiconductor chip 10 preferably at the entire surface of the second electrode 15 other than the outer edge of the second electrode 15 (see
As shown in
The control pad 17 is apart from the second electrode 15. The space between the second electrode 15 and the control pad 17 includes, for example, a first portion 17fs extending in the X-direction, and a second portion 17ss extending in the Y-direction. The first portion 17fs has a space-length Lsx in the X-direction and a short-side width Wsy in the Y-direction. The second portion 17ss has a long-side length Lsy in the Y-direction and a short-side width Wsx in the X-direction.
As shown by the broken line in
As shown in
The base member 20 may further include another protrusion 20s. The protrusion 20s has a size smaller in the X-direction and the Y-direction than the size of the protrusion 20p. The protrusions 20s are provided below, for example, three corners of the four corners of the semiconductor chip 10 other than the corner positioned on the protrusion 20p. Thereby, the semiconductor chip 10 can be mounted without tilting on the front surface 20F of the base member 20 (see
When the semiconductor chip 10 is mounted so that tilting with respect to the front surface 20F of the base member 20, it is difficult to connect the first conductive member 50 on the semiconductor chip 10. Also, the escape rout of air remaining between the semiconductor chip 10 and the first connection member 25 is constrained, and the void Vd easily occurs in the first connection member 25. Such a defect can be avoided by providing the protrusions 20s.
As shown in
As shown in
As shown in
As shown in
By providing such a protrusion 20p, the first connection member 25 can move away from the protrusion 20p while mounting the semiconductor chip 10. Thereby, the void Vd can move away from the region beneath the space between the second connection member 55 and the third connection member 65 (see
As shown in
As shown in
As shown in
The second portion 20sp of the protrusion 20p has a width Wpx in the X-direction that is greater than the short-side width Wsx in the X-direction of the second portion 17ss of the space between the second electrode 15 and the control pad 17. The first portion 20fp of the protrusion 20p has a width Wpy in the Y-direction that is greater than the short-side width Wsy in the Y-direction of the first portion 17fs of the space between the second electrode 15 and the control pad 17.
Such a protrusion 20p has the planer shape that matches the space between the second connection member 55 and the third connection member 65 (see
While certain embodiments have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the inventions. Indeed, the novel embodiments described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions and changes in the form of the embodiments described herein may be made without departing from the spirit of the inventions. The accompanying claims and their equivalents are intended to cover such forms or modifications as would fall within the scope and overview of the invention.
Number | Date | Country | Kind |
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2022-146063 | Sep 2022 | JP | national |