The instant application relates to packaged semiconductor devices and in particular relates to packaged semiconductor devices with sensor devices.
Many applications such as automotive and industrial applications utilize semiconductor packages to accommodate high voltage loads. These semiconductor packages can include power devices such as diodes, IGBTs (insulated gate bipolar transistors), MOSFETs (metal oxide semiconductor field effect transistors), HEMTs (high electron mobility transistors), etc. These semiconductor packages can be configured as discrete components or may be configured as power converter circuits such as single and multi-phase half-wave rectifiers, single and multi-phase full-wave rectifiers, voltage regulators, etc. It is desirable to monitor the operational state of the power devices within a discrete semiconductor package for a variety of reasons, e.g., preventing failure, improving switching behavior, etc. Current solutions for incorporating sense circuitry into the package may involve making unwanted tradeoffs, such as a larger package size and/or decreased performance. It is therefore desirable to provide a semiconductor package that can monitor the operational state of the devices at minimal expense and impact on package size.
A semiconductor package is disclosed. According to an embodiment, the semiconductor package comprises a lead frame that comprises a die pad and a first lead extending away from the die pad, a semiconductor die mounted on the die pad, a load path connection that electrically connects a first load terminal of the semiconductor die with the first lead, and a magnetic sensor arrangement mounted directly on a region of the lead frame which forms part of the load path connection, wherein the magnetic sensor arrangement comprises a magnetic current sensor that is configured to measure a current flowing through the load path connection and an electrical isolation layer that electrically isolates the magnetic current sensor from the lead frame.
A method of producing a semiconductor package is disclosed. According to an embodiment, the method includes providing a lead frame that comprises a die pad and a first lead extending away from the die pad, mounting the semiconductor die on the die pad, providing a load path connection that electrically connects a first load terminal of the semiconductor die with the first lead, and mounting a magnetic sensor arrangement directly on a region of the lead frame which forms part of the load path connection, wherein the magnetic sensor arrangement comprises a magnetic current sensor that is configured to measure a current flowing through the load path connection and an electrical isolation layer that electrically isolates the magnetic current sensor from the lead frame.
Those skilled in the art will recognize additional features and advantages upon reading the following detailed description, and upon viewing the accompanying drawings.
The elements of the drawings are not necessarily to scale relative to each other. Like reference numerals designate corresponding similar parts. The features of the various illustrated embodiments can be combined unless they exclude each other. Embodiments are depicted in the drawings and are detailed in the description which follows.
Embodiments of a semiconductor package with an advantageous sensor arrangement and method of producing the semiconductor package are disclosed herein. The semiconductor package includes a lead frame structure with a die pad and a plurality of leads. A semiconductor die is mounted on the die pad. The semiconductor package comprises a load path connection between a first load terminal of the semiconductor die and one or more of the leads. The load path connection is provided at least in part by a section of the lead frame with a planar mounting surface. A magnetic sensor arrangement is mounted directly on this planar mounting surface. The magnetic sensor arrangement comprises a magnetic sensor that measures an electrical current flowing through the load path connection and provides the measurement signal to an independent sense lead of the semiconductor package. Because the magnetic sensor arrangement is mounted directly on the load path connection, an accurate measurement of the load current is possible. Moreover, the direct mounting of the magnetic sensor arrangement eliminates the need for a separate laterally isolated structure to accommodate a current sensor. This allows for load current sensing with minimal or no impact on package size. The magnetic sensor arrangement includes an electrical isolation layer between the lead frame and the magnetic sensor. The electrical isolation layer can be designed to withstand high voltage gradients and thus allows for sensing of a high voltage load connection.
Referring to
Referring to
A semiconductor die 118 is mounted on the die pad 106. According to an embodiment, the semiconductor die 118 is configured as a discrete power device that is rated to accommodate voltages of at least 100 V (volts), e.g., voltages of 600 V, 1200 V or more and/or are rated to accommodate currents of at least 1 A, e.g., currents of 10 A, 50 A, 100 A or more. These discrete power devices may include diodes, transistors, thyristors, junction field effect transistors, etc. In a particular example, the semiconductor die 118 is configured as a power transistor die, for example MOSFET (Metal Oxide Semiconductor Field Effect Transistor), IGBTs (Insulated Gate Bipolar Transistor), and HEMT (High Electron Mobility Transistor), etc.
The semiconductor die 118 comprises a first load terminal (not shown) disposed on a lower surface of the semiconductor die 118 that faces the die pad 106. The first load terminal may be electrically connected to the die pad 106 by a conductive material, e.g., solder, sinter, conductive glue, etc. The semiconductor die 118 additionally comprises a second load terminal 120 and a gate terminal 121 disposed on an upper surface of the semiconductor die 118 that faces away from the die pad 106. The second load terminal 120 of the semiconductor die 118 is electrically connected to the group of second leads 114 by an interconnect element 122. Additionally, the second load terminal 120 of the semiconductor die 118 is electrically connected to one of the sensing leads 112 by an interconnect element 122. The first terminal and the second load terminal 120 of the semiconductor die 102 correspond to the voltage blocking terminals of the device, e.g., source and drain in the case of a MOSFET, collector and emitter in the case of an IGBT, etc. The gate terminal 121 of the semiconductor die 118 is electrically connected to the gate lead 116 by one of the interconnect elements 122.
The semiconductor package 100 is configured to control a load voltage applied between the group of first leads 110 and the group of second leads 112. A fixed voltage, e.g., +600V, +1200V, etc., may be applied to the group of second leads 112 with a load being connected with the group of first leads 110. In a commonly known manner, the ON/OFF state of the semiconductor die 102 can be controlled via the gate lead 116. The sensing leads 116 are configured to provide information about an operational state of the semiconductor die 118. The sensing lead 116 connected with the second load terminal 120 can be used to determine a load voltage, while the sensing leads 116 connected with the magnetic sensor device 128 can be used to determine a load current in a manner to be described below.
The semiconductor package 100 comprises a load path connection 124 that electrically connects the first load terminal of the semiconductor die 118 with the group of first leads 110. The load path connection 124 refers to the electrically conductive structure or structures that complete the electrical connection between the first load terminal of the first semiconductor die 118 and the first leads 110. The load path connection 124 therefore conducts the output current of the semiconductor die 118 that can drive an external load connected with the group of first leads 110. The load path connection 124 comprises sections of the lead frame 108 arranged between the semiconductor die 118 and the exposed portions of the first leads 104. The load path connection 124 may optionally comprise one or more metal interconnect elements 122, e.g., metal clips, ribbons, wires, etc.
In the depicted embodiment, the die pad 106 forms part of the load path connection 124. In this case the semiconductor die 118 is configured as a vertical device with the first load terminal of the semiconductor die 118 facing and electrically connected with the die pad 106. The die pad 106 therefore conducts a load current of the semiconductor die 118.
In the depicted embodiment, the lead frame 108 comprises a sensor pad 126 that is smaller than the die pad 106 and is arranged between the die pad 106 and the group of first leads 110. The sensor pad 126 forms part of the load path connection 124. The sensor pad 126 merges with each of the leads 104 from the group of first leads 110 and merges with the die pad 106. That is, the lead frame 108 is configured to comprise a single continuous metal structure that conducts the load current from the semiconductor die 118 to the leads 104. Other configurations are possible. For example, the sensor pad 126 may be laterally spaced apart from the die pad 106 and/or the leads 104. In that case, an electrical interconnect element 122 may, e.g., metal clips, ribbon, wire, etc., may be attached between the sensor pad 126 and the die pad 106 and/or the leads 104 to complete the load path connection 124.
The semiconductor package 100 comprises a magnetic sensor arrangement 128 that is mounted on a directly on a region of the lead frame 108 which forms part of the load path connection 124. Thus, the magnetic sensor arrangement 128 is attached to a conductive structure that carries the load current. The magnetic sensor arrangement 128 comprises a magnetic current sensor 130. A magnetic current sensor 130 refers to a type of sensor device that measures the magnitude of an electrical current flowing through an electrical conductor by measuring the electromagnetic field produced by the electrical current. In contrast to other types of current sensors that perform a direct measurement of an electrical current, the indirect nature of magnetic current measurement minimizes the parasitic impact of the sensor. According to an embodiment, the magnetic current sensor 130 is a TMR (tunnel magneto-resistance) current sensor, which refers to a type of magnetic current sensor 130 with a magnetic material that changes in electrical resistance in response to a magnetic field. Other embodiments of the magnetic current sensor 130 include hall sensors, inductive sensors and anisotropic magnetoresistance (AMR) sensors, for example.
The magnetic sensor arrangement 128 is configured to measure the current flowing through the load path connection 124. As shown, the terminals of the magnetic sensor may be electrically connected to the sensing leads 112 by interconnect elements 122, thereby providing the measurement signal from the magnetic sensor at these sensing leads 112. Because the magnetic sensor arrangement 128 is mounted directly on a portion of the lead frame 108 that accommodates the load current, an accurate measurement of the load current is obtained, as the magnetic current sensor 130 is in close proximity to the magnetic field generated by the load current.
As shown in
Referring to
The semiconductor package 100 shown in
Referring to
Referring to
Although the present disclosure is not so limited, the following numbered examples demonstrate one or more aspects of the disclosure.
Example 1. A semiconductor package, comprising a lead frame that comprises a die pad and a first lead extending away from the die pad; a semiconductor die mounted on the die pad; a load path connection that electrically connects a first load terminal of the semiconductor die with the first lead; and a magnetic sensor arrangement mounted directly on a region of the lead frame which forms part of the load path connection, wherein the magnetic sensor arrangement comprises a magnetic current sensor that is configured to measure a current flowing through the load path connection and an electrical isolation layer that electrically isolates the magnetic current sensor from the lead frame.
Example 2. The semiconductor package of example 1, wherein the first load terminal is disposed on a lower surface of the semiconductor die that faces and electrically connects with the die pad, and wherein the die pad forms part of the load path connection.
Example 3. The semiconductor package of example 2, wherein the lead frame comprises a sensor pad that is smaller than the die pad and is arranged between the die pad and the first lead, wherein the sensor pad forms part of the load path connection, and wherein the magnetic sensor arrangement is mounted directly on the sensor pad.
Example 4. The semiconductor package of example 3, wherein the sensor pad merges with the first lead.
Example 5. The semiconductor package of example 4, wherein the sensor pad merges with the die pad.
Example 6. The semiconductor package of example 3, wherein the sensor pad is spaced apart from the die pad.
Example 7. The semiconductor package of example 1, wherein the lead frame comprises a second lead extending away from the lead frame, and wherein the magnetic current sensor is electrically connected to the second lead.
Example 8. The semiconductor package of example 1, wherein the magnetic current sensor is a tunnel magneto-resistance effect sensor.
Example 9. The semiconductor package of example 1, wherein the first semiconductor die is a power device that is rated to block voltages of at least 100V.
Example 10. The semiconductor package of example 9, wherein the electrical isolation layer comprises glass.
Example 11. The semiconductor package of example 1, wherein the lead frame further comprises a second die pad that is spaced apart from the die pad, wherein the semiconductor package further comprises a second semiconductor die mounted on the second die pad, and wherein the load path connection electrically connects a second load terminal of the semiconductor die with the first lead.
Example 12. The semiconductor package of example 11, wherein the semiconductor package is configured as a discrete half-bridge, and wherein the first and second semiconductor dies form a high-side switch and a low-side switch, respectively, of the discrete half-bridge.
Example 13. A method of producing a semiconductor package, the method comprising: providing a lead frame that comprises a die pad and a first lead extending away from the die pad; mounting the semiconductor die on the die pad; providing a load path connection that electrically connects a first load terminal of the semiconductor die with the first lead; and mounting a magnetic sensor arrangement directly on a region of the lead frame which forms part of the load path connection, wherein the magnetic sensor arrangement comprises a magnetic current sensor that is configured to measure a current flowing through the load path connection and an electrical isolation layer that electrically isolates the magnetic current sensor from the lead frame.
Example 14. The method of example 13, wherein mounting the magnetic sensor arrangement comprises placing the electrical isolation layer directly on the region of the lead frame which forms part of the load path connection and mounting the magnetic current sensor directly on the electrical isolation layer.
Example 15. The method of example 14, wherein the electrical isolation layer comprises glass.
Example 16. The method of example 13, wherein the semiconductor die is mounted such that the first load terminal is disposed on a lower surface of the semiconductor die that faces and electrically connects with the die pad.
Example 17. The method of example 13, wherein the lead frame comprises a sensor pad that is smaller than the die pad and is arranged between the die pad and the first lead, wherein the sensor pad forms part of the load path connection, and wherein the magnetic sensor arrangement is mounted directly on the sensor pad.
Example 18. The method of example 17, wherein the sensor pad merges with the first lead and the die pad.
Example 19. The semiconductor package of example 1, wherein the lead frame further comprises a second die pad that is spaced apart from the die pad, wherein the semiconductor package further comprises a second semiconductor die mounted on the second die pad, and wherein the load path connection electrically connects a second load terminal of the semiconductor die with the first lead.
Example 20. The semiconductor package of example 11, wherein the semiconductor package is configured as a discrete half-bridge, and wherein the first and second semiconductor dies form a high-side switch and a low-side switch, respectively, of the discrete half-bridge.
The semiconductor dies disclosed herein can be formed in a wide variety of device technologies that utilize a wide variety of semiconductor materials. Examples of such materials include, but are not limited to, elementary semiconductor materials such as silicon (Si) or germanium (Ge), group IV compound semiconductor materials such as silicon carbide (SiC) or silicon germanium (SiGe), binary, ternary or quaternary III-V semiconductor materials such as gallium nitride (GaN), gallium arsenide (GaAs), gallium phosphide (GaP), indium phosphide (InP), indium gallium phosphide (InGaPa), aluminum gallium nitride (AlGaN), aluminum indium nitride (AlInN), indium gallium nitride (InGaN), aluminum gallium indium nitride (AlGaInN) or indium gallium arsenide phosphide (InGaAsP), etc.
The semiconductor dies disclosed herein may be configured as a vertical device, which refers to a device that conducts a load current between opposite facing main and rear surfaces of the die. Alternatively, the semiconductor die 118s may be configured as a lateral device, which refers to a device that conducts a load current parallel to a main surface of the die.
The term “interconnect element” as used herein refers to any electrically conductive structure that can be mated with two metal surfaces, e.g., bond pads, to form a stable electrical connection between these metal surfaces. Examples of interconnect elements include bond wires, ribbons, and metal clips.
Spatially relative terms such as “under,” “below,” “lower,” “over,” “upper” and the like, are used for ease of description to explain the positioning of one element relative to a second element. These terms are intended to encompass different orientations of the device in addition to different orientations than those depicted in the figures. Further, terms such as “first,” “second,” and the like, are also used to describe various elements, regions, sections, etc. and are also not intended to be limiting. Like terms refer to like elements throughout the description.
As used herein, the terms “having,” “containing,” “including,” “comprising” and the like are open-ended terms that indicate the presence of stated elements or features, but do not preclude additional elements or features. The articles “a,” “an” and “the” are intended to include the plural as well as the singular, unless the context clearly indicates otherwise.
With the above range of variations and applications in mind, it should be understood that the present invention is not limited by the foregoing description, nor is it limited by the accompanying drawings. Instead, the present invention is limited only by the following claims and their legal equivalents.