Patent Application
20080054429
In the description which follows, like features and elements have been identified by the same or similar reference numerals for ease of identification and enhanced understanding of the disclosure hereof. Such identification is by way of convenience for the reader only, however, and is not limiting of the present invention or an implication that features and elements of various components and embodiments identified by like reference numerals are identical or constrained to identical functions.
While the making and using of various embodiments of the present invention are discussed in detail below, it should be appreciated that the present invention provides many applicable inventive concepts which may be embodied in a wide variety of specific contexts. The specific embodiments discussed herein are merely illustrative of specific ways to make and use the invention and do not delimit the scope of the invention.
Embodiments of the invention include methods for forming a spacer sized and shaped for separating integrated circuit components, preformed spacers for separating integrated circuit components, and methods for fabricating integrated circuit devices including spacers.
In one embodiment, a spacer sized and shaped for separating components of a semiconductor device assembly comprises a polymer matrix material, for example a thermoplastic, a thermosetting plastic, or any other material exhibiting desired mechanical and electrical (dielectric) characteristics and suitable for use with embodiments of methods of fabrication of the invention. The spacer may be about 20 μm to about 150 μm thick and, for many applications, about 40 μm to about 80 μm thick. The spacer may, optionally, include at least one conductive via therethrough, enabling an electrical connection to be made through the spacer.
Another embodiment comprises a method of forming a spacer sized and shaped for separating stacked components of a semiconductor device assembly. The method comprises placing a flowable material into a mold cavity configured to form a spacer wafer, solidifying the flowable material within the mold cavity, and removing the solidified material in the form of the spacer wafer from the mold cavity, the spacer wafer exhibiting a substantially planar and generally round disc shape with two opposing, major planar surfaces and a peripheral surface therebetween. The spacer wafer may be sized and shaped to be held and processed with conventional equipment used for processing conventional silicon wafers. The processing may include applying a die attach film to a first surface of the spacer wafer, a portion of the die attach film extending at least partially beyond the perimeter of the spacer wafer, attaching a film frame to at least a portion of the die attach film extending beyond the perimeter of the spacer wafer and dicing the spacer wafer to form individual spacers sized and shaped to separate components of a semiconductor device assembly. Singulated spacers may then be removed from the diced spacer wafer using a conventional pick-and-place apparatus. Optionally, the thickness of the wafer may be reduced prior to dicing by abrasive planarization (including without limitation chemical-mechanical planarization), polishing, grinding or any other suitable technique known in the art.
In another embodiment, a mold cavity may be sized to form an individual spacer, sized and shaped to separate components of a semiconductor device assembly without requiring significant subsequent processing.
In yet another embodiment, a plurality of individual spacers, sized and shaped to separate components of a semiconductor device assembly, is formed together in a common mold with spacer locations separated by partitions in the form of runners. The use of partitions enables a plurality of spacers to be formed in a common mold without requiring significant subsequent processing, such as singulation.
In yet another embodiment, a substantially planar sheet of suitable material may be used to form individual spacers, or spacer wafers, by stamping or punching. If stamped wafers are formed, they may be subsequently singulated to form individual spacers. The sheet of material may, itself, be formed by any molding method disclosed herein or otherwise comprising the state of the art.
In a further embodiment, a substantially planar sheet of suitable material may be cut into strips, and the strips segmented to produce individual spacers.
In other embodiments, preformed, molded spacers may be formed by compression molding, injection molding, transfer molding, or any other suitable molding method.
Compression molding may comprise introducing flowable dielectric material, which may be preheated, into a heated mold cavity. Pressure is then applied to force the flowable dielectric material into contact with the entire mold cavity, and heat and pressure are maintained as required until the material has solidified.
Injection molding may comprise injecting flowable dielectric material into a mold cavity, and then solidifying the flowable dielectric material.
Transfer molding may comprise loading dielectric material into a chamber known as a pot, and preheating the material to a flowable state. The heated, flowable dielectric material is then forced by a plunger from the pot through channels known as a sprue and runner system into the mold cavities.
Another embodiment of the present invention comprises an integrated circuit device assembly, including at least two components separated by a spacer in the form of a preformed polymer matrix material. The at least two components may each individually comprise a semiconductor die, an interposer substrate, a printed circuit board or other carrier substrate, or any other electronic component known in the art.
Yet another embodiment of the present invention comprises a method of forming a semiconductor device assembly, comprising locating a first component, placing a preformed spacer against the first component, and positioning a second component against the preformed spacer on a side opposite the component. The components may each individually comprise a semiconductor die, an interposer substrate, a printed circuit board or other carrier substrate, or any other integrated circuit component known in the art. A single tool or machine may be employed to position and place both the components, such as semiconductor dice, and the preformed spacer.
Other features and advantages of the present invention will become apparent to those of skill in the art through consideration of the ensuing description, the accompanying drawings, and the appended claims.
The present invention relates to semiconductor device assemblies, particularly semiconductor device assemblies comprising stacked components. A spacer of the present invention may separate the stacked components.
Embodiments of spacers 10 of the present invention may be formed of a material suitable to minimize stress caused by differences in coefficient of thermal expansion (CTE) between semiconductor dice 94 and an encapsulant material 98 that surrounds and protects the semiconductor dice 94. In one embodiment, the CTE of the material of the spacer 10 may be selected to be substantially similar to the CTE of the encapsulant material 98 enabling even Z-axis (vertical) expansion of the MCM 90. For example, the spacer 10 may comprise a thermoset material such as a thermosetting plastic, for example, a thermoset epoxy, or may comprise a thermoplastic material. In another embodiment, the CTE of the material of the spacer 10 may be selected to match the CTE of the semiconductor dice 94. For example, the spacer 10 may comprise a silicon-filled epoxy. In still another embodiment, the CTE of the material of the spacer 10 may be tailored to be intermediate the CTE of the semiconductor dice 94 and the encapsulant material 98.
Spacers 10 may include an adhesive 50 disposed on a top and a bottom surface thereof. The adhesive 50 on one surface of the spacer 10 may be used to attach the spacer 10 with a first semiconductor die 94, and the adhesive 50 on an opposing surface of the spacer 10 may attach the spacer 10 with a second semiconductor component 94 disposed thereon, to form a die stack. Of course, more than two semiconductor dice 94 may be placed in a stack with spacers 10 disposed therebetween.
The conductive via 18 may be formed by any suitable method known by those of ordinary skill in the art such as etching, drilling, or laser ablation. Etching the via 18 may require the application and patterning of an etchant-resistive material such as a photoresist material on a side of the spacer 10, followed by etching with a suitable wet or dry etchant. Alternatively, via 18 may be formed during the molding process using a mold cavity or inserts placed therein, configured to form a spacer 10 having vias 18 therethrough. The internal structure of via 18 may be of round, polygonal or any other suitable cross-sectional shape. After formation, the via 18 may then be filled with a conductive material such as aluminum, nickel, gold, silver, an alloy (including solders), conductive or conductor-filled epoxy, or any other suitable conductive material known in the art. Preformed conductive structures such as wires, pillars, studs or columns may be inserted into holes previously formed in a spacer 10, or mechanically driven therethrough. If a plurality of spacers 10 with conductive vias 18 is formed as part of a spacer wafer 20 as described below, the conductive vias may desirably be formed at the wafer level using conventional equipment for forming and filling vias in semiconductor wafers.
The mold cavity 40 may be sized and shaped to form a planar and generally round spacer wafer 20. During the molding process, a flowable dielectric material 19 may be deposited into the mold cavity 40. The flowable dielectric material 19 may comprise any suitable molding compound, for example powder, pellets, liquid or preform. The top die set 32 and the bottom die set 34 may be brought towards each other with the flowable dielectric material 19 disposed therebetween. As the top portion 42 of the mold body forces against the lower portion 44 of the mold body 39 the biasing element 38 may deform to enable the flowable dielectric material 19 to be compressed to the desired thickness of the spacer wafer 20. The flowable dielectric material may solidify, for example, by curing, into a spacer wafer 20 of (for example) a polymer matrix material within the mold cavity 40. The spacer wafer 20 may be removed from the mold cavity 40. The mold release film 36 may line both mold cavity 40 and a surface 33 of the top die set 32 facing the mold cavity 40, and may ease the extraction of the spacer wafer 20 from the mold 30. The spacer wafer 20 is thus molded between the substantially planar surface 35 of the bottom die set 34 and the substantially planar surface 33 of the top die set 32, and bounded by the lower portion 44 of the mold body 39.
The molded spacer wafer 20 may have, for example, a diameter d of about 200 mm or about 300 mm, to facilitate use of conventional wafer handling equipment, although larger and smaller spacer wafers are within the scope of the present invention. Optionally, the thickness of the molded spacer wafer 20 may also be reduced by abrasive planarization (including chemical-mechanical planarization), polishing, grinding or any other technique known in the art. As previously noted, the spacer wafer 20 may be sized and shaped to be held and processed by conventional equipment used for processing conventional silicon and other semiconductor wafers. Thus, processing of a spacer wafer 20 may include applying a die attach film to a first surface of the spacer wafer, a portion of the die attach film extending at least partially beyond the perimeter of the spacer wafer; attaching a film frame to at least a portion of the die attach film extending beyond the perimeter of the spacer wafer; and slicing the spacer wafer to form spacers suitably sized and shaped to separate components of a semiconductor device asembly.
The molded spacer wafer 20 may be sliced, or cut, with a dicing saw, a water or slurry jet, a hot wire, or other techniques known to those of ordinary skill in the art. The molded spacer wafer 20 may be completely sawn through for dicing into individual spacers 10, or the molded spacer wafer 20 may be scribed or sawn to a partial depth. The scribed or partially sawn wafer 20 may be fractured along the partially scribed or sawn boundaries between locations of individual spacers 10 to form the individual spacers 10, provided the material of spacer wafer 20 is selected to be suitably frangible.
Optionally, the spacer wafer 20 may be attached to a die attach film 54 prior to dicing, as illustrated in
The spacer wafer 20 attached to the die attach film 54 and secured by the film frame 55 may be singulated into individual spacers 10 using conventional methods used to singulate silicon wafers to form individual dice or spacers. The spacer wafer 20 may be separated along straight lines 11 (which would correspond to streets between semiconductor dice on a conventional silicon wafer) to form spacers 10 having square or rectangular cross-sections. Once the spacers 10 are separated, they may be picked from the film frame 55 and placed on a component such as a semiconductor die 94 (
The die attach film 54 may comprise a support layer 52 and an adhesive layer 50. The support layer 52 may retain the spacers 10 in position during singulation of the spacer wafer 20. The adhesive layer 50 may be severed with the spacers 10, and may be useful to adhere a spacer 10 to a component such as a semiconductor die 94 within a stack of such components. A UV treatment may be used to decouple the adhesive layer 50 from the support layer 52.
Optionally, a die attach film 54 may be disposed on both the first surface 12 and the opposing second surface 14 of the spacer wafer 20. The adhesive layer 50 of each die attach film 54 may be severed with spacers 10, decoupled from the support layer 52, and subsequently be used to adhere a spacer 10 at the first surface 12 to a component and at the second surface 14 to another component. Alternatively, an adhesive may be placed on a component such as a semiconductor die 94 prior to the placement of the spacer 10. The preplaced adhesive may be used to secure the spacer 10 to the semiconductor die 94.
Thus, the spacer wafer 20 may be molded, and may be formed less expensively than a conventional silicon wafer. Conventional wafer processing equipment may be used to singulate the molded spacer wafer 20 into individual spacers 10, and to pick and place the spacers 10 onto a stack. Other methods and apparatus for singulating the molded spacer wafer 20 and placing the individual spacers 10 are also within the scope of the present invention, the present invention not being limited to the use of conventional wafer processing equipment.
Another embodiment of a method for forming a molded spacer 10 comprises molding each individual spacer 10 into the desired size and shape. In other words, the spacer 10 may be directly molded to a desired size, shape, dimensions and tolerances, rather than molding a spacer wafer 20, and singulating the spacer wafer 20 to form spacers 10.
The mold cavity 140 may be sized and shaped to form a planar and generally square, rectangular, or round spacer 10. During the molding process, a flowable dielectric material 19 may be deposited into the mold cavity 140, and the top die set 132 and the bottom die set 134 may be brought towards each other. As the top portion 142 of the mold body 139 forces against the lower portion 144 of the mold body 139 the biasing element 138 may deform to enable the flowable dielectric material 19 to be compressed to the desired thickness of the spacer 10. The flowable dielectric material 19 may solidify, for example, by curing, into a spacer 10 of a rigid polymer matrix material within the mold cavity 140. The spacer 10 may be removed from the mold cavity 140. The mold release film 136 may line both mold cavity 140 and a surface 133 of the top die set 132 facing the mold cavity 140, and may ease the extraction of the spacer 10 from the mold 130.
Die attach film 54 may be applied to the spacer 10, and the spacer may be positioned to separate components of a semiconductor device assembly, as previously discussed. Optionally, an adhesive 60 may be used to adhere the spacer 10 to an adjacent component such as a semiconductor die 94, as shown in
Other methods of forming molded spacers 10 are also within the scope of the present invention. The molded spacer wafers 20 may be formed using compression molding as discussed previously, transfer molding, or injection molding. The molded spacer wafer 20 may be singulated to form spacers 10, as described hereinabove. Likewise, the individual spacers 10 may be molded to the desired size and shape using compression molding, transfer molding, or injection molding. A spacer wafer 20 may be stamped from a preformed sheet and then singulated into individual spacers 10 as discussed hereinabove, or a spacer 10 may be individually stamped from a preformed sheet. A spacer wafer 20 or a spacer 10 may also be thinned after fabrication, for example, by abrasive planarization, polishing, or grinding.
As a further approach to forming spacers 10 according to an embodiment of the present invention and with reference to
Although the foregoing description contains many specific details, these should not be construed as limiting the scope of the present invention, but merely as providing illustrations of some embodiments. Similarly, other embodiments of the invention may be devised which do not depart from the spirit or scope of the present invention. Moreover, features from different embodiments of the invention may be employed in combination. The scope of the invention is, therefore, indicated and limited only by the appended claims and their legal equivalents, rather than by the foregoing description. All additions, deletions, and modifications to the embodiments of the invention, as disclosed herein, which fall within the meaning and scope of the claims are embraced thereby.
