The embodiments of the present disclosure relate to semiconductor device packaging and, more particularly, to packaging semiconductor devices through the stacking multiple die on one another.
The electronics industry continues to rely upon advances in semiconductor technology to realize higher-function devices in more compact areas. For many applications realizing higher-functioning devices requires integrating a large number of electronic devices into a single silicon wafer. As the number of electronic devices per given area of the silicon wafer increases, the manufacturing process becomes more difficult.
Many varieties of semiconductor devices have been manufactured having various applications in numerous disciplines. Such silicon-based semiconductor devices often include metal-oxide-semiconductor field-effect transistors (MOSFET), such as p-channel MOS (PMOS), n-channel MOS (NMOS) and complementary MOS (CMOS) transistors, bipolar transistors, BiCMOS transistors. Such MOSFET devices include an insulating material between a conductive gate and silicon-like substrate; therefore, these devices are generally referred to as IGFETs (insulated-gate FET).
Each of these semiconductor devices generally includes a semiconductor substrate on which a number of active devices are formed. The particular structure of a given active device can vary between device types. For example, in MOS transistors, an active device generally includes source and drain regions and a gate electrode that modulates current between the source and drain regions.
Furthermore, such devices may be digital or analog devices produced in a number of wafer fabrication processes, for example, CMOS, BiCMOS, Bipolar, etc. The substrates may be silicon, gallium arsenide (GaAs) or other substrate suitable for building microelectronic circuits thereon.
The continuing need to increase the functionality of semiconductor products by packing in more features within ever smaller spaces. In some products a device die may have a set of features realizable in one manufacturing process, while another device die has another set of features only realizable in another separate process; the two sets of features cannot be fabricated in a single process on a single die. Thus, a product requiring those two sets of features necessitates the combining of two product devices to form a combination semiconductor device. For other combination semiconductor devices, the combining of product devices may exceed two and only be limited by the packaging technology.
The packaging of semiconductor devices continues to pose a challenge in the reducing of cost and increasing of performance. Furthermore, there is a push to include more functionality in a given packaged product often through combining different devices and putting them together in one package by stacking multiple devices on top of one another. There is a challenge accommodating the bond wires on the stacked devices so that each unit may be properly connected to the overall system in one package.
In an example embodiment, there is a method for assembling semiconductor devices. The method comprises, providing a wafer having a topside and an underside, the topside having a plurality of semiconductor devices, each device having a plurality of bond pads. A die attach film (DAF) is attached to the underside of the wafer. The plurality of semiconductor devices is separated by sawing. A subsequent semiconductor device is formed, wherein a first blade having a first kerf cuts through the DAF and partially through the wafer between each device, at a predetermined depth and wherein a second blade of a second kerf continues through the partial cut completely severing each subsequent semiconductor device from one another, the kerf of the second blade being less than the kerf of the first blade. After sawing, the underside profile of the subsequent semiconductor device has recesses defined therein. Additional features of the example embodiment further include, providing a packaging substrate having a die attach area. A first semiconductor device having a die-attach film on the underside of the first semiconductor device is attached to the die attach area; the first semiconductor device is wire bonded to the die attach area. The subsequent semiconductor device is attached to the topside of the first semiconductor device; the recesses of the subsequent semiconductor device accommodate the loops of a plurality of wire bonds of the first semiconductor device. The subsequent semiconductor device is wire bonded, as well. The first semiconductor device and the subsequent semiconductor device are encapsulated in a molding compound.
In another example embodiment, a semiconductor device is comprised of a combination of device die. The semiconductor device comprises, a package substrate having groups of pad landings. A first device die is anchored to the package substrate, the first device die wire-bonded to a first group of pad landings. At least one subsequent device die is anchored to the first device die, the at least one subsequent device die having an underside profile with recesses defined therein, the recesses of a size defined to accommodate wires bonded to the first device die, the at least one subsequent device wire bonded to a second group of pad landings.
The above summaries of the present disclosure are not intended to represent each disclosed embodiment, or every aspect, of the present invention. Other aspects and example embodiments are provided in the figures and the detailed description that follow.
The invention may be more completely understood in consideration of the following detailed description of various embodiments of the invention in connection with the accompanying drawings, in which:
While the invention is amenable to various modifications and alternative forms, specifics thereof have been shown by way of example in the drawings and will be described in detail. It should be understood, however, that the intention is not to limit the invention to the particular embodiments described. On the contrary, the intention is to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the invention as defined by the appended claims.
The disclosed embodiments have been found useful in the assembly semiconductor devices in which a semiconductor assembly is built with multiple devices stacked upon one another. Upon a first device, a subsequent device is placed thereon. Before placement, the underside of the subsequent device has been sawn to accommodate the electrical connections of the first device. For example, a recess in the subsequent device has recesses provide space for bond wires electrically connecting the first device to the package substrate or lead frame assembly.
The subsequent device is manufactured out of an array of devices; the devices having been fabricated on a wafer substrate. For a given manufacturing process having tooling of a defined size, these arrays may range from fewer than a hundred devices (for large die sizes of complex devices, such as microprocessors) to many thousands (for tiny devices of simpler devices, such as logic gates). The underside of the array is placed on a die attach film (DAF). With a first saw blade of a kerf defined by the particular assembly process, the array of subsequent devices is partially sawn (between device boundaries) through the DAF and underside of the array. With a second saw blade having a narrower kerf, the partial cut is completed, resulting in separated devices. The subsequent device has a recess on the underside. Stacked upon a first device, the recess of the subsequent device accommodates the bond wire loops of the first device.
The semiconductor assembly according to the present invention may be constructed from two or more semiconductor devices. The number devices which may be stacked upon one another would be governed by specific manufacturing requirements.
Refer to
The process of preparing and separating the subsequent semiconductor device involves a “dual saw” process employing a wide first blade 10 and a narrow second blade 20 to define the subsequent device's profile. In an example process, such saw blades 10 and 20 are coated with diamond aggregate 11 and 21, respectively. The width of a blade's cut is often referred to as the “kerf.” Thus, the wide saw blade 10 would result in a larger kerf than that of the narrow blade 20.
Refer to
Refer to
Having obtained the SD devices, one or more of these devices may be attached to the first semiconductor device. The two devices are then wire bonded to a package substrate or lead frame, combining the functionality of the two devices into one combination integrated circuit device. Refer to
In another example embodiment, the SD device may have three devices stacked upon one another. Refer to
In another example embodiment, a process for manufacturing devices is illustrated in
In either case for first semiconductor devices or subsequent semiconductor devices, these separated out devices may be plated out in waffle packs for later use in the assembly process.
Having prepared the semiconductor devices with the processes depicted in
Although DAF may be suitable for a given process, in another example process, device die may be attached with a liquid adhesive provided that the process has sufficient control to maintain a consistent adhesive thickness, viscosity, hardness, etc. After adhesive curing, the two-cut sawing process may still be realized.
In an example process, the ball height and bond wire loop height determines how deep a recess is required; if more die-to-die spacing height is needed, the back grinding of the wafer substrate would be less. In some example modern processes, a recess of about 50 μm is sufficient. In other example processes, a recess greater than 50 μm to about 150 μm would be appropriate. The recess in the subsequent semiconductor device accommodates the wire bond loops of the previous or first semiconductor device; ultimately, the particular assembly process governs the suitable recess dimensions.
The techniques outlined in the present disclosure may be used in a variety of package types, for example, ball grid array (BGA), low-profile fine-pitch ball grid array (LFBGA), and thin and fine-pitch ball grid array (TFBGA), etc. but is not limited to any particular package type. For ceramic devices, the cavity depth of the package determines whether the lid can accommodate the multiple-bonded devices. Encapsulating the ceramic device for a particular package would merely entail placing a lid on the package cavity and sealing it (usually a solder seal).
If the subsequent device is smaller than the first semiconductor device, known die attach methods may be used. However, for a subsequent device of almost equal or even larger than the first semiconductor device, there must be sufficient space to accommodate the bond wire loops of the first semiconductor device underneath the subsequent device, the in a manner according to an embodiment according to the present disclosure, the dual sawing of the subsequent device creates the necessary space.
Numerous other embodiments of the invention will be apparent to persons skilled in the art without departing from the spirit and scope of the invention as defined in the appended claims.
Number | Date | Country | |
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61577840 | Dec 2011 | US |