Patent Application
20250233031
The present disclosure relates to a substrate for an electronic device, in particular, for application to radiofrequency or power electronics. The present disclosure also relates to an electronic device comprising such a substrate, and to a process for manufacturing such a substrate.
Silicon carbide (SiC) is widely used for the manufacture of radiofrequency or power electronic components.
A substrate for producing such components typically comprises a support substrate, which may be made of polycrystalline SiC (p-SiC), and a surface layer of monocrystalline SiC (m-SiC) extending on the support substrate. Electronic components are manufactured in or on the layer of monocrystalline SiC. The structure is cut in the form of chips each comprising one or more electronic components. Each chip is brazed to a direct bonded copper stack comprising metal layers, a thermally conductive ceramic and a heat sink.
The heat is thus discharged mainly via the direct bonded copper stack, involving significant thermal stresses on the filler that links the electronic component and the upper metal layer of the direct bonded copper stack by brazing.
However, the coefficient of thermal expansion (CTE) and the Young's modulus of the SiC and of the direct bonded copper stack, in particular, the copper, are very different. Variations in temperature therefore cause uneven deformations in the various layers below and above the braze.
As a result, the filler is subject to high loads, thereby causing cracks, delaminations or flaking at the interface of the braze, resulting in a shortened service life of the device.
To reduce these mechanical stresses, it is known practice to thin the layers of the composite structure, in particular, of the base substrate made of polycrystalline SiC. However, it takes a lot of time and effort to abrade such a base substrate, resulting in an elevated cost of the electronic component. Moreover, the thinning involves a risk of breakage, making the composite structure unusable.
Another solution is to modify the materials used to produce the braze, this being difficult to implement, in particular, while maintaining the mechanical stability and the electrical and thermal conductivity of the braze.
An aim of the present disclosure is to propose a composite structure for producing electronic devices, having a better resistance to the temperature cycles while avoiding cracks, delaminations and flaking at the braze interface.
To this end, the present disclosure proposes a substrate for a radiofrequency or power electronic device, comprising:
The support substrate has a thickness greater than 50 μm, advantageously greater than 80 μm, more advantageously greater than 100 μm and more advantageously still greater than 150 μm.
The porous portion preferably comprises a layer of porosified SiC.
In some embodiments, the support substrate comprises a non-porous portion between the surface layer of monocrystalline SiC and the porous portion.
In some embodiments, the porous portion has a rear part having a first porosity and a front part having a second porosity lower than the first porosity.
The porous portion may have a porosity gradient that decreases from the rear face to the front face.
The porous portion may have pores filled with a material having a Young's modulus lower than the Young's modulus of the silicon carbide.
Advantageously, the mean distance between the pores is greater than 10 nm, preferably greater than 50 nm.
The present disclosure also relates to an electronic device comprising a substrate as described above and at least one radiofrequency or power electronic component formed in or on the surface layer of monocrystalline silicon carbide.
The electronic device preferably additionally comprises a heat discharge device, the substrate being brazed to the heat discharge device via a filler such that the filler is in integral contact with at least part of the porous portion on the rear face of the support substrate.
Another subject of the present disclosure concerns a process for manufacturing a radiofrequency or power electronic device comprising:
The process may additionally comprise a step of assembling the surface layer and the support substrate.
The support substrate preferably has a thickness greater than 50 μm, advantageously greater than 80 μm, more advantageously greater than 100 μm and more advantageously still greater than 150 μm.
Advantageously, the formation of the support substrate comprises a step of porosifying at least part of a base substrate of non-porous silicon carbide to form the porous portion.
In some embodiments, the porosification is carried out on all of the base substrate to form a completely porous support substrate.
The porosification may be carried out so as to form a porosity gradient that decreases in the porous portion from the rear face to the front face.
The porosification may be carried out so as to form a bonding zone having a porosity of less than 40% on the front face of the support substrate.
In some embodiments, the process comprises a step of filling at least some of the pores of the porous portion with a material having a Young's modulus lower than the Young's modulus of the silicon carbide.
The process may additionally comprise a step of thinning the support substrate via the rear face, such that the thickness of the porous portion remains greater than or equal to 100 nm.
Other features and advantages of the present disclosure will emerge from the following detailed description, with reference to the appended drawings, in which:
To make the figures easier to read, the structures illustrated have not necessarily been shown to scale.
The electronic chips 11, 12 are mounted on a direct bonded copper structure via brazes 22, 23. This direct bonded copper (DBC) structure comprises two copper metallizations 17, 19 and a substrate 18 made of a thermally conductive and electrically insulating ceramic, for example, made of aluminum nitride. Electrical connections 27, 28 are fixed to the copper metallization 17 via brazes 25, 26.
A braze 29 fixes the device to a heat sink 34 and a base plate 32. A layer of thermal grease 31 ensures thermal contact between the heat sink 34 and the base plate 32. The radiofrequency or power electronic device is encapsulated in a casing 39, which is typically made of plastic.
Each chip is formed from a substrate comprising a support substrate made of silicon carbide and a surface layer of monocrystalline silicon carbide in or on which is formed at least one power electronic component or radiofrequency electronic component.
The surface layer made of monocrystalline silicon carbide typically has a thickness ranging between 100 nm and 1500 nm. On this surface layer, it is possible to epitaxially deposit a monocrystalline layer made of silicon carbide with a thickness ranging between 1 μm and 150 μm, in which at least part of the electronic component is formed.
The support substrate has a front face, on which the surface layer extends, and a rear face opposite to the front face.
The surface layer may have been assembled on the support substrate, which may then be polycrystalline, according to embodiments that will be described later on.
The support substrate may be itself in one piece or be made up of a stack of at least two layers. The thickness of the support substrate is preferably chosen such that the support substrate is self-supporting without the surface layer, which is to say that it is mechanically stable enough to be manipulated on its own, without adding an additional handling substrate or support. To this end, the support substrate typically has a thickness greater than 150 μm, advantageously greater than 100 μm, more advantageously greater than 80 μm and more advantageously still greater than 50 μm. The use of a self-supporting support substrate advantageously makes the steps of manufacturing the substrate easier.
In some cases, the electronic device may be manufactured from a support substrate without a limit on its thickness, which is not necessarily self-supporting. In this case, the heat discharge device makes it possible to mechanically stabilize the electronic component. The manufacture of such a substrate may require a handling support. However, the support substrate may be produced according to the same embodiments as a self-supporting support substrate.
In the case of a power electronic device, good electrical conductivity between the thin layer and the support substrate is necessary. For such a device, the support substrate has, for example, an electrical resistivity of 50 mΩ·cm or less, in particular, 20 mΩ·cm or less.
In the case of a radiofrequency device, the support substrate advantageously has a high electrical resistivity, for example, an electrical resistivity greater than 500 Ωcm.
The support substrate has at least one porous portion that extends from the rear face. By contrast, the surface layer is non-porous, which is to say that it has a porosity of less than 5% or zero.
The porosity of the silicon carbide is defined as the unoccupied volume fraction within the silicon carbide, the volume being able to be filled with air or another gas or solid inclusions of another material. For example, pores of a layer of porous silicon carbide may be filled with carbon inclusions.
The pores may be interconnected or separate from one another, depending, in particular, on the method for forming the porous layer. Typically, pores resulting from electrochemical porosification of the silicon carbide are at least partially interconnected and are generally filled with air. In the case of the porous silicon carbide obtained by sintering, the pores are typically separate from one another, and may be at least partially filled with carbon inclusions.
In the case of air-filled and interconnected pores, the porosity can be measured by gravimetry. In other cases, the porosity can be measured by reflectivity of a porous surface of the silicon carbide. It is also possible to measure the porosity by observing a cross section of the porous silicon carbide using an optical microscope or an electron beam scan and by estimating the quotient between the surface area taken up by pores and/or inclusions and the surface area taken up by the silicon carbide.
The porosity of the porous portion of the support substrate advantageously ranges between 5% and 30% and, in the case of a substrate made of porosified silicon carbide, more advantageously between 5% and 20%. The porosity may be constant over the entire thickness of the porous portion or be variable gradually or continuously along a gradient, according to embodiments described later on.
The presence of such a porosity makes it possible to reduce the Young's modulus of the silicon carbide.
If the pores are filled with inclusions of a solid material, the solid material advantageously has a Young's modulus less than that of the silicon carbide, in order to not offset the reduction in the Young's modulus afforded by the porosity of the silicon carbide. Furthermore, to not adversely affect the electrical conductivity of the support substrate, the solid material is advantageously an electrical conductor. For example, the inclusions may comprise carbon, silicon, a metal or a metal alloy.
A porosity less than or equal to 30% makes it possible to conserve an acceptable strength at break in the face of the mechanical stresses likely to be applied to the chip, in particular, when all of the support substrate is porous.
In some embodiments, the porous portion extends over the entire thickness of the support substrate.
In other embodiments, the porous portion extends only over part of the thickness of the support substrate. In this case, a non-porous intermediate portion extends between the porous portion and the surface layer. Such a configuration typically has a better resistance to fracture of the substrate.
In all cases, the porous portion has a total thickness greater than 100 nm, preferably greater than 1 μm, or even greater than 3 μm.
By virtue of such a thickness, combined with the aforementioned porosity, the porous portion of the support substrate has a Young's modulus considerably lower than that of the non-porous silicon carbide and thus has a behavior more favorable to the reduction in mechanical stresses exerted on the filler of the braze when the device is subject to variations in temperature.
The stress at the point of fatigue of the braze decreases as the thickness of the porous portion increases. In the simulations, it is assumed that the Young's modulus of the porous SiC depends on the porosity as shown in
The Young's modulus of the porous portion of the support substrate, which is situated at the braze interface, is closer to the Young's modulus of the DBC structure than the Young's modulus of the surface layer. This implies that the deformations caused by variations in temperature are less significant and are closer to those of the DBC structure and of the braze. Consequently, the mechanical stresses exerted on the braze owing to these deformations are less significant than in the known chips. The reduction of these stresses lengthens the service life of the braze and of the radiofrequency or power electronic device.
Lastly, the presence of such a porous portion on the rear face of the substrate does not adversely affect the electrical conductivity of the substrate in power applications.
In other embodiments that are not illustrated, the porous portion made of porosified silicon carbide has a porosity gradient, such that the porosity decreases from the rear face in the direction toward the front face of the support substrate.
In other embodiments that are not illustrated, multiple portions made of sintered silicon carbide or porosified silicon carbide may be superposed so as to form a support substrate 30 or part of a support substrate 30. The size and the shape of the pores may be similar or different in the various porous portions. Advantageously, the mean distance between the pores is greater than 10 nm, preferably greater than 50 nm, in each porous portion present in the substrate in order to avoid the formation of a possible depletion zone in the SiC.
In some embodiments, a support substrate that may be non-self-supporting is used to form a radiofrequency or power electronic device. The substrate comprises a support substrate made of polycrystalline silicon carbide having a front face and a rear face, and a surface layer of monocrystalline silicon carbide extending on the front face of the support substrate, wherein the support substrate has at least one porous portion extending from the rear face, the porous portion having a porosity greater than 5%. At least one radiofrequency or power electronic component is formed in or on the layer of monocrystalline silicon carbide.
The device may additionally comprise a heat discharge device, the substrate being brazed to the heat discharge device via a filler such that the filler is in integral contact with at least part of the porous portion on the rear face of the support substrate.
Various embodiments of the steps for manufacturing a substrate will now be described.
The formation of a substrate according to the present disclosure comprises the formation of at least one porous portion.
A porous portion may be formed by porosifying a substrate of silicon carbide. The known methods for porosifying silicon carbide, some of which are described or referenced in the publications by Y. Shishkin et al. and Gautier et al. can be applied to form the porous portion. The porosification can be carried out from the front face or from the rear face of the substrate.
A porosification step may, for example, be carried out by immersion in an acid bath or electrochemically or photoelectrochemically. Electrochemical porosification may be an electrochemical anodization in which the portion to be porosified is placed in an electrolyte such as a solution comprising hydrofluoric acid and/or ethanol. An anode and a cathode that are immersed in the electrolyte are connected to a source of electricity in order to apply an electrical current between the electrodes. The anodization, to a certain extent, causes the silicon carbide crystal to electrochemically decompose in the region of the porous layer of silicon carbide. Instead of uniformly decomposing the silicon crystal, the electrochemical decomposition can locally remove silicon atoms from the crystal lattice of the silicon carbide, thus forming small holes or pores in the silicon carbide crystal. At the end of the treatment, the porosified portion is rinsed in order to remove the residues of the electrolyte.
In a porosification step, it is possible to conserve the non-porous structure of a portion of a substrate. In this case, the portion concerned is kept outside the electrolyte bath.
In some cases, the porosity thus formed is uniform over the entirety of the support substrate, except for the surface layer. In other embodiments, a porosity gradient that decreases from the rear face to the front face is produced, such that the porosity is lower by the surface layer and greater by the rear face. The porosity may also be increased gradually, by setting the porosification parameters first of all for a substrate of a certain thickness, and by continuing this porosification in portions of decreasing thickness extending from the rear face of the substrate. For each successive portion, the porosification parameters can be modified so as to create a greater porosity than in the preceding step.
It is possible to modify the porosity and create a gradient by varying the different parameters of the substrate such as the doping, and of the porosification process such as the applied current and voltage, the temperature, the composition of the electrolyte and, in certain cases, the intensity and wavelength of an applied light.
As an alternative, a porous portion may be formed by sintering silicon carbide before assembling the substrate. Sintering is a heat treatment of a structure made of silicon carbide at a temperature ranging between 1600° C. and 2400° C. in an atmosphere that may be, for example, argon, nitrogen or an inert gas. Such a heat treatment may modify the distribution of the carbon and the silicon that are present in the substrate, thus forming inclusions made of carbon in the silicon carbide.
In some embodiments, the porous zone may be formed directly in a substrate of monocrystalline silicon carbide comprising the surface layer, by porosifying the substrate over part of its thickness. In this case, the porosification is carried out from the rear face.
In other embodiments, the formation of the substrate may comprise assembling the support substrate and the surface layer. The porous zone of the support substate may be formed before or after the assembly.
In some embodiments, the formation of the support substrate may comprise one or more step(s) of assembling two or more porous portions, and/or a porous portion with a non-porous portion.
The layers or portions of substrates may be assembled by bonding, for example, from a donor substrate in which a weakened zone is created in order to delimit the layer to be assembled. In this case, use is typically made of a process of the Smart Cut™ type. A weakened zone for delimiting the layer to be assembled on the support substrate is formed in the donor substrate made of monocrystalline silicon carbide. The weakened zone is typically created by irradiation with ions, for example, hydrogen and/or helium ions. The donor substrate is then bonded to the front face of the support substrate, the layer delimited by the weakened zone being arranged in direct contact with the front face of the support substrate. The donor substrate is then detached along the weakened zone, in order to transfer the layer of monocrystalline silicon carbide to the support substrate, for example, by using a heat treatment.
Another technique for weakening a donor substrate is to create a weakened zone having a higher porosity than that of the material in the vicinity of this zone. In such a case, after bonding to the support substrate, the donor substrate can be detached by applying a mechanical stress. Such a mechanical stress is, for example, the insertion of a blade or another beveled tool, or the application of a jet of air or a jet of water. This technique can be used while transferring a porous layer or for a thinning operation as described below.
Another embodiment of the assembly is deposition on a provided portion of the substrate, for example, chemical vapor deposition (CVD) or physical vapor deposition (PVD). For example, it is possible to deposit a layer of polycrystalline silicon carbide by CVD or PVD on the surface layer of monocrystalline silicon carbide or on another layer of (porous or non-porous) polycrystalline silicon carbide, and porosify all or some of the deposited layer.
The step of assembling the support substrate and the surface layer of monocrystalline silicon carbide can be carried out on a base substrate intended to form a support substrate, on a finished support substrate, or at the end of one or more steps of forming the support substrate.
In the case of bonding two porous portions or a porous portion and a non-porous portion, the porosity of the bonding interfaces is with preference less than 40%, preferably less than 15% and more preferably less than 5% in order to ensure good adhesion between the two portions.
It is possible to carry out one or more optional thinning steps in order to set the thickness of the support substrate or a portion of the support substrate, and the porosity on its rear face. In order to carry out this thinning step, it is possible to create, from the rear side of the porous zone to be formed, a weakened zone having a porosity greater than 10%, advantageously greater than 15%, particularly advantageously greater than 30% relative to the porosity of the porous zone to be formed, at a determined depth corresponding to the thickness of the porous portion to be formed. Then, or after a step of assembly with one or more layers on the front face of the substrate, the substrate can be cut along the weakened zone created. The cut can be made by applying a mechanical stress, for example, by inserting a blade or by applying a jet of air or a jet of water. The stress must be adapted to spread a fracture wave along the weakened zone, which has a mechanical strength less than that of the zones surrounding the weakened zone. Advantageously, such a weakened zone is surrounded by a portion made of polycrystalline silicon carbide having a porosity lower than the weakened zone, for example, 1% or 5% less porosity, advantageously 10% less porosity.
In some embodiments, the substate is thinned by breaking a porous portion that leaves the porous zone, which will be fixed to the braze of the electronic component, on the surface. Such thinning avoids a polishing step that can be lengthy and expensive.
The thinning step may also be carried out by chemical etching or a mechanical abrasion technique.
With preference, a porous portion having a thickness greater than 100 nm, advantageously greater than 1 μm, and particularly advantageously greater than 3 μm is conserved. The thickness of the layer has an influence on the deformations caused by the variations in temperature. The mechanical stresses applied to the braze of the electronic chip thus decrease further as the thickness of the porous portion increases.
It is also possible to apply one or more thinning steps at the end of the creation of a porous portion, in order to set the thickness of the porous portion before assembly with another, porous or non-porous portion.
It is possible to carry out an optional step of passivation, or another treatment of the rear face, for example, by deposition of a dielectric layer, such as silicon oxide, which forms a barrier layer in order to avoid direct contact between the silicon carbide and the ambient air and, consequently, avoid the creation of a depletion zone, which involves a drop in the electrical conductivity of the rear face.
With reference to
Then, with reference to
It is then optionally possible to assemble one or more additional layers 43B, 43C on the rear face of the support substrate 43. The assembly of a first layer 43B is illustrated in
The optional assembly of a second layer 43C is illustrated in
It is also possible to assemble one or more layers 43B, 43C on the rear face 420 of the substrate and/or carry out an additional porosification after the assembly (not illustrated). For example, it is possible firstly to bond a layer made of sintered silicon carbide to the rear face of the starting substrate, then deposit a layer of polycrystalline silicon carbide on the rear face of the layer made of sintered silicon carbide, and carry out a step of porosifying the layer made of polycrystalline silicon deposited on the layer made of sintered silicon carbide.
A preferred embodiment is illustrated in
With reference to
To illustrate the variants of such an embodiment, a more complex process is illustrated in
To form the support substrate, it is possible, with reference to
It is then possible, with reference to
It is optionally possible to carry out one or more bonding operations of other layers having greater porosities to the rear face of the substrate (not illustrated).
It is optionally possible to assemble one or more layers having a lower porosity on the front face of the substrate (not illustrated).
With reference to
If no layer is assembled on the front face of the substrate 532, the surface layer 51 made of monocrystalline silicon carbide can be assembled with the support substrate 532 between any two steps of the procedure for forming the support substrate 532.
In some embodiments that are not illustrated, part of the support substrate and the surface layer made of monocrystalline silicon carbide are assembled while the support substrate is being formed, before all the steps of forming the support substrate are completed.
Other embodiments are illustrated in
It is possible, with reference to
As an alternative, with reference to
Optionally, with reference to
It is then possible to carry out optional steps (not illustrated) of bonding and/or assembling one or more layers having a greater porosity to or on the rear face of the substrate, or/or one or more layers having a lower porosity to or on the front face of the substrate.
With reference to
In another embodiment, with reference to
With reference to
The porosity of the portion 73 may be uniform, in the form of a gradient or multiple stages, or affect only a certain thickness of the substrate.
With reference to
In some embodiments, a substrate made of monocrystalline silicon carbide intended to form the surface layer is taken as a basis. Then, the support substrate is formed on the substrate made of monocrystalline silicon carbide, such that the front face of the substrate is in contact with the substrate made of monocrystalline silicon carbide. The formation of the support substrate may comprise one of more steps of depositing, porosifying, sintering and assembling multiple portions forming the support substrate. It is then possible to thin the substrate made of monocrystalline silicon carbide as described above.
It is then possible to form chips from such a substrate for radiofrequency and/or power electronics applications. When the device is designed for a radiofrequency application, the electronic chips may be formed in a layer of silicon carbide or of a nitride from the group III-N, for example, a stack of layers GaN/AlGaN/AlGanInN delimiting a two-dimensional electron gas. Such a layer or such a stack is borne by the surface layer made of monocrystalline silicon carbide.
| Number | Date | Country | Kind |
|---|---|---|---|
| FR2203050 | Apr 2022 | FR | national |
This application is a national phase entry under 35 U.S.C. § 371 of International Patent Application PCT/FR2023/050479, filed Apr. 4, 2023, designating the United States of America and published as International Patent Publication WO 2023/194682 A1 on Oct. 12, 2023, which claims the benefit under Article 8 of the Patent Cooperation Treaty of French Patent Application Serial No. FR2203050, filed Apr. 4, 2022.
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/FR2023/050479 | 4/4/2023 | WO |
