The present invention mainly relates to a surface treatment method for removing latent scratches of a SiC substrate.
SiC, which is superior to Si, etc., in terms of heat resistance, mechanical strength, and the like, has been attracting attention as a new semiconductor material.
Patent Document 1 discloses a surface treatment method for planarizing a SiC substrate. In the surface treatment method, a storage container is heated while the SiC substrate is stored within the storage container under Si vapor pressure. This results in etching the SiC substrate stored within the storage container, to obtain the SiC substrate that is planar at a molecular level.
Here, the SiC substrate can be obtained by cutting out from an ingot made of a single crystal SiC in a predetermined angle. Since the surface roughness of the cut substrate is large, the surface needs to be planarized by performing a mechanical polishing (NIP), a chemical mechanical polishing (CMP) and the like. However, performing the mechanical polishing generates polishing scratches on the SiC substrate. Applying the pressure to the surface of the SiC substrate during the mechanical polishing generates a modified layer (hereinafter, referred to as latent scratches) in which the crystallinity is disturbed.
Patent Document 2 discloses a treatment method for removing a surface modified layer formed on the SiC substrate. Patent Document 2 describes that the surface modified layer is a damage layer of a crystal structure occurred in a step of manufacturing the SiC substrate. Patent Document 2 describes that the surface modified layer is kept equal to or less than 50 nm and the surface modified layer is removed by hydrogen etching.
PATENT DOCUMENT 1: Japanese Patent Application Laid-Open No. 2008-16691
PATENT DOCUMENT 2: International Publication WO 2011/024931
Here, when etching treatment, heat treatment and the like are performed on a SiC substrate having remaining latent scratches, the latent scratches are spread and extended through an epitaxial film and then a surface of the SiC substrate is roughened. As a result, a quality of a semiconductor manufactured from the SiC substrate is degraded. However, the rate of etching in a conventional hydrogen etching is several tens of nm/h to several hundreds of nm/h, and therefore it takes a lot of time for removing the latent scratches of about a few μm. The rate of polishing in the chemical mechanical polishing is 1 μm/h or less, and therefore it takes a lot of time for removing the latent scratches.
Patent Document 1 does not describe about the latent scratches, but if the SiC substrate is heated and etched by a method described in Patent Document 1, the latent scratches can be quickly removed. Performing the heat treatment in high-vacuum Si atmosphere, however, may cause too much removal of the substrate because the rate of etching is high.
The thickness of the surface modified layer can be small by a method described in Patent Document 2. However, it is required that the SiC substrate is grown from a seed crystal by using a predetermined material. This decreases the degree of freedom in a processing step and increases the labor in the processing step.
The present invention has been made in view of the circumstances described above, and a primary object of the present invention is to provide a surface treatment method for quickly removing latent scratches occurred on a SiC substrate in a necessary and sufficient range.
Problems to be solved by the present invention are as described above, and next, means for solving the problems and effects thereof will be described.
In a first aspect of the present invention, in a surface treatment method for treating a surface of a SiC substrate after a mechanical processing is performed, the surface treatment method for controlling the rate of etching of the SiC substrate by adjusting the inert gas pressure around the SiC substrate when the SiC substrate is heated under Si atmosphere and then etched is provided.
Accordingly, if the latent scratches or the like exists on the SiC substrate, the latent scratches or the like can be removed. Therefore, the surface is not roughened when an epitaxial growth and heat treatment or the like are performed. This can manufacture a high-quality SiC substrate. The etching by the above-described method can considerably shorten a treatment time than that of the mechanical polishing, the chemical mechanical polishing and the hydrogen etching. Moreover, the rate of etching can be adjusted by adjusting the inert gas pressure, which can prevent too much removal of the SiC substrate.
In the surface treatment method of the SiC substrate, the latent scratches are occurred on the SiC substrate after the mechanical processing is performed. The latent scratches are preferably removed by etching under Si atmosphere.
Accordingly, polishing scratches occurred on the SiC substrate can be removed, which can manufacture a high-quality SiC substrate.
In the surface treatment method of the SiC substrate, it is preferable that the inert gas pressure in a case of etching under Si atmosphere is 0.01 Pa or more and 1 Pa or less.
In the surface treatment method of the SiC substrate, it is preferable that the temperature in a case of etching under Si atmosphere is 1800° C. or more and 2000° C. or less.
This can appropriately remove the latent scratches on the surface of the SiC substrate.
In the surface treatment method of the SiC substrate, it is preferable that the surface of 5 μm or more on the SiC substrate is removed by etching under Si atmosphere.
This can remove a certain amount of latent scratches. Particularly, in this embodiment, the rate of etching can be adjusted using the inert gas pressure, and therefore the latent scratches within a necessary and sufficient range can be removed.
In the surface treatment method of the SiC substrate, it is preferable that the rate of etching in a case of etching on the SiC substrate is controlled equal to or more than 200 μm/min, and also the amount of etching of the SiC substrate is controlled equal to or more than 10 μm.
This can suppress a step bunching which may be occurred after etching under Si atmosphere.
In a second aspect of the present invention, a SiC substrate whose surface is treated by the surface treatment method is provided.
This can achieve the SiC substrate whose surface is not roughened when the epitaxial growth and heat treatment and the like are performed.
In a third aspect of the present invention, a method for manufacturing a semiconductor is provided. That is, the method for manufacturing the semiconductor includes a latent scratches removal step, an epitaxial growth step and a heat treatment step. In the latent scratches removal step, the surface of the SiC substrate is etched by the surface treatment method. In the epitaxial growth step, the epitaxial growth of a single crystal SiC is caused on the surface of a SiC substrate where the latent scratches are removed in the latent scratches removal step. In the heat treatment step, the SiC substrate after performing the epitaxial growth step is heated under Si atmosphere.
Accordingly, the surface is not roughened when the epitaxial growth and heat treatment and the like are performed, which can manufacture a high-quality semiconductor.
For a method for manufacturing the semiconductor, in the heat treatment step, it is preferable that the SiC substrate is heated under Si atmosphere and then etched while controlling the rate of etching of the SiC substrate by adjusting the inert gas pressure around the SiC substrate.
Thus, both the latent scratches removal step and the heat treatment step perform the same treatment. This can simplify the steps and can easily perform the processing in the same apparatus.
Next, an embodiment of the present invention will be described with reference to the drawings.
Firstly, a high-temperature vacuum furnace 10 that is used in a heat treatment of this embodiment will be described with reference to
As shown in
A vacuum-forming valve 23, an inert gas injection valve 24, and a vacuum gauge 25 are connected to the main heating chamber 21. The vacuum-forming valve 23 is configured to adjust the degree of vacuum of the main heating chamber 21. The inert gas injection valve 24 is configured to adjust pressure of an inert gas (for example, Ar gas) contained in the main heating chamber 21. The vacuum gauge 25 is configured to measure the degree of vacuum within the main heating chamber 21.
Heaters 26 are provided in the main heating chamber 21. Heat reflection metal plates (not shown) are secured to a side wall and a ceiling of the main heating chamber 21. The heat reflection metal plates are configured to reflect heat of the heaters 26 toward a central region of the main heating chamber 21. This provides strong and uniform heating of the SiC substrate, to cause a temperature rise up to 1000° C. or more and 2300° C. or less. Examples of the heaters 26 include resistive heaters and high-frequency induction heaters.
The SiC substrate is heated while stored in a crucible (storing container) 30. The crucible 30 is placed on an appropriate support or the like, and the support is movable at least in a range from the preheating chamber to the main heating chamber.
The crucible 30 includes an upper container 31 and a lower container 32 that are fittable with each other. The crucible 30 is made of tantalum metal, and includes a tantalum carbide layer that is exposed to an internal space of the crucible 30.
To perform a heat treatment on the SiC substrate, as indicated by a chain line in
Next, a process of manufacturing a semiconductor element from a SiC substrate 40 by using the above-described high-temperature vacuum furnace 10 will be described with reference to
A bulk substrate used for manufacturing a semiconductor element can be obtained by cutting an ingot made of 4H—SiC single crystal or 6H—SiC single crystal in a predetermined thickness. Particularly, the bulk substrate having an off angle can be obtained by obliquely cutting the ingot. Then, the mechanical polishing is performed for removing the surface roughness of the bulk substrate. However, the pressure is applied to the inside of the bulk substrate by performing the mechanical polishing, which causes a modified layer (latent scratch) in which the crystallinity is changed.
Next, as shown in
Accordingly, the surface of the SiC substrate 40 can be planarized at a molecular level while etching the surface of the SiC substrate 40. In a case that polishing scratches and latent scratches are existing on the SiC substrate 40, the polishing scratches and latent scratches can be removed by etching. In this embodiment, since the rate of etching can be controlled by adjusting the inert gas pressure, too much removal of the SiC substrate can be prevented while sufficiently removing latent scratches (details thereof will be described later).
The chemical mechanical polishing can be omitted by etching according to this embodiment. Therefore, the latent scratches can be removed without changing a conventional effort.
Next, as shown in
Then, as shown in
As a result of the ion implantation, the surface of the epitaxial layer 41 including the ion-implanted portions 42 is roughened (the surface of the SiC substrate 40 is damaged so that the degree of planarity deteriorates), as shown in
Then, a treatment for activating the implanted ions and etching of the ion-implanted regions 42 and the like are performed. In this embodiment, these two processes can be performed in a single step. More specifically, a heat treatment (annealing) is performed under Si vapor pressure (under Si atmosphere) and in an environment of 1500° C. or more and 2200° C. or less and desirably 1600° C. or more and 2000° C. or less. This can activate the implanted ions. Additionally, the surface of the SiC substrate 40 is etched so that the roughened portions of the ion-implanted regions 42 are planarized (see
The above-described process enables the surface of the SiC substrate 40 to obtain a sufficient flatness and electrical activity. The surface of the SiC substrate 40 can be used to manufacture a semiconductor element.
Here, in a portion near the surface of the SiC substrate 40, ion concentration is insufficient since implanted ions are transmitted. In a certain inner portion of the SiC substrate 40, ion concentration is insufficient since implanted ions are not easily reached.
Thus, in etching of
Hereinafter, a relationship between the inert gas pressure and the rate of etching, and the like, will be described with reference to
As conventionally known, the rate of etching of the SiC substrate depends on a heating temperature.
In Patent Document 1, the rate of etching is high since etching is performed under high vacuum. It is therefore difficult to correctly understand the amount of etching. However, as shown in
Accordingly, in an etching step for removing latent scratches (
In Patent Document 2, performing a hydrogen etching causes a low rate of etching (several tens of nm/h to several hundreds of nm/h), and therefore it takes a lot of time for removing the latent scratches. In this respect, a method in this embodiment has the rate of etching of several μm/h to several tens of μm/h even if the pressure is very high. Therefore, the latent scratches and the insufficient ion-implanted portion can be removed within a practical time.
Particularly when the latent scratches are removed, as shown in an experimental example (details will be described later), the pressure is preferably set to about 0.01 Pa to 1 Pa. The rate of etching in this case is 100 μm/h or more, and therefore the latent scratches can be more quickly removed.
Next, the experimental example in which the latent scratches are removed using the above-described etching process will be described with reference to
Each of the photographs shown in
The photograph written UNPROCESSED in the upper left part is that in a case that the etching process is not performed. This photograph shows many fine polishing scratches on the surface.
Photographs when performed etching process under each of the conditions are shown in the right side of the photograph written UNPROCESSED. In these photographs, it can be seen that, when the pressure is 133 Pa or more, the polishing scratches and internal latent scratches are emphasized and scratches are clearly appeared. By contrast, it can be seen that, when the pressure is 1 Pa or less, these scratches are removed.
This would be because, when the pressure is 133 Pa or more, a low rate of etching results in a preferential etching of a low crystallinity portion having the polishing scratches and latent scratches, and therefore scratches are remained (emphasized). By contrast, when the pressure is 1 Pa or less, a high rate of etching results in etching of not only the polishing scratches and latent scratches but also a plane without these scratches. As a result, since the surface of the SiC substrate 40 can be etched uniformly, the above-described scratches can be removed.
It is described that the surface roughness is 1 nm or less at a stage of further etching of 5 μm or more and thereby a smooth surface can be obtained. It is also described that the latent scratches are further removed by etching of 7 μm or more, and then the smooth surface can be obtained by further etching of 10 μm or more. Moreover, this method can confirm that the latent scratches are existing by etching of 0.5 μm to 4 μm, preferably 1 μm to 3 μm.
Before etching (when the amount of etching is 0), it can be seen that the peak shift is positioned at a numerical value considerably away from 0 and the relatively large residual stress is existing. In this method, the latent scratches of the SiC substrate can be detected without etching. Similarly to
Next, an experiment performed for evaluating the conditions for suppressing a step bunching will be described with reference to
The photograph at the second line from the top of
As shown in
As shown in
Accordingly, in order to suppress the occurrence of the step bunching when Si etching is performed to the SiC substrate, the rate of etching has to be larger than a predetermined rate and the amount of etching has to be deeper than the predetermined amount.
As described above, in this embodiment, the process for controlling the rate of etching by adjusting the inert gas pressure, and the process for etching by heating the SiC substrate 40 after performing the mechanical processing are performed.
Accordingly, the latent scratches or the like can be removed if the latent scratches or the like are existing. Thus, since the surface is not roughened even when the epitaxial growth, heat treatment and the like are performed, the high-quality SiC substrate can be manufactured. The etching by the above-described method can considerably shorten the process time rather than the use of the mechanical polishing, chemical mechanical polishing, and hydrogen etching. Moreover, adjusting the inert gas pressure can adjust the rate of etching, and therefore too much removal of the SiC substrate 40 can be prevented.
In this embodiment, a method for manufacturing the semiconductor including a latent scratches removal step, an epitaxial growth step, and a heat treatment step is provided. In the latent scratches removal step, the surface of the SiC substrate 40 is etched by the above-described surface treatment method. In the epitaxial growth step, the surface of the SiC substrate 40 causes an epitaxial growth of the single crystal SiC. In the heat treatment step, the SiC substrate 40 after performing the epitaxial growth step is heated.
Accordingly, the surface is not roughened when the epitaxial growth, heat treatment and the like are performed. This can manufacture the high-quality semiconductor.
In this embodiment, in the heat treatment step, it is preferable that the SiC substrate 40 is heated and etched while controlling the rate of etching by adjusting the inert gas pressure around the SiC substrate 40.
Thus, the latent scratches removal step and the heat treatment step perform the same processing. This can simplify the steps and can easily perform the processing in the same high-temperature vacuum furnace 10.
Although a preferred embodiment of the present invention has been described above, the above-described configuration can be modified, for example, as follows.
Although the above-described embodiment does not include the process of forming a carbon layer (graphene cap), it is acceptable to perform this process. In such a case, the process of removing the carbon layer, the process of activating ions, and the process of etching the single crystal SiC substrate can be implemented in a single process.
Any method is adoptable for adjusting the inert gas. An appropriate method can be used. During the etching process, the inert gas pressure may be kept constant or may be varied. Varying the inert gas pressure may be employed in a case of, for example, initially setting the high rate of etching and then lowering the rate of etching for fine adjustment.
The environment of the processing, the single crystal SiC substrate used, and the like, are merely illustrative ones, and the present invention is applicable to various environments and various types of single crystal SiC substrates. For example, the heating temperature is not limited to the temperature illustrated above, and a lower heating temperature enables further lowering of the rate of etching. Moreover, a heating apparatus other than the above-described high-temperature vacuum furnace is adoptable.
In this embodiment, the SiC substrate 40 having the latent scratches is etched for removing the latent scratches, but etching may be performed without checking whether or not the latent scratches are occurred. This can omit the labor for checking whether or not the latent scratches are occurred.
Number | Date | Country | Kind |
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2014-074749 | Mar 2014 | JP | national |
Filing Document | Filing Date | Country | Kind |
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PCT/JP2015/001303 | 3/10/2015 | WO | 00 |