Patent Application
20130308289
The present invention relates to a tap tape for electronic components with reinforced lead crack and a method of manufacturing the tap tape. cl BACKGROUND ART
Recently, in a technical field of a semiconductor device, there have been trends of thinning, miniaturizing, high-integrating, high-speeding and multi-pinning. For these objects, a tape carrier film has been widely used, on which wiring patterns are formed on a thin film tape material as a wiring substrate used for mounting semiconductor chips.
A semiconductor chip is mounted on a tape carrier film and packaged, and it refers to as a tape carrier package (TCP). In a case where the tape carrier package is manufactured using a tape carrier film, it is possible to use a technology of tape automated bonding (TAB) when connecting consistently a semiconductor chip and a lead on the tape carrier film, and thus it refers to as a tap tape.
In a prior tap tape for electronic components, a wiring pattern connected from an inner lead to an outer lead has a narrow wiring width and thus cracks are formed due to a weak bending property.
The technical problem to be solved by the present invention relates to provide a tap tape for electronic devices and a method of manufacturing the tap tape in which with respect to a connecting configuration, by forming a cut-part (hereinafter, refer to as cutting portion) on a narrow circuit pattern and forming the cutting portion within a resin application portion and without being a bending portion, lead crack problem may be solved.
The technical solutions are solved by forming a cutting portion on a narrow circuit pattern to be connected from a first lead to a second lead and forming the cutting portion within a resin application portion and without being a bending portion, crack occurred on a narrow wiring width can be solved.
In addition, a cutting portion is formed on a circuit pattern to be connected from the first lead to the second lead of a dielectric substrate wherein at least one or more of portions of different intervals between lead patterns are provided.
According to the present invention, by forming a cutting portion on a narrow circuit pattern to be connected from a first lead to a second lead and forming the cutting portion within a resin application portion and without being a bending portion, crack occurred on a narrow wiring width can be solved.
The technical advantageous effects are not limited thereto and it has to be understood that other effects not set forth in the forgoing are obvious to a person who has ordinary skill in the art.
The above and other aspects, features and advantages of certain exemplary embodiments of the present invention will be more apparent from the following description taken in conjunction with the accompanying drawings, in which:
Exemplary embodiments of the present invention will be described below in detail with reference to the accompanying drawings. Wherever possible, the same reference numerals will be used to refer to the same elements throughout the specification, and a duplicated description thereof will be omitted. It will be understood that although the terms first , second , etc. are used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element.
A tap tape according to the present invention, as shown
Furthermore, referring to a partly exploded a wiring pattern 120 as shown in
Further, detailed configurations of the tap tape according to the present invention will be described, referring to
A conductive thin film such as cupper foil may be formed on a dielectric substrate 110 and then a wiring pattern may be formed using a photo etching. Here, a plurality of sprocket holes 111 may be formed at a predetermined distance on both edges of the dielectric substrate 110.
Meanwhile, the wiring pattern 120 may include a second lead 122 to be connected electrically to a semiconductor chip using an inner lead bonding (ILB), a first lead 121 for connecting electrically to a terminal outside the substrate, and a connection portion 123 formed as a connecting pattern for connection the first lead 121 and the second lead 122.
Additionally, the second lead 122 is formed to have relatively narrow width in a consideration of being connected to connecting terminals of a fine pitch of a semiconductor chip and the first lead 121 is formed to have a relatively wide width in a consideration of being connected to a terminal outside a substrate, not corresponding directly to fine pitches of a semiconductor chip. The connecting portion 123 may be formed as a cut-form to have a predetermined length for connecting the second lead 122 having a narrow width and the first leads 121 having a wide width.
Here, the second lead 122 may be formed as a wiring pattern to be connected from an inner lead to an outer lead, having a narrow wiring width. Accordingly, in a case where the wiring pattern is formed straightly for connecting directly the first lead and the second lead, as in the prior art, a bending property may be weak and thereby creating cracks.
In order to solve this drawback, in the present invention, by forming the cutting portion 140 on a circuit pattern of the second lead 122 to widen a wiring width and by forming the cutting portion 140 within the resin application portion 130 and without being a bending portion, the crack problem may be solved or avoided.
In more detailed description of the circuit pattern of the second lead 122, as shown in
By forming the cutting portion in a place where a wiring width is relatively narrower than other places, that is, a circuit pattern of the second lead 122 to be connected from the first lead (for example, inner lead) to the second lead (for example, outer lead), and forming it within the resin application portion after an IC bonding, and designing a lead wiring pattern of two times as an existing lead wiring pattern in a case of an outer part of the resin application portion not to be IC bonded, lead crack can be avoided.
Furthermore, by forming further a plating treatment layer as a single layer or multi layer on a circuit pattern surface of the first lead and the second lead, using one, binary alloy or ternary alloy of Cu, Ni, Pd, Au, Sn, Ag, Co, a circuit pattern can be protected and conductivity of the lead wiring pattern can be improved.
Manufacturing Method of a Tap Tape for Electronic Devices
Referring to
First, a conductive thin film may be formed on one surface of a dielectric substrate 110. At this time, the conductive thin film may be formed as a sputtered-metal layer on a whole surface of the dielectric film. The metal layer may be formed by sputtering one of Cu, Ni, Pd, Au, Sn, Ag, Co. Further, a plating treatment layer may be further formed as a single layer or multi layer using one, binary alloy or ternary alloy of Cu, Ni, Pd, Au, Sn, Ag, Co.
Next, a wiring pattern may be formed by etching selectively the conductive thin film wherein a cutting portion 140 may be formed on a circuit pattern to be connected from the firs lead (inner lead) to the second lead (outer lead), having relatively a narrow wiring width.
Here, the circuit pattern may be separated into the first lead pattern 141 and the second lead pattern 142, based on the cutting portion 140, and may include a connecting pattern for cutting and connecting a portion between the first and second leads 141, 142, based on the cutting portion 140. At this time, a wiring width of the first lead pattern 141 may be wider than that of the second lead pattern 142. The cutting portion 140 may be formed within the resin application portion and without being a bending portion.
According to a tap tape for electronic devices and a method of the tap tape of the present invention, by forming a cutting portion on a narrow circuit pattern to be connected from a first lead to a second lead and forming the cutting portion within a resin application portion and without being a bending portion, the technical object of the present invention can be achieved.
The tap tape according to the present invention may be packaged by applying resin on an electronic device chip to be mounted within the resin application portion 130. The resin to be applied on the resin application portion 130 may be potting material having viscosity, comprising epoxy, epoxy resin, curing material, or inorganic filler.
While the invention has been shown and described with reference to exemplary embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims. Therefore, the scope of the invention is defined not by the detailed description of the invention but by the appended claims, and all differences within the scope will be construed as being included in the present invention.
| Number | Date | Country | Kind |
|---|---|---|---|
| 10-2011-0009610 | Jan 2011 | KR | national |
| Filing Document | Filing Date | Country | Kind | 371c Date |
|---|---|---|---|---|
| PCT/KR2011/007580 | 10/12/2011 | WO | 00 | 7/30/2013 |
