Patent Application
20110220288
The present disclosure relates to a temperature control system, a temperature control method, a plasma processing apparatus and a computer storage medium.
Conventionally, in a manufacturing process of a semiconductor device, there has been used a plasma processing apparatus such as a plasma etching apparatus for processing a substrate such as a semiconductor wafer or a glass substrate for a liquid crystal display (LCD) by using plasma.
By way of example, there has been known a plasma etching apparatus in which a lower electrode serves as a mounting table for mounting a substrate thereon and an upper electrode is provided in a processing chamber opposite to the lower electrode, and plasma of a processing gas is generated by applying a high frequency power between these electrodes.
In such a plasma etching apparatus, a temperature of each component of the processing chamber may influence a processed state of the substrate. For this reason, the temperature of each component of the processing chamber needs to be controlled. As a method for controlling the temperature of each component of the processing chamber to a desired temperature, there has been known a method of providing both a heating unit such as a resistance heater and a chiller for cooling the components by flowing a coolant and performing cooling and heating of the components by the heating unit and the chiller (See, for example, Patent Document 1).
As stated above, as a temperature control system for controlling the temperature of the processing chamber of the plasma etching apparatus or the like, there has been conventionally known a temperature control system for controlling the temperature of the processing chamber to a predetermined temperature by performing both cooling by the chiller and heating by the heater.
Recently, however, energy consumption needs to be reduced in order to suppress global warming or the like. To meet such a requirement, there is a demand for developing a temperature control system capable of reducing energy consumption more effectively.
In view of the foregoing, the present disclosure provides a temperature control system capable of achieving energy saving by reducing power consumption as compared to a conventional system and also provides a temperature control method, a plasma etching apparatus and a computer storage medium.
In accordance with one aspect of the present disclosure, there is provided a temperature control system configured to control a temperature of a temperature control target member of a processing chamber for performing a plasma process on a substrate therein. The temperature control system includes a heating unit configured to heat the temperature control target member; a cooling unit configured to cool the temperature control target member by circulating a liquid coolant; and a flow rate control unit configured to control a flow rate of the coolant into the temperature control target member by the cooling unit to a first flow rate when plasma is generated within the processing chamber and to a second flow rate lower than the first flow rate when plasma is not generated within the processing chamber.
In accordance with another aspect of the present disclosure, there is provided a temperature control method that controls a temperature of a temperature control target member of a processing chamber for performing a plasma process on a substrate therein by a temperature control system including a heating unit configured to heat the temperature control target member, and a cooling unit configured to cool the temperature control target member by circulating a liquid coolant. The temperature control method includes controlling a flow rate of the coolant into the temperature control target member by the cooling unit to a first flow rate when plasma is generated within the processing chamber and to a second flow rate lower than the first flow rate when plasma is not generated within the processing chamber.
In accordance with still another aspect of the present disclosure, there is provided a plasma processing apparatus including a processing chamber; a lower electrode serving as a mounting table configured to mount a substrate thereon within the processing chamber; an upper electrode disposed opposite to the lower electrode within the processing chamber; a gas supply mechanism configured to supply a processing gas into the processing chamber; a high frequency power supply configured to supply a high frequency power to the lower electrode and excite the processing gas into plasma; a heating unit configured to heat a temperature control target member of the processing chamber; a cooling unit configured to cool the temperature control target member by circulating a liquid coolant; and a flow rate control unit configured to control a flow rate of the coolant into the temperature control target member by the cooling unit to a first flow rate when plasma is generated within the processing chamber and to a second flow rate lower than the first flow rate when plasma is not generated within the processing chamber.
In accordance with the present disclosure, there is provided a temperature control system capable of achieving energy saving by reducing power consumption as compared to a conventional system and also provides a temperature control method, a plasma etching apparatus and a computer storage medium.
Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.
The plasma etching apparatus 1 is configured as an etching apparatus of a capacitively coupled parallel plate type in which upper and lower electrode plates are disposed opposite to each other in parallel and a power supply for generating plasma is connected to the electrode plates.
The plasma etching apparatus 1 may include a cylindrical processing chamber 2 made of, e.g., aluminum whose surface is anodically oxidized, and the processing chamber 2 is grounded. Further, a substantially cylindrical susceptor (mounting table) 5 for mounting thereon a target substrate such as a semiconductor wafer W is installed on a bottom of the processing chamber 2 via an insulating cylindrical support 3 made of, e.g., ceramic. The susceptor 5 serves as a lower electrode, and a high pass filter (HPF) 6 is connected to the susceptor 5.
Inside of the susceptor 5, a cooling cavity 7 is provided. A coolant is introduced into the cooling cavity 7 through a coolant introduction line 8 and circulated therein, and then discharged through a coolant discharge line 9. Further, a heater 4 is provided in the susceptor 5. A cold heat of the coolant in the cooling cavity 7 and a heat from the heater 4 are thermally transferred to the semiconductor wafer W via the susceptor 5, and, thus, a temperature of the semiconductor wafer W can be controlled to a predetermined temperature.
An upper central portion of the susceptor 5 is formed in a protruded circular plate shape on which a circular electrostatic chuck 11 having substantially the same diameter as the semiconductor wafer W is installed. The electrostatic chuck 11 may include an electrode 12 embedded within an insulating member. Further, a DC voltage of, e.g., about 1.5 kV is applied to the electrostatic chuck 11 from a DC power supply 13 connected to the electrode 12, so that the semiconductor wafer W is electrostatically attracted to the electrostatic chuck 11 by, e.g., a Coulomb force.
The heater 4 may include, e.g., a spiral-shaped resistance heating element sealed up within the insulating member of the electrostatic chuck 11. In the present embodiment, the resistance heating element is divided into an inner heating element 4a and an outer heating element 4b in a radial direction of the susceptor 5 as shown in
Formed in the susceptor 5 and the electrostatic chuck 11 is a gas passage 14 through which a heat transfer medium (for example, a He gas) is supplied to a rear surface of the semiconductor wafer W. A cold heat and a heat of the susceptor 5 are transferred to the semiconductor wafer W by the heat transfer medium, and, thus, the temperature of the semiconductor wafer W is maintained to a predetermined temperature.
An annular focus ring 15 is installed at an upper periphery of the susceptor 5 so as to surround the semiconductor wafer W mounted on the electrostatic chuck 11. The focus ring 15 is made of, e.g., silicon and improves etching uniformity in the surface of the semiconductor wafer W.
Above the susceptor 5, there is installed an upper electrode 21 facing the susceptor 5 in parallel. The upper electrode 21 is supported at an upper portion of the processing chamber 2 via an insulating member 22. The upper electrode 21 may include an electrode plate 24 and an electrode support 25 made of a conductive material, for supporting the electrode plate 24. The electrode plate 24 is made of, e.g., a conductor or a semiconductor and is provided with a multiple number of discharge holes 23. The electrode plate 24 serves as a facing surface to the susceptor 5.
A gas introduction port 26 is formed at the center of the electrode support 25 of the upper electrode 21, and the gas introduction port 26 is connected with a gas supply line 27. Further, a processing gas supply source 30 is connected to the gas supply line 27 via a valve 28 and a mass flow controller 29. The processing gas supply source 30 supplies a processing gas for plasma etching.
An exhaust line 31 is connected to the bottom of the processing chamber 2, and the exhaust line 31 is connected to a gas exhaust device 35. The gas exhaust device 35 may include a vacuum pump such as a turbo-molecular pump and is configured to evacuate the inside of the processing chamber 2 to create a predetermined depressurized atmosphere therein, i.e., to a predetermined pressure of, e.g., about 1 Pa or less. Further, a gate valve 32 is provided at a sidewall of the processing chamber 2, and with the gate valve 32 open, and the semiconductor wafer W is transferred to/from an adjacent load-rock chamber (not illustrated).
The upper electrode 21 is connected with a first high frequency power supply 40, and a matching unit 41 is provided on a power supply line thereof. Further, the upper electrode 21 is connected with a low pass filter (LPF) 42. The first high frequency power supply 40 outputs a high frequency power ranging from about 50 MHz to about 150 MHz. Accordingly, it is possible to generate high-density plasma in a desirable dissociated state within the processing chamber 2 by applying a high frequency power in such a frequency range.
The susceptor 5 serving as a lower electrode is connected with a second high frequency power supply 50, and a matching unit 51 is provided on a power supply line thereof. Further, the second high frequency power supply 50 outputs a high frequency power in a range lower than the frequency of the first high frequency power supply 40. It is possible to provide an appropriate ion action without damaging the semiconductor wafer W serving as a target substrate by applying a high frequency power in such a frequency range. By way of example, the second high frequency power supply 50 may output a high frequency power of about 20 MHz or less (about 13.56 MHz in the present embodiment).
An entire operation of the above-described plasma etching apparatus 1 is controlled by a controller 60. The controller 60 may include a process control unit 61 having a CPU, for controlling each component of the plasma etching apparatus 1; a user interface 62; and a storage unit 63.
The user interface 62 may include a keyboard through which a process manager inputs commands to manage the plasma etching apparatus 1 or a display for visually showing an operation status of the plasma etching apparatus 1.
The storage unit 63 may store a control program (software) for executing various processes performed in the plasma etching apparatus 1 under the control of the process control unit 61; or recipes that store processing condition data. If necessary, a desired process is performed in the plasma etching apparatus 1 under the control of the process control unit 61 by retrieving a recipe from the storage unit 63 in response to an instruction from the user interface 62 and executing the recipe by the process control unit 61. Further, the control program or the recipe of the processing condition data which is stored in a computer-readable storage medium (for example, a hard disk, a CD, a flexible disk, a semiconductor memory or the like) may be used. Alternatively, the control program or the recipe may be used on-line by receiving it from another apparatus through, for example, a dedicated line whenever necessary.
When the semiconductor wafer W is plasma-etched by the above-described plasma etching apparatus 1, the gate valve 32 is opened, and, then, the semiconductor wafer W is loaded into the processing chamber 2 from a non-illustrated load-rock chamber and the semiconductor wafer W is mounted on the electrostatic chuck 11. A DC voltage is applied from the DC voltage power supply 13 to the electrostatic chuck 11, so that the semiconductor wafer W is electrostatically attracted to and held on the electrostatic chuck 11. Subsequently, the gate valve 32 is closed, and, then, the inside of the processing chamber 2 is evacuated to a predetermined vacuum level by the gas exhaust device 35.
Thereafter, the valve 28 is opened, and a processing gas is introduced into a hollow region of the upper electrode 21 from the processing gas supply source 30 through the gas supply line 27 and the gas introduction port while its flow rate is controlled by the mass flow controller 29. Then, the processing gas is uniformly discharged toward the semiconductor wafer W through the discharge holes 23 of the electrode plate 24 as indicated by arrows of
An internal pressure of the processing chamber 2 is maintained at a predetermined pressure. Then, a high frequency power of a predetermined frequency is applied to the upper electrode 21 from the first high frequency power supply 40. Accordingly, a high frequency electric field is generated between the upper electrode 21 and the susceptor 5 serving as the lower electrode, so that the processing gas is dissociated and excited into plasma.
Meanwhile, a high frequency power of a frequency lower than the frequency of the first high frequency power supply 40 is applied from the second high frequency power supply 50 to the susceptor 5 serving as the lower electrode. Accordingly, ions in the plasma are attracted toward the susceptor 5 and etching anisotropy is improved by ion-assist.
If the plasma etching process is terminated, the supplies of the high frequency power and the processing gas are stopped, and the semiconductor wafer W is unloaded from the processing chamber 2 in the reverse order to that described above.
In the present embodiment, there will be explained a case of controlling the temperature of the susceptor (mounting table) 5 as a temperature control target member in the processing chamber 2 of the plasma etching apparatus 1. The aforementioned heater 4 including the resistance heating element is provided in the susceptor 5, and the electrostatic chuck 11 is installed on the heater 4. The electrostatic chuck 11 is configured to electrostatically attract the semiconductor wafer W thereon. Further, the susceptor 5 may have a thermometer 102 for measuring the temperature of the susceptor 5 (temperature of a rear surface of the electrostatic chuck 11 in the present embodiment).
Further, the cooling cavity 7 is provided within susceptor 5. A liquid coolant is introduced into the cooling cavity 7 through the coolant introduction line 8 and circulated therein, and, then, the liquid coolant is discharged through the coolant discharge line 9. The coolant introduction line 8 and the coolant discharge line 9 are connected to a chiller 110 including a cooling mechanism for cooling the coolant to a certain temperature and a pump for circulating the coolant. In the present embodiment, a three-way valve 111 as a flow path switching mechanism is installed on a part of the coolant introduction line 8, and there is provided a bypass line 112 through which the three-way valve 111 and the coolant discharge line 9 are allowed to communicate with each other.
The temperature controller 101 controls a power to be supplied to the heater 4 from the heater power supply 73 based on a temperature measurement signal of the thermometer 102. Further, the temperature controller 101 controls the three-way valve 111 such that the coolant flows from the chiller 110 into the cooling cavity 7 of the susceptor 5 or the coolant flows through the bypass line 112 by bypassing the susceptor 5. Although only one of the heater power supplies 73 and only one of the filter units 71 are illustrated in
The temperature controller 101 receives a control signal from the process control unit 61 of
Referring to a flowchart of
Meanwhile, when it is determined that the plasma etching apparatus 1 is not in the standby state but in the plasma process state, the three-way valve 111 is connected to the susceptor 5 (step 303). Accordingly, the coolant flows into the cooling cavity 7 of the susceptor 5 from the chiller 110.
In accordance with the temperature control system 100 of the present embodiment, when the plasma etching apparatus 1 is in the standby state, the coolant can be controlled so as not to flow from the chiller 110 into the cooling cavity 7 of the susceptor 5. Accordingly, when the plasma etching apparatus 1 is in the standby state and the susceptor 5 is heated only by the heater 4 without receiving a heat from plasma, cooling of the susceptor 5 by the coolant from the chiller 110 can be prevented.
When the plasma etching apparatus 1 is in the standby state, if the susceptor 5 is cooled by the coolant from the chiller 110 and heated by the heater 4 at the same time, the power to be supplied to the heater 4 may be increased. However, in the present embodiment, when the plasma etching apparatus 1 is in the standby state, the susceptor 5 can be maintained at a predetermined temperature (for example, about 40° C.˜about 60° C.) just by being heated by the heater 4. Accordingly, it is possible to reduce the power supply amount to the heater 4 as compared to a case of cooling the susceptor 5 by the coolant as well.
Further, since the susceptor 5 is not unnecessarily cooled, the capacity of the heater 4 can be reduced as compared to the conventional case, and, thus, sizes of the heater power supplies 73 and the filter units 71 can also be reduced.
Meanwhile, when the plasma etching apparatus 1 is in the plasma process state and a heat from plasma is applied to the susceptor 5, the susceptor 5 is cooled by the coolant flowing from the chiller 110 into the cooling cavity 7 of the susceptor 5 and heated by heater 4 at the same time, so that the temperature of the susceptor 5 can be accurately controlled at a predetermined temperature and can be promptly changed.
Meanwhile, when it is determined that the temperature of the susceptor 5 does not increase in the off state of the heater 4, the three-way valve 111 is connected to the bypass line 112 (step 302). Accordingly, the coolant flows through the bypass line 112 without flowing into the cooling cavity 7 of the susceptor 5. As discussed above, the susceptor 5 is cooled by the coolant from the chiller 110 only when the temperature of the susceptor 5 increases due to a great amount of heat from plasma even when the heater 4 is off. Thus, it is possible to save redundant power that would be consumed for heating the heater 4 when both cooling of the susceptor 5 and heating of the susceptor 5 by the heater 4 are performed at the same time.
The present disclosure is not limited to the above-described embodiments and can be modified in various ways. The plasma etching apparatus is not limited to the parallel plate type apparatus that applies high frequency powers to the upper electrode and the lower electrode as illustrated in
| Number | Date | Country | Kind |
|---|---|---|---|
| 2010-052520 | Mar 2010 | JP | national |
This application claims the benefit of Japanese Patent Application No. 2010-052520 filed on Mar. 10, 2010 and U.S. Provisional Application Ser. No. 61/317,496 filed on Mar. 25, 2010, the entire disclosures of which are incorporated herein by reference.
| Number | Date | Country | |
|---|---|---|---|
| 61317496 | Mar 2010 | US |
