Patent Application
20240071878
This application claims the benefit of priority to, Chinese Patent Application No. 2022110205996, filed Aug. 24, 2022, entitled “Two-In-One Lead Frame Package,” which application is incorporated herein by reference in its entirety.
Embodiments of the present disclosure relate to transient voltage suppression devices and, more particularly, to package for the devices.
Transient voltage suppression (TVS) diodes are electronic components designed to protect sensitive electronics from high voltage transients. TVS diodes can respond to overvoltage events faster than most other types of circuit protection devices and are available in a variety of surface mount and through-hole circuit board mounting formats. TVS diodes are generally used to protect against electrical overstress such as those induced by lightning strikes, inductive load switching, and electrostatic discharge (ESD) associated with transmission on data lines and electronic circuits.
It is with respect to these and other considerations that the present improvements may be useful.
This Summary is provided to introduce a selection of concepts in a simplified form that are further described below in the Detailed Description. This Summary is not intended to identify key or essential features of the claimed subject matter, nor is it intended as an aid in determining the scope of the claimed subject matter.
An exemplary embodiment of a lead frame package in accordance with the present disclosure may include a first semiconductor chip, a second semiconductor chip, and a first lead frame. The first semiconductor chip is connected to a die attachment pad using a first clip. The second semiconductor chip is connected to the die attachment pad using a second clip. The die attachment pad is sandwiched between the first semiconductor chip and the second semiconductor chip. The first lead frame is connected to the die attachment pad.
An exemplary embodiment of a method in accordance with the present disclosure may include three dispensing and two attaching operations. A high-temperature attachment material (HTAM) is dispensed onto a first side of a die attachment pad of a lead frame package. A first chip is attached to the first side, and the HTAM affixes the first chip to the die attachment pad. The HTAM is dispensed onto the first chip. The HTAM is dispensed onto a first lead portion and the first clip is attached between the first chip and the first lead portion, with the HTAM affixing the first clip to the first chip and the first lead portion.
Multiple embodiments of lead frame packages are disclosed. The two-in-one design of these packages enhances the power density of the protection device by supporting two semiconductor devices in one package. Different combinations of semiconductors are possible and allow two-channel design for the package. Clips holding the semiconductor chips may be attached using high-temperature attachment material or low-temperature attachment material, of which there are several choices for each. The lead frame packages may have two leads or three lead frames, with one of the lead frames being attached to the die attachment pad. The lead frames may be of the surface mount or dual inline package types.
For the sake of convenience and clarity, terms such as “top”, “bottom”, “upper”, “lower”, “vertical”, “horizontal”, “lateral”, “transverse”, “radial”, “inner”, “outer”, “left”, and “right” may be used herein to describe the relative placement and orientation of the features and components, each with respect to the geometry and orientation of other features and components appearing in the perspective, exploded perspective, and cross-sectional views provided herein. Said terminology is not intended to be limiting and includes the words specifically mentioned, derivatives therein, and words of similar import.
Part 112a is connected to part 112b, which is connected to part 112c, thus forming the clip 112. Part 112a of clip 112 is horizontally disposed and lays flat against the chip 110. Part 112b is a raised portion of clip 112, parallel to part 112a, and in a different plane than part 112a. Part 112c is vertically disposed and is connected to lead frame 104. In exemplary embodiments, part 112a of clip 112 is attached to chip 110 using low-temperature attachment material (LTAM). Further, in exemplary embodiments, chip 110 is attached to the die attachment pad 108 using LTAM and clip 112 is attached to lead frame 104 using LTAM.
Part 116a is connected to part 116b, which is connected to part 116c, thus forming the clip 116. Part 116a of clip 116 is horizontally disposed and lays flat against the chip 114. Part 116b is a lowered portion of clip 116, parallel to part 116a, and in a different plane than part 116a. Part 116c is vertically disposed and is connected to lead frame 104 (or, optionally, to a third lead frame not shown). In exemplary embodiments, part 116a of clip 116 is attached to chip 114 using high-temperature attachment material (HTAM). Further, in exemplary embodiments, chip 114 is attached to the die attachment pad 108 using HTAM and clip 116 is attached to lead frame 104 (or, optionally, to a third lead frame) using HTAM. In some embodiments, chip 110 and chip 114 are the same semiconductor devices, such as a TVS diode. In other embodiments, chip 110 is a first semiconductor device while chip 114 is a second, different semiconductor device.
In some embodiments, the high-temperature attachment material (HTAM) is an Ag sintering epoxy. In other embodiments, the HTAM is a high Pb solder. In still other embodiments, the HTAM is a transient liquid phase bonding (TLPS) solder. In some embodiments, the low-temperature attachment material (LTAM) is an SAC solder (tin, silver, and copper, or SnAgCu) Ag epoxy. In other embodiments, the LTAM is a high lead (Pb) solder while the HTAM is either a silver (Ag) sintering epoxy or a TLPS solder. Both LTAM and HTAM are conductive materials, with LTAM having a lower melting point than HTAM. In exemplary embodiments, when soldering/curing the LTAM, the HTAM does not remelt or dissolve. The silver content epoxy, such as Ag sintering epoxy, is special in that it can act as both LTAM and HTAM.
The lead frame package 100 features a lead frame 102 having three connected parts, 102a, 102b, and 102c (collectively, “lead frame 102”). Part 102a is connected to part 102b, which is connected to part 102c, thus forming lead frame 102. Part 102a is horizontally disposed and connected to a die attachment pad 108. Part 102b is vertically disposed, and part 102c is horizontally disposed, in a different plane from part 102a and parallel to part 102a. Part 102c is the part of lead frame 102 that is to be soldered to a printed circuit board (PCB).
The lead frame package 100 also features a lead frame 104 having three connected parts, 104a, 104b, and 104c (collectively, “lead frame 104”). Part 104a is connected to part 104b, which is connected to part 104c, thus forming lead frame 104. Part 104a is horizontally disposed and connects to the clips 112 and 116. Further, part 104a does not connect to the die attachment pad 108. Part 104b is vertically disposed, and part 104c is horizontally disposed, in a different plane from part 104a and parallel to part 104a. Part 104c is the part of lead frame 104 that is to be soldered to a PCB. The lead frame 102 and the lead frame 104 are partially outside the housing 118.
Optionally, the lead frame package 100 may include a third lead terminal (not shown) “behind” the lead frame 104. Like the lead frame 104, the third lead frame would also not be connected to the die attachment pad 108. Thus, only the first lead frame 102 connects to the die attachment pad 108.
The two-in-one package design of the lead frame package 100 enhances the power density of the protection device by supporting two semiconductor devices (the chips 110 and 114). This two-in-one design further allows the flexibility of having different product combinations housed in the same package, such as where chip 110 is different from chip 114. Finally, the two-in-one design allows a two-channel design for the chip, where one channel support chip 110 and the other channel supports chip 114. Existing lead frame packages feature a single chip/clip attachment on one lead frame side.
The lead frame package 200 features a first chip 210 disposed above a die attachment pad 208 and a second chip 214 disposed below the die attachment pad. The chip 210 is held in place using a clip having three connected parts 212a, 212b, and 212c (collectively, “clip 212”). The chip 214 is held in place using a clip having three connected parts 216a, 216b, and 216c (collectively, “clip 216”). In exemplary embodiments, the parts 216a, 216b, and 216c are formed as a unitary conductive material, such as zinc, copper, silver, aluminum, or alloys or combinations thereof. The present disclosure is not limited in this regard.
Part 212a is connected to part 212b, which is connected to part 212c, thus forming the clip 212. Part 212a of clip 212 is horizontally disposed and lays flat against the chip 210. Part 212b is a raised portion of clip 212, parallel to part 212a, and in a different plane than part 212a. Part 212c is vertically disposed and is connected to lead frame 204. In exemplary embodiments, part 212a of clip 212 is attached to chip 210 using LTAM. Further, in exemplary embodiments, chip 210 is attached to the die attachment pad 208 using LTAM and clip 212 is attached to lead frame 204 using LTAM.
Part 216a is connected to part 216b, which is connected to part 216c, thus forming the clip 216. Part 216a of clip 216 is horizontally disposed and lays flat against the chip 214. Part 216b is a lowered portion of clip 216, parallel to part 216a, and in a different plane than part 216a. Part 216c is vertically disposed and is connected to lead frame 204. In exemplary embodiments, part 216a of clip 216 is attached to chip 214 using HTAM. Further, in exemplary embodiments, chip 214 is attached to the die attachment pad 208 using HTAM and clip 216 is attached to lead frame 204 using HTAM. In some embodiments, chip 210 and chip 214 are the same semiconductor devices, such as a TVS diode. In other embodiments, chip 210 is a first semiconductor device while chip 214 is a second, different semiconductor device.
The lead frame package 200 features a lead frame 202 having three connected parts, 202a, 202b, and 202c (collectively, “lead frame 202”). Part 202a is connected to part 202b, which is connected to part 202c, thus forming lead frame 202. Part 202a is horizontally disposed and connected the lead frame 202 to the die attachment pad 208. Part 202b is vertically disposed, and part 202c is horizontally disposed, in a different plane from part 202a and parallel to part 202a. Part 202c is the part of lead frame 202 that is to be soldered to a PCB. The lead frame 202 and the lead frame 204 are partially outside the housing 218. In exemplary embodiments, the parts 202a, 202b, and 202c are formed as a unitary conductive material, such as zinc, copper, silver, aluminum, or alloys or combinations thereof. The present disclosure is not limited in this regard.
The lead frame package 200 also features a lead frame 204 having three connected parts, 204a, 204b, and 204c (collectively, “lead frame 204”). Part 204a is connected to part 204b, which is connected to part 204c, thus forming lead frame 204. Part 204a is horizontally disposed and connected to the clips 212 and 216. Part 204b is vertically disposed, and part 204c is horizontally disposed, in a different plane from part 204a and parallel to part 204a. Part 204c is the part of lead frame 204 that is to be soldered to a PCB.
The lead frame package 300 features a first chip 310 disposed above a die attachment pad 308 and a second chip 314 disposed below the die attachment pad. The chip 310 is held in place using a clip having three connected parts 312a, 312b, and 312c (collectively, “clip 312”). The chip 314 is held in place using a clip having three connected parts 316a, 316b, and 316c (collectively, “clip 316”). In exemplary embodiments, the parts 316a, 316b, and 316c are formed as a unitary conductive material, such as zinc, copper, silver, aluminum, or alloys or combinations thereof. The present disclosure is not limited in this regard.
Part 312a is connected to part 312b, which is connected to part 312c, thus forming the clip 312. Part 312a of clip 312 is horizontally disposed and lays flat against the chip 310. Part 312b is a raised portion of clip 312, parallel to part 312a, and in a different plane than part 312a. Part 312c is vertically disposed and is connected to lead frame 304. In exemplary embodiments, part 312a of clip 312 is attached to chip 310 using LTAM. Further, in exemplary embodiments, chip 310 is attached to the die attachment pad 308 using LTAM and clip 312 is attached to lead frame 304 using LTAM.
Part 316a is connected to part 316b, which is connected to part 316c, thus forming the clip 316. Part 316a of clip 316 is horizontally disposed and lays flat against the chip 314. Part 316b is a lowered portion of clip 316, parallel to part 316a, and in a different plane than part 316a. Part 316c is vertically disposed and is connected to lead frame 306. In exemplary embodiments, part 316a of clip 316 is attached to chip 314 using HTAM. Further, in exemplary embodiments, chip 314 is attached to the die attachment pad 308 using HTAM and clip 316 is attached to lead frame 306 using HTAM. In some embodiments, chip 310 and chip 314 are the same semiconductor devices, such as a TVS diode. In other embodiments, chip 310 is a first semiconductor device while chip 314 is a second, different semiconductor device.
In contrast to the lead frame package 200, which has two lead frames 202 and 204, the lead frame package 300 has three lead frames 302, 304, and 306. The lead frame package 300 features a lead frame 302 having three connected parts, 302a, 302b, and 302c (collectively, “lead frame 302”). Part 302a is connected to part 302b, which is connected to part 302c, thus forming lead frame 302. Part 302a is horizontally disposed and connects the lead frame 302 to the die attachment pad 308. Part 302b is vertically disposed, and part 302c is horizontally disposed, in a different plane from part 302a and parallel to part 302a. Part 302c is the part of lead frame 302 that is to be soldered to a PCB.
The lead frame package 300 also features a lead frame 304 having three connected parts, 304a, 304b, and 304c (collectively, “lead frame 304”). Part 304a is connected to part 304b, which is connected to part 304c, thus forming lead frame 304. Part 304a is horizontally disposed and connected to the clip 312. Part 304b is vertically disposed, and part 304c is horizontally disposed, in a different plane from part 304a and parallel to part 304a. Part 304c is the part of lead frame 304 that is to be soldered to a PCB. The lead frame 302, the lead frame 304, and the lead frame 306 are partially outside the housing 318. In exemplary embodiments, the parts 302a, 302b, and 302c are formed as a unitary conductive material, such as zinc, copper, silver, aluminum, or alloys or combinations thereof. The present disclosure is not limited in this regard.
The lead frame package 300 also features a lead frame 306 having three connected parts, 306a, 306b, and 306c (collectively, “lead frame 306”), with lead frame 306 being adjacent to lead frame 304. Part 306a is connected to part 306b, which is connected to part 306c, thus forming lead frame 306. Part 306a is horizontally disposed and connected to the clip 316. Part 306b is vertically disposed, and part 306c is horizontally disposed, in a different plane from part 306a and parallel to part 306a. Part 306c is the part of lead frame 306 that is to be soldered to a PCB.
In contrast to the lead frame packages 100, 200, and 300, the lead frames of the lead frame package 400 resemble lead frames of dual inline packages (DIPs). Thus, the lead frames are known herein as DIP-type lead frames. The lead frame packages 100, 200, and 300 may be thought of as surface mount-type packages while the lead frame package 400 (and the lead frame package 500, described below) may be thought of as DIP-type packages.
The lead frame package 400 features a first chip 410 disposed above a die attachment pad 408 and a second chip 414 disposed below the die attachment pad. The chip 410 is held in place using a clip having three connected parts 412a, 412b, and 412c (collectively, “clip 412”). The chip 414 is held in place using a clip having three connected parts 416a, 416b, and 416c (collectively, “clip 416”). In exemplary embodiments, the parts 416a, 416b, and 416c are formed as a unitary conductive material, such as zinc, copper, silver, aluminum, or alloys or combinations thereof. The present disclosure is not limited in this regard.
Part 412a is connected to part 412b, which is connected to part 412c, thus forming the clip 412. Part 412a of clip 412 is horizontally disposed and lays flat against the chip 410. Part 412b is a raised portion of clip 412, parallel to part 412a, and in a different plane than part 412a. Part 412c is vertically disposed and is connected to DIP-type lead frame 404. In exemplary embodiments, part 412a of clip 412 is attached to chip 410 using LTAM. Further, in exemplary embodiments, chip 410 is attached to the die attachment pad 408 using LTAM and clip 412 is attached to lead frame 404 using LTAM.
Part 416a is connected to part 416b, which is connected to part 416c, thus forming the clip 416. Part 416a of clip 416 is horizontally disposed and lays flat against the chip 414. Part 416b is a lowered portion of clip 416, parallel to part 416a, and in a different plane than part 416a. Part 416c is vertically disposed and is connected to DIP-type lead frame 404. In exemplary embodiments, part 416a of clip 416 is attached to chip 414 using HTAM. Further, in exemplary embodiments, chip 414 is attached to the die attachment pad 408 using HTAM and clip 416 is attached to lead frame 404 using HTAM. In some embodiments, chip 410 and chip 414 are the same semiconductor devices, such as a TVS diode. In other embodiments, chip 410 is a first semiconductor device while chip 414 is a second, different semiconductor device.
The lead frame package 400 features a DIP-type lead frame 402 having four connected parts, 402a, 402b, 402c, and 402d (collectively, “DIP-type lead frame 402”). Part 402a is connected to part 402b, which is connected to parts 402c and 402d, thus forming DIP-type lead frame 402. Part 402a is horizontally disposed and connects the lead frame 402 to the die attachment pad 408. Parts 402b, 402c, and 402d are vertically disposed (orthogonal to part 402a), with parts 402c and 402d extending downward from part 402b. Parts 402c and 402d are the parts of DIP-type lead frame 402 that are to be soldered to a PCB. The lead frame 402 and the lead frame 404 are partially outside the housing 418. In exemplary embodiments, the parts 402a, 402b, and 402c are formed as a unitary conductive material, such as zinc, copper, silver, aluminum, or alloys or combinations thereof. The present disclosure is not limited in this regard.
The lead frame package 400 also features a DIP-type lead frame 404 having four connected parts, 404a, 404b, 402c, and 402d (collectively, “DIP-type lead frame 404”). Part 404a is connected to part 404b, which is connected to parts 404c and 404d, thus forming DIP-type lead frame 404. Part 404a is horizontally disposed and connected to the clips 412 and 416. Parts 404b, 404c, and 404d are vertically disposed (orthogonal to part 404a), with parts 404c and 404d extending downward from part 404b. Parts 404c and 404d are the parts of DIP-type lead frame 404 that are to be soldered to a PCB.
The lead frame package 500 features a first chip 510 disposed above a die attachment pad 508 and a second chip 514 disposed below the die attachment pad. The chip 510 is held in place using a clip having three connected parts 512a, 512b, and 512c (collectively, “clip 512”). The chip 514 is held in place using a clip having three connected parts 516a, 516b, and 516c (collectively, “clip 516”). In exemplary embodiments, the parts 516a, 516b, and 516c are formed as a unitary conductive material, such as zinc, copper, silver, aluminum, or alloys or combinations thereof. The present disclosure is not limited in this regard.
Part 512a is connected to part 512b, which is connected to part 512c, thus forming the clip 512. Part 512a of clip 512 is horizontally disposed and lays flat against the chip 510. Part 512b is a raised portion of clip 512, parallel to part 512a, and in a different plane than part 512a. Part 512c is vertically disposed and is connected to DIP-type lead frame 504. In exemplary embodiments, part 512a of clip 512 is attached to chip 510 using LTAM. Further, in exemplary embodiments, chip 510 is attached to the die attachment pad 508 using LTAM and clip 512 is attached to lead frame 504 using LTAM.
Part 516a is connected to part 516b, which is connected to part 516c, thus forming the clip 516. Part 516a of clip 516 is horizontally disposed and lays flat against the chip 514. Part 516b is a lowered portion of clip 516, parallel to part 516a, and in a different plane than part 516a. Part 516c is vertically disposed and is connected to DIP-type lead frame 506. In exemplary embodiments, part 516a of clip 516 is attached to chip 514 using HTAM. Further, in exemplary embodiments, chip 514 is attached to the die attachment pad 508 using HTAM and clip 516 is attached to lead frame 506 using HTAM. In some embodiments, chip 510 and chip 514 are the same semiconductor devices, such as a TVS diode. In other embodiments, chip 510 is a first semiconductor device while chip 514 is a second, different semiconductor device.
The lead frame package 500 features a DIP-type lead frame 502 having four connected parts, 502a, 502b, 502c, and 502d (collectively, “DIP-type lead frame 502”). Part 502a is connected to part 502b, which is connected to parts 502c and 502d, thus forming DIP-type lead frame 502. Part 502a is horizontally disposed and connects the lead frame 502 to the die attachment pad 508. Parts 502b, 502c, and 502d are vertically disposed (orthogonal to part 502a), with parts 502c and 502d extending downward from part 502b. Parts 502c and 502d are the parts of DIP-type lead frame 502 that are to be soldered to a PCB.
The lead frame package 500 also features a DIP-type lead frame 504 having four connected parts, 504a, 504b, 502c, and 502d (collectively, “DIP-type lead frame 504”). Part 504a is connected to part 504b, which is connected to parts 504c and 504d, thus forming DIP-type lead frame 504. Part 504a is horizontally disposed and connected to the clip 512. Parts 504b, 504c, and 504d are vertically disposed (orthogonal to part 504a), with parts 504c and 504d extending downward from part 504b. Parts 504c and 504d are the parts of DIP-type lead frame 504 that are to be soldered to a PCB. In exemplary embodiments, the parts 502a, 502b, and 502c are formed as a unitary conductive material, such as zinc, copper, silver, aluminum, or alloys or combinations thereof. The present disclosure is not limited in this regard.
The lead frame package 500 also features a DIP-type lead frame 506 having four connected parts, 506a, 506b, 506c, and 506d (collectively, “DIP-type lead frame 506”), with lead frame 506 being adjacent to lead frame 504. Part 506a is connected to part 506b, which is connected to parts 506c and 506d, thus forming DIP-type lead frame 506. Part 506a is horizontally disposed and connected to the clip 516. Parts 506b, 506c, and 506d are vertically disposed (orthogonal to part 506a), with parts 506c and 506d extending downward from part 506b. Parts 506c and 506d are the parts of DIP-type lead frame 506 that are to be soldered to a PCB.
Like the lead frame package 100, the lead frame packages 200, 300, 400, and 500 enhance the power density of the protection device by supporting two semiconductor devices, allowing the flexibility of having different product combinations housed in the same package, and allows a two-channel design for the chips. The lead frame package 100 may feature two or three lead frames, the lead frame package 200 features two lead frames, the lead frame package 300 features three lead frames, the lead frame package 400 features two DIP-type lead frames, and the lead frame package 500 features three DIP-type lead frames. Semiconductor device combinations such as TVS+TVS, TVS+triac, TVS+thyristor, TVS+diode, are possible using any of the lead frame packages 100, 200, 300, 400, or 500.
As further alternatives, the lead frame packages 100, 200, 300, 400, or 500 may be modified so that a single clip is used to secure the semiconductor device (e.g., chips 110/114, 210/214, 310/314, 410/414, or 510/514) using either HTAM or LTAM while the other semiconductor device is secured using wire bonding. Or the lead frame packages 100, 200, 300, 400, or 500 may feature a semiconductor device, such as TVS, triac, thyristor, SIDACtor, or diode on one side of the package and a polymeric positive temperature coefficient (PPTC) device on the other side of the package. In an exemplary embodiment, two identical TVS chips are assembled into a lead frame package using HTAM (Pb92.5Sn5Ag2.5 solder) and LTAM (SAC305 solder) and using DIP-type lead frames.
Soldering or curing is performed, after which the lead frame package assembly is flipped upside down (block 610). The HTAM solder should not be melted when the LTAM soldering/curing is occurring. The LTAM is then used to replace high-temperature attachment material for the second clip and the second clip joint. LTAM is dispensed onto the second side of the die attachment pad (block 612). The second chip is attached to the second side of the die attachment pad (block 614). The LTAM is also dispensed onto the second chip as well as a second lead portion (block 616). The second clip is then attached between the second lead portion and the second chip (block 618). An overmolding operation is then performed (block 620), followed by tin plating (block 622) and trim and form operations as well as singulation operations (block 624). The lead frame package assembly process is thus complete.
As used herein, an element or step recited in the singular and proceeded with the word “a” or “an” should be understood as not excluding plural elements or steps, unless such exclusion is explicitly recited. Furthermore, references to “one embodiment” of the present disclosure are not intended to be interpreted as excluding the existence of additional embodiments that also incorporate the recited features.
While the present disclosure makes reference to certain embodiments, numerous modifications, alterations and changes to the described embodiments are possible without departing from the sphere and scope of the present disclosure, as defined in the appended claim(s). Accordingly, it is intended that the present disclosure not be limited to the described embodiments, but that it has the full scope defined by the language of the following claims, and equivalents thereof.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2022110205996 | Aug 2022 | CN | national |
