The present application claims priority from Japanese application JP2005-019437 filed on Jan. 27, 2005, the content of which is hereby incorporated by reference into this application.
The present invention relates to a wiring board having a wiring made of copper or an alloy of copper, and to a production method thereof.
Electronic devices with smaller size, lighter weight, and lower cost are needed increasingly year after year. This requires wiring boards used in those electronic devices to have high-density wiring formed with low cost in order to achieve smaller size and lighter weight. Production methods of wiring boards can be broadly classified into two: a subtractive method and an additive method. In the subtractive method, an etching resist is formed on a copper foil applied to a substrate and the copper is etched away except the portions which will serve as wiring, thereby forming wiring. In the additive method, a resin substrate is covered with a plating resist film except the portions which will serve as wiring and a plated film is formed only in the portions which will serve as wiring.
In the conventional production methods of wiring boards, both of the subtractive method and additive methods require the masking of the substrate surface by the resist. The masking by the resist film needs the steps of film formation, exposure, and development. These steps involve high cost due to the use of chemicals and the treatment of waste liquid. In addition, the large number of the steps cause a long processing time. Thus, the process of masking by the resist film has been a bottleneck in producing wiring boards with low cost in a short time.
As a solution therefor, production methods of wiring boards have been studied which use no masking by a resist. One of them is a known method in which a metal seeding solution layer is formed on a substrate surface and exposed to light at an appropriate wavelength to form a metal seed layer and then plating or the like is performed to form a metal film (for example, JP-A-7-336018). In another known method, a plate is used to form a chemically changed pattern on a substrate surface and electroless plating is performed to form wiring (for example, JP-A-2002-184752).
The conventional methods for forming a wiring board without masking by a resist have the following problem. For example, the method in which a metal seeding solution layer is formed on a substrate surface and exposed to light to form a metal seed layer and then plating or the like is performed to form a metal film has difficulty in forming wiring with higher density since the shape of the plated film serving as wiring is not sufficiently considered. The reason thereof is as follows. When plating is performed without using a resist film, the plated film is isotropically grown from the seed layer. The isotropically grown plated film creates a semicircular cross-section in the plated wiring to occupy a larger area on the wiring board as compared with rectangular wiring having the same sectional area. Therefore, the wiring with the semicircular cross-section is disadvantageous in providing higher density as compared with the rectangular wiring.
In the method in which a plate is used to form a chemically changed pattern on a substrate surface and electroless plating is performed to form wiring, the shape of the plated film serving as the wiring is not considered sufficiently. When plating is performed without using a resist, the plated film has a larger width than the seed layer, which is disadvantageous in achieving higher density in wiring. In addition, the wiring cannot be formed with a width as designed in the underlying film.
Thus, it is an object of the present invention to provide a wiring board having high-density wiring with a controlled shape without masking by a resist and a production method thereof.
According to the present invention, a method of producing wiring board includes the steps of forming a metal seed layer on an insulating substrate, the metal seed layer having a roughened area on which copper wiring or a bump is to be formed, and forming an electroplated film of copper or an alloy of copper through electroplating on the roughened area of the metal seed layer. A substance for suppressing plating reaction is added to a plating bath to provide an angle of 90 degrees or smaller between a surface of the insulating substrate and a side of the electroplated film.
According to the present invention, a wiring board includes a metal seed layer on an insulating substrate, the metal seed layer having a roughened area thereon, and wiring or a bump made of copper or an alloy of copper formed through electroplating on the portion of the metal seed layer having the roughened area. An angle between a surface of the insulating substance and a side of the wiring or bump is 90 degrees or smaller.
The present invention allows high-density wiring with a controlled shape to be formed without using a resist. The angle between the wiring side and the substrate surface set to 90 degrees or smaller enables the formation of the wiring through electroplating without reducing the dimensional accuracy of the wiring.
Other objects, features and advantages of the invention will become apparent from the following description of the embodiments of the invention taken in conjunction with the accompanying drawings.
a), 1(b) and 1(c) are sectional views showing an example of a production method of a wiring board according to the present invention.
a), 2(b) and 2(c) are sectional views showing another example of the production method of a wiring board according to the present invention.
a), 3(b), 3(c) and 3(d) are sectional views showing yet another example of the production method of a wiring board according to the present invention.
a), 4(b), 4(c) and 4(d) are sectional views showing still another example of the production method of a wiring board according to the present invention.
a), 5(b), 5(c) and 5(d) are sectional views showing a further example of the production method of a wiring board according to the present invention.
a), 6(b), 6(c), 6(d) and 6(e) are sectional views showing a still further example of the production method of a wiring board according to the present invention.
a), 7(b), 7(c), 7(d), 7(e) and 7(f) are sectional views showing a yet further example of the production method of a wiring board according to the present invention.
a), 8(b), 8(c) and 8(d) are sectional views showing another example of the production method of a wiring board according to the present invention.
a), 10(b) and 10(c) are sectional views showing the sectional shapes of wiring provided in Examples of the present invention.
The present inventors have found that an appropriate roughened area is formed on a metal seed layer for electroplating and plating conditions are optimized to allow the controlled deposition shape of the plated film in the portion having the roughened area. An effective approach to control of the deposition conditions of the plated film is to add a compound, as an additive, which suppresses the plating reaction and loses the plating reaction suppressing effect as the plating reaction proceeds. The property of suppressing the plating reaction can be seen from the fact that the addition of the additive increases the metal deposition overpotential. The property of losing the plating reaction suppressing effect as the plating reaction proceeds can be seen from the fact that the metal deposition rate is decreased with a higher flow rate of a plating bath, that is, with quicker supply of the additive to the metal surface. When the additive loses the plating reaction suppressing effect, the additive may be decomposed into different substrates, or reduced to a substrate with a different oxidation number.
When plating is performed with the plating bath containing such an additive, the additive loses its effect on the surface of the metal seed layer as the plating reaction proceeds, so that the effective concentration of the additive contributing to the plating reaction decreases. The portion of the metal seed layer of the roughened shape has a relatively larger surface area to consume the additive at a higher rate as compared with the portion without any roughened shape, which results in an even lower concentration of the additive near the surface of the metal seed layer of the roughened area. Thus, in the portion of the roughened shape on the metal seed layer, the additive effect of suppressing the plating reaction is reduced to increase the plating rate. Since the plating rate depends on the concentration of the additive on the surface of the metal seed layer, the shape of the plated film changes with the distribution of the additive concentration.
Since the distribution of the additive concentration can be changed by controlling the plating conditions, the shape of the plated film can also be changed by controlling the plating conditions. The distribution of the additive concentration is provided on the basis of the balance between the diffusion of the additive over the metal seed layer and the reaction rate thereof on the surface of the metal seed layer. Thus, controlling either the diffusion of the additive over the metal seed layer or the reaction rate thereof on the surface of the metal seed layer enables control of the shape of the plated film in the portion of the roughened shape.
The diffusion rate of the additive over the metal seed layer is largely affected by the concentration of the additive in the plating bath, and the reaction rate of the additive on the metal seed layer is largely affected by the current density during plating. Thus, changing the additive concentration in the plating bath or the current density during the plating can control the distribution of the additive concentration, thereby making it possible to achieve preferential deposition of the plated film on the roughened area and control of the shape of the plated film.
Description will hereinafter be made for aspects of a production method of a wiring board of the present invention.
According to one aspect, the production method includes the steps of forming the metal seed layer on the insulating substrate, forming the rough area on the metal seed layer including the portion on which wiring or a bump is to be formed, forming the electroplated film made of copper or an alloy of copper on the rough area of the metal seed layer through the electroplating, and removing the seed metal layer and the electroplated copper film except their portions having the rough area thereon. The substance for suppressing the plating reaction is added to the plating bath to provide an angle of 90 degrees or smaller between the surface of the insulating substrate and the side of the electroplated film.
According to another aspect, the production method includes the steps of forming the metal seed layer having the rough area formed thereon on the insulating substrate, planarizing the roughened shape on the metal seed layer except its portion on which the copper wiring or bumps are to be formed, forming the electroplated film made of copper or an alloy of copper through the electroplating on the metal seed layer, and removing the metal seed layer and the electroplated film except their portions having the roughened area thereon. The substance for suppressing the plating reaction is added to the plating bath to provide an angle of 90 degrees or smaller between the surface of the insulating substrate and the side of the electroplated film.
According to yet another aspect, the production method includes the steps of forming the metal seed layer serving as a power supply layer for the electroplating, forming an insulating film serving as the insulating substrate on the metal seed layer with a casting method, forming the rough area in a portion of the metal seed layer on which wiring or a bump is to be formed, forming the electroplated film made of copper or an alloy of copper through the electroplating on the portion of the metal seed layer having the rough area, and removing the metal seed layer and the electroplated film except their portions having the rough area thereon. The substance for suppressing the plating reaction is added to the plating bath to provide an angle of 90 degrees or smaller between the surface of the insulating substrate and the side of the electroplated film.
In the present invention, an arithmetic average roughness Ra (defined in JIS B0601) of the portion having the rough area of the substrate or the metal seed layer is set to be larger than Ra in the remaining portion. Alternatively, an average length of a roughness curve element RSm (defined in JIS B0601) of the portion having the rough area of the substrate or the metal seed layer is set to be smaller than RSm in the remaining portion.
It is desirable that the surface roughness of the portion having the rough area of the metal seed layer on which the plated film is preferentially formed has an arithmetic average roughness Ra (defined in JIS B0601) of 0.01 to 4 μm and has an average length of a roughness curve element RSm of 0.005 to 8 μm. More specifically, it is desirable that the surface roughness of the portion having the roughened shape of the metal seed layer has an arithmetic average roughness Ra (defined in JIS B0601) of 0.1 to 1 μm and has an average length of a roughness curve element RSm of 0.05 to 2 μm.
The substance added to the plating bath desirably increases the deposition overpotential of the metal deposition through the plating when the flow rate of the plating bath to which the substrate is added increases. As an example of such a substrate, at least one of cyanine dyes is desirably added. A particularly desirable cyanine dye is a compound shown in the formula below (X represents an anion and n represents one of the numbers 0, 1, 2, and 3).
The cyanine dye desirably has a concentration of 3 to 15 mg/dm3. In the present invention, at least one substance selected from a polyether, an organic sulfur compound, and a halide ion can be added to an electrolytic copper plating bath.
The electrolytic copper plating in forming the copper film is desirably performed with a constant current at a current density of 0.1 to 2.0 A/dm2.
Next, description will be made for aspects of the wiring board of the present invention.
According to one aspect, the wiring board has the metal seed layer on the insulating substrate, the metal seed layer having the rough area thereon, and wiring or bumps formed through electroplating on the portion of the metal seed layer having the rough area. An angle between a surface of the insulating substance and a side of the wiring or bump is 90 degrees or smaller. An arithmetic average roughness Ra, defined in JIS B0601, of the portion having the rough area of the substrate or the metal seed layer is larger than an arithmetic average roughness Ra of the remaining portion.
According to one aspect, the wiring board has the metal seed layer on the insulating substrate, the metal seed layer having the rough area thereon, and wiring or bumps of copper or an alloy of copper formed through electroplating on the portion of the metal seed layer having the rough area. An angle between a surface of the insulating substance and a side of the wiring or bump is 90 degrees or smaller. An average length of a roughness curve element RSm, defined in JIS B0601, of the portion having the rough area of the substrate or the metal seed layer is smaller than an average length RSm of the remaining portion.
It is desirable that the surface roughness of the portion having the rough area of the metal seed layer has an arithmetic average roughness Ra (defined in JIS B0601) of 0.01 to 4 μm, or an average length of a roughness curve element RSm of 0.005 to 8 μm. More specifically, Ra desirably has a value of 0.1 to 1 μm and RSm desirably has a value of 0.05 to 2 μm. It is most desirable that both of them fall within the abovementioned ranges.
The angle between the surface of the insulating substrate and the side of the wiring or bump is desirably equal to or larger than one degree.
In the wiring board, the plated copper or an alloy of copper desirably has a surface in parallel with the surface of the insulating substrate.
Examples of the present invention will hereinafter be described. First, table 1 shows the results of Examples 1 to 22 and Comparative Example 1.
A solution containing dispersed silver particles with an average diameter of 20 nm was sprayed with an ink jet technique onto a surface of an insulating substrate 1 (Kapton EN made by Du Pont-Toray Co., Ltd.) made of polyimide film with a thickness of 25 μm shown in
Electroplating was performed immediately after the formation of the metal seed layer to form an electroplated copper film 3 as shown in
The cross-section of the wiring board was observed after the plating to measure an angle θ between the side wall of the electroplated copper film and the polyimide film substrate as shown in
As a result, it was possible to produce the wiring board in which copper wiring having a generally rectangular wiring section is formed on the metal seed layer including the silver particles. It should be noted that the plan view of the wiring board viewed from the electroplated copper film 3 is as shown in
A metal seed layer 2 with a wiring width of 10 μm was formed as shown in
The rough area on the surface of the copper film after the copper roughening processing was measured with a surface roughness measuring apparatus. The measurement showed that the surface roughness of the metal seed layer had an arithmetic average roughness Ra (defined in JIS B0601) of 0.05 μm and an average length of a roughness curve element RSm of 0.04 μm. Electroplating was performed immediately after the formation of the roughened shape on the surface of the copper film in the metal seed layer 2 to form an electroplated copper film 3 as shown in
As a result, it was possible to produce the wiring board in which copper wiring having a generally rectangular wiring section is formed on the copper film formed with the sputtering technique.
As shown in
As a result, it was possible to produce the wiring board in which copper wiring having a generally rectangular wiring section is formed on the copper seed layer having the roughen area formed thereon through the sandblast.
As shown in
Next, a solution containing dispersed copper particles was sprayed onto the metal seed layer 2 except the portion which would serve as wiring with a width of 10 μm, that is, the portion on which wiring was not to be formed. Then, annealing was performed in vacuum at 350° C. for 30 minutes. The surface roughness of the portion sprayed with the copper particles was measured with a surface roughness measuring apparatus. The measurement showed that the surface roughness had an arithmetic average roughness Ra (defined in JIS B0601) of 0.005 μm and an average length of a roughness curve element RSm of 11 μm, which demonstrated that the surface of the copper film was planarized.
Next, electroplating was performed to form an electroplated copper film 3 as shown in
As a result, it was possible to produce the wiring board in which copper wiring having a generally rectangular wiring section is formed on the copper seed layer having the rough area formed thereon.
Roughening processing was performed on a surface of an insulating substrate 1 made of polyimide film with a thickness of 25 μm shown in
Next, a solution containing dispersed copper particles with an average diameter of 10 nm was sprayed onto the surface of the insulating substrate 1 to form a metal seed layer 2 with a wiring width of 30 μm and a thickness of 0.03 μm as shown in
Electroplating was performed immediately after the formation of the metal seed layer 2 to form an electroplated copper film 3 as shown in
As a result, it was possible to produce the wiring board in which copper wiring having a generally rectangular wiring section is formed on the metal seed layer formed of the copper particles.
As shown in
Electroplating was performed immediately after the formation of the metal seed layer 2 to form an electroplated copper film 3 as shown in
As a result, it was possible to produce the wiring board in which copper wiring having a generally rectangular wiring section is formed on the copper seed layer having the roughened shape formed thereon.
As shown in
Next, a nickel/chromium film made of nickel and chromium at a ratio of 1:1 was formed with a thickness of 10 nm through the sputtering technique on the surface of the insulating substrate 1. A copper film was formed thereon with a thickness of 100 nm through the chemical vapor deposition technique. The nickel/chromium film and the copper film constituted a metal seed layer 2.
Electroplating was performed immediately after the formation of the metal seed layer 2 to form an electroplated copper film 3 as shown in
As a result, it was possible to produce the wiring board in which copper wiring having a generally rectangular wiring section is formed on the metal seed layer having the roughened shape formed thereon.
As shown in
As a result, it was possible to produce the wiring board in which copper wiring having a generally rectangular wiring section is formed on the metal seed layer having the roughened shape formed thereon with the sandblast.
As shown in Table 1, wiring boards of Examples 9 to 22 were produced in the same manner as in Example 3 except the additive concentration and plating current density. The observation of the cross-sections of the wiring boards after plating showed that the angle θ between the side wall of the electroplated copper film and the substrate as shown in
Wiring was formed by performing electroplating in the same manner as in Example 2 except that no roughening processing was performed. The cross-section of the wiring board was observed after the plating to measure an angle θ between the side wall of an electroplated copper film and a substrate as shown in
Since plating can be performed on a fine pattern without masking by a resist, the present invention is applicable not only to the formation of wiring or bumps but also to the formation of a device mounted on a wiring board such as a passive device.
It should be further understood by those skilled in the art that although the foregoing description has been made on embodiments of the invention, the invention is not limited thereto and various changes and modifications may be made without departing from the spirit of the invention and the scope of the appended claims.
Number | Date | Country | Kind |
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2005-019437 | Jan 2005 | JP | national |
This application is a divisional application of U.S. application Ser. No. 11/205,175 filed Aug. 17, 2005, the contents of which are incorporated herein by reference. This application is related to U.S. patent application Ser. No. 11/340,570, filed Jan. 27, 2006.
Number | Date | Country | |
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Parent | 11205175 | Aug 2005 | US |
Child | 12137582 | US |