Dalong Zhao

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor structure with multiple transistors having various th...
- Patent number 10,217,838
- Issue date Feb 26, 2019
- Mie Fujitsu Semiconductor Limited
- Dalong Zhao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure with multiple transistors having various th...
- Patent number 10,014,387
- Issue date Jul 3, 2018
- Mie Fujitsu Semiconductor Limited
- Dalong Zhao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Buried channel deeply depleted channel transistor
- Patent number 9,991,300
- Issue date Jun 5, 2018
- Mie Fujitsu Semiconductor Limited
- Teymur Bakhishev
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Semiconductor structure with multiple transistors having various th...
- Patent number 9,812,550
- Issue date Nov 7, 2017
- Mie Fujitsu Semiconductor Limited
- Dalong Zhao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reducing or eliminating pre-amorphization in transistor manufacture
- Patent number 9,793,172
- Issue date Oct 17, 2017
- Mie Fujitsu Semiconductor Limited
- Lance Scudder
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Buried channel deeply depleted channel transistor
- Patent number 9,786,703
- Issue date Oct 10, 2017
- Mie Fujitsu Semiconductor Limited
- Teymur Bakhishev
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Reducing or eliminating pre-amorphization in transistor manufacture
- Patent number 9,514,940
- Issue date Dec 6, 2016
- Mie Fujitsu Semiconductor Limited
- Lance S. Scudder
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Buried channel deeply depleted channel transistor
- Patent number 9,478,571
- Issue date Oct 25, 2016
- Mie Fujitsu Semiconductor Limited
- Teymur Bakhishev
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
CMOS structures and processes based on selective thinning
- Patent number 9,391,076
- Issue date Jul 12, 2016
- Mie Fujitsu Semiconductor Limited
- Scott E. Thompson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuits having a plurality of high-K metal gate FETs wi...
- Patent number 9,385,047
- Issue date Jul 5, 2016
- Mie Fujitsu Semiconductor Limited
- Dalong Zhao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating a transistor with reduced junction leakage c...
- Patent number 9,368,624
- Issue date Jun 14, 2016
- Mie Fujitsu Semiconductor Limited
- Scott E. Thompson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure with multiple transistors having various th...
- Patent number 9,299,698
- Issue date Mar 29, 2016
- Mie Fujitsu Semiconductor Limited
- Dalong Zhao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High uniformity screen and epitaxial layers for CMOS devices
- Patent number 9,196,727
- Issue date Nov 24, 2015
- Mie Fujitsu Semiconductor Limited
- Scott E. Thompson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor devices with dopant migration suppression and method...
- Patent number 9,112,057
- Issue date Aug 18, 2015
- Mie Fujitsu Semiconductor Limited
- Sameer Pradhan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure with reduced junction leakage and method of...
- Patent number 9,105,711
- Issue date Aug 11, 2015
- Mie Fujitsu Semiconductor Limited
- Lingquan Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuits having a plurality of high-K metal gate FETs wi...
- Patent number 9,093,550
- Issue date Jul 28, 2015
- Mie Fujitsu Semiconductor Limited
- Dalong Zhao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Deeply depleted MOS transistors having a screening layer and method...
- Patent number 9,041,126
- Issue date May 26, 2015
- Mie Fujitsu Semiconductor Limited
- Thomas Hoffmann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure with substitutional boron and method for fa...
- Patent number 8,999,861
- Issue date Apr 7, 2015
- SuVolta, Inc.
- Lance Scudder
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reducing or eliminating pre-amorphization in transistor manufacture
- Patent number 8,937,005
- Issue date Jan 20, 2015
- SuVolta, Inc.
- Lance S. Scudder
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transistor having reduced junction leakage and methods of forming t...
- Patent number 8,883,600
- Issue date Nov 11, 2014
- SuVolta, Inc.
- Scott E. Thompson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for manufacture of integrated circuits with different chann...
- Patent number 8,877,619
- Issue date Nov 4, 2014
- SuVolta, Inc.
- Scott E. Thompson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for substrate preservation during transistor fabrication
- Patent number 8,778,786
- Issue date Jul 15, 2014
- SuVolta, Inc.
- Lance Scudder
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor structure with reduced junction leakage and method of...
- Patent number 8,637,955
- Issue date Jan 28, 2014
- SuVolta, Inc.
- Lingquan Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
CMOS structures and processes based on selective thinning
- Patent number 8,614,128
- Issue date Dec 24, 2013
- SuVolta, Inc.
- Scott E. Thompson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reducing or eliminating pre-amorphization in transistor manufacture
- Patent number 8,569,156
- Issue date Oct 29, 2013
- SuVolta, Inc.
- Lance Scudder
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Semiconductor Structure With Multiple Transistors Having Various Th...
- Publication number 20180261683
- Publication date Sep 13, 2018
- MIE Fujitsu Semiconductor Limited
- Dalong Zhao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Buried Channel Deeply Depleted Channel Transistor
- Publication number 20170323916
- Publication date Nov 9, 2017
- MIE Fujitsu Semiconductor Limited
- Teymur Bakhishev
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Structure with Multiple Transistors Having Various Th...
- Publication number 20170141209
- Publication date May 18, 2017
- MIE Fujitsu Semiconductor Limited
- Dalong Zhao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Reducing or Eliminating Pre-Amorphization in Transistor Manufacture
- Publication number 20170040225
- Publication date Feb 9, 2017
- MIE Fujitsu Semiconductor Limited
- Lance Scudder
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Buried Channel Deeply Depleted Channel Transistor
- Publication number 20170025457
- Publication date Jan 26, 2017
- MIE Fujitsu Semiconductor Limited
- Teymur Bakhishev
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CMOS Structures and Processes Based on Selective Thinning
- Publication number 20160307907
- Publication date Oct 20, 2016
- MIE Fujitsu Semiconductor Limited
- Scott E. Thompson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
REDUCING OR ELIMINATING PRE-AMORPHIZATION IN TRANSISTOR MANUFACTURE
- Publication number 20160268133
- Publication date Sep 15, 2016
- MIE Fujitsu Semiconductor Limited
- Lance S. Scudder
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Structure with Multiple Transistors Having Various Th...
- Publication number 20160163823
- Publication date Jun 9, 2016
- MIE Fujitsu Semiconductor Limited
- Dalong Zhao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
High Uniformity Screen and Epitaxial Layers for CMOS Devices
- Publication number 20150333144
- Publication date Nov 19, 2015
- MIE Fujitsu Semiconductor Limited
- Scott E. Thompson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated Circuits Having a Plurality of High-K Metal Gate FETs wi...
- Publication number 20150287645
- Publication date Oct 8, 2015
- MIE Fujitsu Semiconductor Limited
- Dalong Zhao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH UNIFORMITY SCREEN AND EPITAXIAL LAYERS FOR CMOS DEVICES
- Publication number 20150061012
- Publication date Mar 5, 2015
- SUVOLTA, INC.
- Scott E. Thompson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR STRUCTURE WITH REDUCED JUNCTION LEAKAGE AND METHOD OF...
- Publication number 20140103406
- Publication date Apr 17, 2014
- Lingquan Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DEEPLY DEPLETED MOS TRANSISTORS HAVING A SCREENING LAYER AND METHOD...
- Publication number 20140084385
- Publication date Mar 27, 2014
- SUVOLTA, INC.
- Thomas Hoffmann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
REDUCING OR ELIMINATING PRE-AMORPHIZATION IN TRANSISTOR MANUFACTURE
- Publication number 20140038386
- Publication date Feb 6, 2014
- SUVOLTA, INC.
- Lance S. Scudder
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR STRUCTURE WITH MULTIPLE TRANSISTORS HAVING VARIOUS TH...
- Publication number 20140001571
- Publication date Jan 2, 2014
- Dalong Zhao
- H01 - BASIC ELECTRIC ELEMENTS

Dalong Zhao

Person

Patents Grantslast 30 patents

Semiconductor structure with multiple transistors having various th...

Semiconductor structure with multiple transistors having various th...

Buried channel deeply depleted channel transistor

Semiconductor structure with multiple transistors having various th...

Reducing or eliminating pre-amorphization in transistor manufacture

Buried channel deeply depleted channel transistor

Reducing or eliminating pre-amorphization in transistor manufacture

Buried channel deeply depleted channel transistor

CMOS structures and processes based on selective thinning

Integrated circuits having a plurality of high-K metal gate FETs wi...

Method for fabricating a transistor with reduced junction leakage c...

Semiconductor structure with multiple transistors having various th...

High uniformity screen and epitaxial layers for CMOS devices

Semiconductor devices with dopant migration suppression and method...

Semiconductor structure with reduced junction leakage and method of...

Integrated circuits having a plurality of high-K metal gate FETs wi...

Deeply depleted MOS transistors having a screening layer and method...

Semiconductor structure with substitutional boron and method for fa...

Reducing or eliminating pre-amorphization in transistor manufacture

Transistor having reduced junction leakage and methods of forming t...

Process for manufacture of integrated circuits with different chann...

Method for substrate preservation during transistor fabrication

Semiconductor structure with reduced junction leakage and method of...

CMOS structures and processes based on selective thinning

Reducing or eliminating pre-amorphization in transistor manufacture

Patents Applicationslast 30 patents

Semiconductor Structure With Multiple Transistors Having Various Th...

Buried Channel Deeply Depleted Channel Transistor

Semiconductor Structure with Multiple Transistors Having Various Th...

Reducing or Eliminating Pre-Amorphization in Transistor Manufacture

Buried Channel Deeply Depleted Channel Transistor

CMOS Structures and Processes Based on Selective Thinning

REDUCING OR ELIMINATING PRE-AMORPHIZATION IN TRANSISTOR MANUFACTURE

Semiconductor Structure with Multiple Transistors Having Various Th...

High Uniformity Screen and Epitaxial Layers for CMOS Devices

Integrated Circuits Having a Plurality of High-K Metal Gate FETs wi...

HIGH UNIFORMITY SCREEN AND EPITAXIAL LAYERS FOR CMOS DEVICES

SEMICONDUCTOR STRUCTURE WITH REDUCED JUNCTION LEAKAGE AND METHOD OF...

DEEPLY DEPLETED MOS TRANSISTORS HAVING A SCREENING LAYER AND METHOD...

REDUCING OR ELIMINATING PRE-AMORPHIZATION IN TRANSISTOR MANUFACTURE

SEMICONDUCTOR STRUCTURE WITH MULTIPLE TRANSISTORS HAVING VARIOUS TH...