Scott T. Becker

Person

Scotts Valley, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Methods, structures, and designs for self-aligning local interconne...
- Patent number 10,734,383
- Issue date Aug 4, 2020
- Tela Innovations, Inc.
- Michael C. Smayling
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor chip including integrated circuit having cross-couple...
- Patent number 10,727,252
- Issue date Jul 28, 2020
- Tela Innovations, Inc.
- Scott T. Becker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cross-coupled transistor circuit defined on four gate electrode tracks
- Patent number 10,658,385
- Issue date May 19, 2020
- Tela Innovations, Inc.
- Scott T. Becker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cross-coupled transistor circuit defined on three gate electrode tr...
- Patent number 10,651,200
- Issue date May 12, 2020
- Tela Innovations, Inc.
- Scott T. Becker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cell circuit and layout with linear finfet structures
- Patent number 10,446,536
- Issue date Oct 15, 2019
- Tela Innovations, Inc.
- Scott T. Becker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuitry and layouts for XOR and XNOR logic
- Patent number 10,230,377
- Issue date Mar 12, 2019
- Tela Innovations, Inc.
- Scott T. Becker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor chip having region including gate electrode features...
- Patent number 10,217,763
- Issue date Feb 26, 2019
- Tela Innovations, Inc.
- Scott T. Becker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor chip having region including gate electrode features...
- Patent number 10,186,523
- Issue date Jan 22, 2019
- Tela Innovations, Inc.
- Scott T. Becker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor chip including region having rectangular-shaped gate...
- Patent number 10,141,334
- Issue date Nov 27, 2018
- Tela Innovations, Inc.
- Scott T. Becker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor CIP including region having rectangular-shaped gate s...
- Patent number 10,141,335
- Issue date Nov 27, 2018
- Tela Innovations, Inc.
- Scott T. Becker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit cell library for multiple patterning
- Patent number 10,074,640
- Issue date Sep 11, 2018
- Tela Innovations, Inc.
- Michael C. Smayling
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cross-coupled transistor circuit defined on two gate electrode tracks
- Patent number 10,020,321
- Issue date Jul 10, 2018
- Tela Innovations, Inc.
- Scott T. Becker
- G11 - INFORMATION STORAGE
Information Patent Grant
Collaborative drug discovery system
- Patent number 9,965,597
- Issue date May 8, 2018
- Schrödinger, Inc.
- Scott Becker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Coarse grid design methods and structures
- Patent number 9,917,056
- Issue date Mar 13, 2018
- Tela Innovations, Inc.
- Michael C. Smayling
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Methods for cell phasing and placement in dynamic array architectur...
- Patent number 9,910,950
- Issue date Mar 6, 2018
- Tela Innovations, Inc.
- Jonathan R. Quandt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor chip including region having rectangular-shaped gate...
- Patent number 9,905,576
- Issue date Feb 27, 2018
- Tela Innovations, Inc.
- Scott T. Becker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor chip including integrated circuit having cross-couple...
- Patent number 9,871,056
- Issue date Jan 16, 2018
- Tela Innovations, Inc.
- Scott T. Becker
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods, structures, and designs for self-aligning local interconne...
- Patent number 9,859,277
- Issue date Jan 2, 2018
- Tela Innovations, Inc.
- Michael C. Smayling
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Methods for multi-wire routing and apparatus implementing same
- Patent number 9,779,200
- Issue date Oct 3, 2017
- Tela Innovations, Inc.
- Daryl Fox
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor chip including a chip level based on a layout that in...
- Patent number 9,754,878
- Issue date Sep 5, 2017
- Tela Innovations, Inc.
- Stephen Kornachuk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods, structures, and designs for self-aligning local interconne...
- Patent number 9,741,719
- Issue date Aug 22, 2017
- Tela Innovations, Inc.
- Michael C. Smayling
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Oversized contacts and vias in layout defined by linearly constrain...
- Patent number 9,711,495
- Issue date Jul 18, 2017
- Tela Innovations, Inc.
- Scott T. Becker
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Methods for linewidth modification and apparatus implementing the same
- Patent number 9,704,845
- Issue date Jul 11, 2017
- Tela Innovations, Inc.
- Michael C. Smayling
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Circuitry and layouts for XOR and XNOR logic
- Patent number 9,673,825
- Issue date Jun 6, 2017
- Tela Innovations, Inc.
- Scott T. Becker
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated circuit cell library for multiple patterning
- Patent number 9,633,987
- Issue date Apr 25, 2017
- Tela Innovations, Inc.
- Michael C. Smayling
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Semiconductor chip including integrated circuit defined within dyna...
- Patent number 9,595,515
- Issue date Mar 14, 2017
- Tela Innovations, Inc.
- Scott T. Becker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable meta-data objects
- Patent number 9,589,091
- Issue date Mar 7, 2017
- Tela Innovations, Inc.
- Michael C. Smayling
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cell circuit and layout with linear finfet structures
- Patent number 9,563,733
- Issue date Feb 7, 2017
- Tela Innovations, Inc.
- Scott T. Becker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor chip including integrated circuit having cross-couple...
- Patent number 9,536,899
- Issue date Jan 3, 2017
- Tela Innovations, Inc.
- Scott T. Becker
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods for cell boundary encroachment and semiconductor devices im...
- Patent number 9,530,795
- Issue date Dec 27, 2016
- Tela Innovations, Inc.
- Jonathan R. Quandt
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Methods, Structures, and Designs for Self-Aligning Local Interconne...
- Publication number 20200381429
- Publication date Dec 3, 2020
- Tela Innovations, Inc.
- Michael C. Smayling
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Semiconductor Chip Including Integrated Circuit Having Cross-Couple...
- Publication number 20200295044
- Publication date Sep 17, 2020
- Tela Innovations, Inc.
- Scott T. Becker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Cell Circuit and Layout with Linear Finfet Structures
- Publication number 20200035663
- Publication date Jan 30, 2020
- Tela Innovations, Inc.
- Scott T. Becker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Semiconductor Chip Having Region Including Gate Electrode Features...
- Publication number 20190019810
- Publication date Jan 17, 2019
- Tela Innovations, Inc.
- Scott T. Becker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Semiconductor Chip Having Region Including Gate Electrode Features...
- Publication number 20180374872
- Publication date Dec 27, 2018
- Tela Innovations, Inc.
- Scott T. Becker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Semiconductor Chip Having Region Including Gate Electrode Features...
- Publication number 20180374873
- Publication date Dec 27, 2018
- Tela Innovations, Inc.
- Scott T. Becker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Semiconductor Chip Having Region Including Gate Electrode Features...
- Publication number 20180374871
- Publication date Dec 27, 2018
- Tela Innovations, Inc.
- Scott T. Becker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Coarse Grid Design Methods and Structures
- Publication number 20180204795
- Publication date Jul 19, 2018
- Tela Innovations, Inc.
- Michael C. Smayling
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods for Cell Phasing and Placement in Dynamic Array Architectur...
- Publication number 20180196909
- Publication date Jul 12, 2018
- Tela Innovations, Inc.
- Jonathan R. Quandt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Semiconductor Chip Including Integrated Circuit Having Cross-Couple...
- Publication number 20180175061
- Publication date Jun 21, 2018
- Tela Innovations, Inc.
- Scott T. Becker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods, Structures, and Designs for Self-Aligning Local Interconne...
- Publication number 20180145075
- Publication date May 24, 2018
- Tela Innovations, Inc.
- Michael C. Smayling
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods for Multi-Wire Routing and Apparatus Implementing Same
- Publication number 20180046745
- Publication date Feb 15, 2018
- Tela Innovations, Inc.
- Daryl Fox
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Semiconductor Chip and Method for Manufacturing the Same
- Publication number 20170365620
- Publication date Dec 21, 2017
- Tela Innovations, Inc.
- Scott T. Becker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Semiconductor Chip and Method for Manufacturing the Same
- Publication number 20170365621
- Publication date Dec 21, 2017
- Tela Innovations, Inc.
- Scott T. Becker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Optimizing Layout of Irregular Structures in Regular Layout Context
- Publication number 20170365548
- Publication date Dec 21, 2017
- Tela Innovations, Inc.
- Stephen Kornachuk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Semiconductor Chip and Method for Manufacturing the Same
- Publication number 20170358600
- Publication date Dec 14, 2017
- Tela Innovations, Inc.
- Scott T. Becker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Oversized Contacts and Vias in Layout Defined by Linearly Constrain...
- Publication number 20170317064
- Publication date Nov 2, 2017
- Tela Innovations, Inc.
- Scott T. Becker
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods for Linewidth Modification and Apparatus Implementing the Same
- Publication number 20170309609
- Publication date Oct 26, 2017
- Tela Innovations, Inc.
- Michael C. Smayling
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Circuitry and Layouts for XOR and XNOR Logic
- Publication number 20170272080
- Publication date Sep 21, 2017
- Tela Innovations, Inc.
- Scott T. Becker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Integrated Circuit Cell Library for Multiple Patterning
- Publication number 20170229441
- Publication date Aug 10, 2017
- Tela Innovations, Inc.
- Michael C. Smayling
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Semiconductor Chip Including Integrated Circuit Defined Within Dyna...
- Publication number 20170186772
- Publication date Jun 29, 2017
- Tela Innovations, Inc.
- Scott T. Becker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Semiconductor Chip and Method for Manufacturing the Same
- Publication number 20170186771
- Publication date Jun 29, 2017
- Tela Innovations, Inc.
- Scott T. Becker
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated Circuit Implementing Scalable Meta-Data Objects
- Publication number 20170177779
- Publication date Jun 22, 2017
- Tela Innovations, Inc.
- Michael C. Smayling
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Semiconductor Chip Including Integrated Circuit Having Cross-Couple...
- Publication number 20170170194
- Publication date Jun 15, 2017
- Tela Innovations, Inc.
- Scott T. Becker
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Cell Circuit and Layout with Linear Finfet Structures
- Publication number 20170148779
- Publication date May 25, 2017
- Tela Innovations, Inc.
- Scott T. Becker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods for Cell Boundary Encroachment and Semiconductor Devices Im...
- Publication number 20170104004
- Publication date Apr 13, 2017
- Tela Innovations, Inc.
- Jonathan R. Quandt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Enforcement of Semiconductor Structure Regularity for Localized Tra...
- Publication number 20170098602
- Publication date Apr 6, 2017
- Tela Innovations, Inc.
- Stephen Kornachuk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Semiconductor Chip and Method for Manufacturing the Same
- Publication number 20170053937
- Publication date Feb 23, 2017
- Tela Innovations, Inc.
- Scott T. Becker
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Chip and Method for Manufacturing the Same
- Publication number 20160379991
- Publication date Dec 29, 2016
- Tela Innovations, Inc.
- Scott T. Becker
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods for Cell Phasing and Placement in Dynamic Array Architectur...
- Publication number 20160357897
- Publication date Dec 8, 2016
- Tela Innovations, Inc.
- Jonathan R. Quandt
- G06 - COMPUTING CALCULATING COUNTING

Scott T. Becker

Person

Patents Grantslast 30 patents

Methods, structures, and designs for self-aligning local interconne...

Semiconductor chip including integrated circuit having cross-couple...

Cross-coupled transistor circuit defined on four gate electrode tracks

Cross-coupled transistor circuit defined on three gate electrode tr...

Cell circuit and layout with linear finfet structures

Circuitry and layouts for XOR and XNOR logic

Semiconductor chip having region including gate electrode features...

Semiconductor chip having region including gate electrode features...

Semiconductor chip including region having rectangular-shaped gate...

Semiconductor CIP including region having rectangular-shaped gate s...

Integrated circuit cell library for multiple patterning

Cross-coupled transistor circuit defined on two gate electrode tracks

Collaborative drug discovery system

Coarse grid design methods and structures

Methods for cell phasing and placement in dynamic array architectur...

Semiconductor chip including region having rectangular-shaped gate...

Semiconductor chip including integrated circuit having cross-couple...

Methods, structures, and designs for self-aligning local interconne...

Methods for multi-wire routing and apparatus implementing same

Semiconductor chip including a chip level based on a layout that in...

Methods, structures, and designs for self-aligning local interconne...

Oversized contacts and vias in layout defined by linearly constrain...

Methods for linewidth modification and apparatus implementing the same

Circuitry and layouts for XOR and XNOR logic

Integrated circuit cell library for multiple patterning

Semiconductor chip including integrated circuit defined within dyna...

Scalable meta-data objects

Cell circuit and layout with linear finfet structures

Semiconductor chip including integrated circuit having cross-couple...

Methods for cell boundary encroachment and semiconductor devices im...

Patents Applicationslast 30 patents

Methods, Structures, and Designs for Self-Aligning Local Interconne...

Semiconductor Chip Including Integrated Circuit Having Cross-Couple...

Cell Circuit and Layout with Linear Finfet Structures

Semiconductor Chip Having Region Including Gate Electrode Features...

Semiconductor Chip Having Region Including Gate Electrode Features...

Semiconductor Chip Having Region Including Gate Electrode Features...

Semiconductor Chip Having Region Including Gate Electrode Features...

Coarse Grid Design Methods and Structures

Methods for Cell Phasing and Placement in Dynamic Array Architectur...

Semiconductor Chip Including Integrated Circuit Having Cross-Couple...

Methods, Structures, and Designs for Self-Aligning Local Interconne...

Methods for Multi-Wire Routing and Apparatus Implementing Same

Semiconductor Chip and Method for Manufacturing the Same

Semiconductor Chip and Method for Manufacturing the Same

Optimizing Layout of Irregular Structures in Regular Layout Context

Semiconductor Chip and Method for Manufacturing the Same

Oversized Contacts and Vias in Layout Defined by Linearly Constrain...

Methods for Linewidth Modification and Apparatus Implementing the Same

Circuitry and Layouts for XOR and XNOR Logic

Integrated Circuit Cell Library for Multiple Patterning

Semiconductor Chip Including Integrated Circuit Defined Within Dyna...

Semiconductor Chip and Method for Manufacturing the Same

Integrated Circuit Implementing Scalable Meta-Data Objects

Semiconductor Chip Including Integrated Circuit Having Cross-Couple...

Cell Circuit and Layout with Linear Finfet Structures

Methods for Cell Boundary Encroachment and Semiconductor Devices Im...

Enforcement of Semiconductor Structure Regularity for Localized Tra...

Semiconductor Chip and Method for Manufacturing the Same

Semiconductor Chip and Method for Manufacturing the Same

Methods for Cell Phasing and Placement in Dynamic Array Architectur...