Taylor Rice Efland

Person

Richardson, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Power integrated circuit including series-connected source substrat...
- Patent number 9,076,671
- Issue date Jul 7, 2015
- Texas Instruments Incorporated
- Christopher Boguslaw Kocon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Power integrated circuit including series-connected source substrat...
- Patent number 8,928,075
- Issue date Jan 6, 2015
- Texas Instruments Incorporated
- Christopher Boguslaw Kocon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-component electronic system having leadframe with support-fre...
- Patent number 8,304,868
- Issue date Nov 6, 2012
- Texas Instruments Incorporated
- Michael G Amaro
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
MOS transistor with gate trench adjacent to drain extension field i...
- Patent number 8,253,193
- Issue date Aug 28, 2012
- Texas Instruments Incorporated
- Marie Denison
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Lateral drain-extended MOSFET having channel along sidewall of drai...
- Patent number 8,173,510
- Issue date May 8, 2012
- Texas Instruments Incorporated
- Marie Denison
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
MOS transistor with gate trench adjacent to drain extension field i...
- Patent number 8,124,482
- Issue date Feb 28, 2012
- Texas Instruments Incorporated
- Marie Denison
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
MOS transistor with gate trench adjacent to drain extension field i...
- Patent number 7,893,499
- Issue date Feb 22, 2011
- Texas Instruments Incorporated
- Marie Denison
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Lateral drain-extended MOSFET having channel along sidewall of drai...
- Patent number 7,888,732
- Issue date Feb 15, 2011
- Texas Instruments Incorporated
- Marie Denison
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Individualized low parasitic power distribution lines deposited ove...
- Patent number 7,514,292
- Issue date Apr 7, 2009
- Texas Instruments Incorporated
- Taylor R. Efland
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Robust DEMOS transistors and method for making the same
- Patent number 7,514,329
- Issue date Apr 7, 2009
- Texas Instruments Incorporated
- Sameer Pendharkar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
N-channel LDMOS with buried P-type region to prevent parasitic bipo...
- Patent number 7,268,045
- Issue date Sep 11, 2007
- Texas Instruments Incorporated
- Philip L. Hower
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Robust DEMOS transistors and method for making the same
- Patent number 7,238,986
- Issue date Jul 3, 2007
- Texas Instruments Incorporated
- Sameer Pendharkar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Premature breakdown in submicron device geometries
- Patent number 7,195,965
- Issue date Mar 27, 2007
- Texas Instruments Incorporated
- John Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Individualized low parasitic power distribution lines deposited ove...
- Patent number 7,135,759
- Issue date Nov 14, 2006
- Texas Instruments Incorporated
- Taylor R. Efland
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Circuit method integrating the power distribution functions of the...
- Patent number 7,060,607
- Issue date Jun 13, 2006
- Texas Instruments Incorporated
- Taylor R. Efland
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated power circuits with distributed bonding and current flow
- Patent number 7,045,903
- Issue date May 16, 2006
- Texas Instruments Incorporated
- Taylor R. Efland
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Circuit structure integrating the power distribution functions of c...
- Patent number 6,972,484
- Issue date Dec 6, 2005
- Texas Instruments Incorporated
- Taylor R. Efland
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
N-channel LDMOS with buried p-type region to prevent parasitic bipo...
- Patent number 6,958,515
- Issue date Oct 25, 2005
- Texas Instruments Incorporated
- Philip L. Hower
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low cost fabrication method for high voltage, high drain current MO...
- Patent number 6,930,005
- Issue date Aug 16, 2005
- Texas Instruments Incorporated
- Taylor R. Efland
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low leakage power transistor and method of forming
- Patent number 6,908,859
- Issue date Jun 21, 2005
- Texas Instruments Incorporated
- Sameer P. Pendharkar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
MOS transistors having higher drain current without reduced breakdo...
- Patent number 6,873,021
- Issue date Mar 29, 2005
- Texas Instruments Incorporated
- Jozef C. Mitros
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
System for high-precision double-diffused MOS transistors
- Patent number 6,867,100
- Issue date Mar 15, 2005
- Texas Instruments Incorporated
- Henry L. Edwards
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Thermally enhanced semiconductor chip having integrated bonds over...
- Patent number 6,784,539
- Issue date Aug 31, 2004
- Texas Instruments Incorporated
- Taylor R. Efland
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Line self protecting multiple output power IC architecture
- Patent number 6,784,493
- Issue date Aug 31, 2004
- Texas Instruments Incorporated
- Taylor R. Efland
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Array of transistors with low voltage collector protection
- Patent number 6,770,935
- Issue date Aug 3, 2004
- Texas Instruments Incorporated
- Taylor R. Efland
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Tank-isolated-drain-extended power device
- Patent number 6,753,575
- Issue date Jun 22, 2004
- Texas Instruments Incorporated
- Taylor R. Efland
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating a drain isolated LDMOS device
- Patent number 6,729,886
- Issue date May 4, 2004
- Texas Instruments Incorporated
- Taylor R. Efland
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating integrated system on a chip protection circuit
- Patent number 6,709,900
- Issue date Mar 23, 2004
- Texas Instruments Incorporated
- Taylor R. Efland
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Distributed power device with dual function minority carrier reduction
- Patent number 6,710,427
- Issue date Mar 23, 2004
- Texas Instruments Incorporated
- Taylor R. Efland
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit with bonding layer over active circuitry
- Patent number 6,683,380
- Issue date Jan 27, 2004
- Texas Instruments Incorporated
- Taylor R. Efland
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
POWER INTEGRATED CIRCUIT INCLUDING SERIES-CONNECTED SOURCE SUBSTRAT...
- Publication number 20150145036
- Publication date May 28, 2015
- TEXAS INSTRUMENTS INCORPORATED
- Christopher Boguslaw Kocon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
POWER INTEGRATED CIRCUIT INCLUDING SERIES-CONNECTED SOURCE SUBSTRAT...
- Publication number 20140197486
- Publication date Jul 17, 2014
- TEXAS INSTRUMENTS INCORPORATED
- Christopher Boguslaw Kocon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Multi-Component Electronic System Having Leadframe with Support-Fre...
- Publication number 20120086112
- Publication date Apr 12, 2012
- TEXAS INSTRUMENTS INCORPORATED
- Michael G. Amaro
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LATERAL DRAIN-EXTENDED MOSFET HAVING CHANNEL ALONG SIDEWALL OF DRAI...
- Publication number 20110151634
- Publication date Jun 23, 2011
- TEXAS INSTRUMENTS INCORPORATED
- Marie Denison
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MOS TRANSISTOR WITH GATE TRENCH ADJACENT TO DRAIN EXTENSION FIELD I...
- Publication number 20110108914
- Publication date May 12, 2011
- TEXAS INSTRUMENTS INCORPORATED
- Marie Denison
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MOS TRANSISTOR WITH GATE TRENCH ADJACENT TO DRAIN EXTENSION FIELD I...
- Publication number 20110111569
- Publication date May 12, 2011
- TEXAS INSTRUMENTS INCORPORATED
- Marie Denison
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Package Thermal Performance Enhancement and Method
- Publication number 20110024895
- Publication date Feb 3, 2011
- TEXAS INSTRUMENTS INCORPORATED
- Sreenivasan K. Koduri
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MOS Transistor with Gate Trench Adjacent to Drain Extension Field I...
- Publication number 20100252882
- Publication date Oct 7, 2010
- TEXAS INSTRUMENTS INCORPORATED
- Marie Denison
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LATERAL DRAIN-EXTENDED MOSFET HAVING CHANNEL ALONG SIDEWALL OF DRAI...
- Publication number 20090256212
- Publication date Oct 15, 2009
- Texas Instruments, Inc.
- Marie Denison
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Package Thermal Performance Enhancement and Method
- Publication number 20090115053
- Publication date May 7, 2009
- Sreenivasan K. Koduri
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Individualized Low Parasitic Power Distribution Lines Deposited Ove...
- Publication number 20070122944
- Publication date May 31, 2007
- TEXAS INSTRUMENTS INCORPORATED
- Taylor R. Efland
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Robust DEMOS transistors and method for making the same
- Publication number 20060113592
- Publication date Jun 1, 2006
- Sameer Pendharkar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Robust DEMOS transistors and method for making the same
- Publication number 20050253191
- Publication date Nov 17, 2005
- Sameer Pendharkar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
N-channel LDMOS with buried P-type region to prevent parasitic bipo...
- Publication number 20050255655
- Publication date Nov 17, 2005
- Philip L. Hower
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Circuit structure integrating the power distribution functions of c...
- Publication number 20050248027
- Publication date Nov 10, 2005
- Taylor R. Efland
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
System for high-precision double-diffused MOS transistors
- Publication number 20050127409
- Publication date Jun 16, 2005
- Henry L. Edwards
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Low cost fabrication method for high voltage, high drain current MO...
- Publication number 20050118753
- Publication date Jun 2, 2005
- Taylor R. Efland
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Premature breakdown in submicron device geometries
- Publication number 20040079991
- Publication date Apr 29, 2004
- John Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Thermally enhanced semiconductor chip having integrated bonds over...
- Publication number 20040004282
- Publication date Jan 8, 2004
- Taylor R. Efland
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
In line self protecting multiple output power IC architecture
- Publication number 20030228729
- Publication date Dec 11, 2003
- Taylor R. Efland
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of forming a distributed power device with low voltage colle...
- Publication number 20030228730
- Publication date Dec 11, 2003
- Taylor R. Efland
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED SYSTEM ON A CHIP PROTECTION CIRCUIT
- Publication number 20030228721
- Publication date Dec 11, 2003
- Taylor R. Efland
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Tank-isolated-drain-extended power device
- Publication number 20030228732
- Publication date Dec 11, 2003
- Taylor R. Efland
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of fabricating a drain isolated LDMOS device
- Publication number 20030228737
- Publication date Dec 11, 2003
- Taylor R. Efland
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF BUILDING A DISTRIBUTED POWER DEVICE WITH DUAL FUNCTION MI...
- Publication number 20030227070
- Publication date Dec 11, 2003
- Taylor R. Efland
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
System for high-precision double-diffused MOS transistors
- Publication number 20030151089
- Publication date Aug 14, 2003
- Henry L. Edwards
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Higher voltage transistors for sub micron CMOS processes
- Publication number 20030127694
- Publication date Jul 10, 2003
- Alec Morton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Low leakage power transistor and method of forming
- Publication number 20030073313
- Publication date Apr 17, 2003
- Sameer P. Pendharkar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated circuit with bonding layer over active circuitry
- Publication number 20030036256
- Publication date Feb 20, 2003
- Taylor R. Efland
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods and devices for optimized digital and analog CMOS transisto...
- Publication number 20030032231
- Publication date Feb 13, 2003
- Taylor R. Efland
- H01 - BASIC ELECTRIC ELEMENTS

Taylor Rice Efland

Person

Patents Grantslast 30 patents

Power integrated circuit including series-connected source substrat...

Power integrated circuit including series-connected source substrat...

Multi-component electronic system having leadframe with support-fre...

MOS transistor with gate trench adjacent to drain extension field i...

Lateral drain-extended MOSFET having channel along sidewall of drai...

MOS transistor with gate trench adjacent to drain extension field i...

MOS transistor with gate trench adjacent to drain extension field i...

Lateral drain-extended MOSFET having channel along sidewall of drai...

Individualized low parasitic power distribution lines deposited ove...

Robust DEMOS transistors and method for making the same

N-channel LDMOS with buried P-type region to prevent parasitic bipo...

Robust DEMOS transistors and method for making the same

Premature breakdown in submicron device geometries

Individualized low parasitic power distribution lines deposited ove...

Circuit method integrating the power distribution functions of the...

Integrated power circuits with distributed bonding and current flow

Circuit structure integrating the power distribution functions of c...

N-channel LDMOS with buried p-type region to prevent parasitic bipo...

Low cost fabrication method for high voltage, high drain current MO...

Low leakage power transistor and method of forming

MOS transistors having higher drain current without reduced breakdo...

System for high-precision double-diffused MOS transistors

Thermally enhanced semiconductor chip having integrated bonds over...

Line self protecting multiple output power IC architecture

Array of transistors with low voltage collector protection

Tank-isolated-drain-extended power device

Method of fabricating a drain isolated LDMOS device

Method of fabricating integrated system on a chip protection circuit

Distributed power device with dual function minority carrier reduction

Integrated circuit with bonding layer over active circuitry

Patents Applicationslast 30 patents

POWER INTEGRATED CIRCUIT INCLUDING SERIES-CONNECTED SOURCE SUBSTRAT...

POWER INTEGRATED CIRCUIT INCLUDING SERIES-CONNECTED SOURCE SUBSTRAT...

Multi-Component Electronic System Having Leadframe with Support-Fre...

LATERAL DRAIN-EXTENDED MOSFET HAVING CHANNEL ALONG SIDEWALL OF DRAI...

MOS TRANSISTOR WITH GATE TRENCH ADJACENT TO DRAIN EXTENSION FIELD I...

MOS TRANSISTOR WITH GATE TRENCH ADJACENT TO DRAIN EXTENSION FIELD I...

Semiconductor Package Thermal Performance Enhancement and Method

MOS Transistor with Gate Trench Adjacent to Drain Extension Field I...

LATERAL DRAIN-EXTENDED MOSFET HAVING CHANNEL ALONG SIDEWALL OF DRAI...

Semiconductor Package Thermal Performance Enhancement and Method

Individualized Low Parasitic Power Distribution Lines Deposited Ove...

Robust DEMOS transistors and method for making the same

Robust DEMOS transistors and method for making the same

N-channel LDMOS with buried P-type region to prevent parasitic bipo...

Circuit structure integrating the power distribution functions of c...

System for high-precision double-diffused MOS transistors

Low cost fabrication method for high voltage, high drain current MO...

Premature breakdown in submicron device geometries

Thermally enhanced semiconductor chip having integrated bonds over...

In line self protecting multiple output power IC architecture

Method of forming a distributed power device with low voltage colle...

INTEGRATED SYSTEM ON A CHIP PROTECTION CIRCUIT

Tank-isolated-drain-extended power device

Method of fabricating a drain isolated LDMOS device

METHOD OF BUILDING A DISTRIBUTED POWER DEVICE WITH DUAL FUNCTION MI...

System for high-precision double-diffused MOS transistors

Higher voltage transistors for sub micron CMOS processes

Low leakage power transistor and method of forming

Integrated circuit with bonding layer over active circuitry

Methods and devices for optimized digital and analog CMOS transisto...