Membership
Tour
Register
Log in
Analogue/digital conversion Digital/analogue conversion
Follow
Industry
CPC
H03M1/00
This industry / category may be too specific. Please go to a parent level for more data
Parent Industries
H
ELECTRICITY
H03
Electronic circuits
H03M
CODING DECODING CODE CONVERSION IN GENERAL
Current Industry
H03M1/00
Analogue/digital conversion Digital/analogue conversion
Sub Industries
H03M1/001
Analogue/digital/analogue conversion
H03M1/002
with means for saving power
H03M1/004
Reconfigurable analogue/digital or digital/analogue converters
H03M1/005
among different converters types
H03M1/007
among different resolutions
H03M1/008
among different conversion characteristics
H03M1/02
Reversible analogue/digital converters
H03M1/04
using stochastic techniques
H03M1/06
Continuously compensating for, or preventing, undesired influence of physical parameters
H03M1/0602
of deviations from the desired transfer characteristic
H03M1/0604
at one point, i.e. by adjusting a single reference value
H03M1/0607
Offset or drift compensation
H03M1/0609
at two points of the transfer characteristic, i.e. by adjusting two reference values
H03M1/0612
over the full range of the converter
H03M1/0614
of harmonic distortion
H03M1/0617
characterised by the use of methods or means not specific to a particular type of detrimental influence
H03M1/0619
by dividing out the errors
H03M1/0621
with auxiliary conversion of a value corresponding to the physical parameter(s) to be compensated for
H03M1/0624
by synchronisation
H03M1/0626
by filtering
H03M1/0629
Anti-aliasing
H03M1/0631
Smoothing
H03M1/0634
by averaging out the errors
H03M1/0636
in the amplitude domain
H03M1/0639
using dither
H03M1/0641
the dither being a random signal
H03M1/0643
in the spatial domain
H03M1/0646
by analogue redistribution among corresponding nodes of adjacent cells
H03M1/0648
by arranging the quantisation value generators in a non-sequential pattern layout
H03M1/0651
by selecting the quantisation value generators in a non-sequential order
H03M1/0653
the order being based on measuring the error
H03M1/0656
in the time domain
H03M1/0658
by calculating a running average of a number of subsequent samples
H03M1/066
by continuously permuting the elements used
H03M1/0663
using clocked averaging
H03M1/0665
using data dependent selection of the elements
H03M1/0668
the selection being based on the output of noise shaping circuits for each element
H03M1/067
using different permutation circuits for different parts of the digital signal
H03M1/0673
using random selection of the elements
H03M1/0675
using redundancy
H03M1/0678
using additional components or elements
H03M1/068
the original and additional components or elements being complementary to each other
H03M1/0682
using a differential network structure
H03M1/0685
using real and complementary patterns
H03M1/0687
using fault-tolerant coding
H03M1/069
by range overlap between successive stages or steps
H03M1/0692
using a diminished radix representation
H03M1/0695
using less than the maximum number of output states per stage
H03M1/0697
in time
H03M1/08
of noise
H03M1/0809
of bubble errors
H03M1/0818
of clock feed-through
H03M1/0827
of electromagnetic or electrostatic field noise
H03M1/0836
of phase error
H03M1/0845
of power supply variations
H03M1/0854
of quantisation noise
H03M1/0863
of switching transients
H03M1/0872
by disabling changes in the output during the transitions
H03M1/0881
by forcing a gradual change from one output level to the next
H03M1/089
of temperature variations
H03M1/10
Calibration or testing
H03M1/1004
without interrupting normal operation
H03M1/1009
Calibration
H03M1/1014
at one point of the transfer characteristic, i.e. by adjusting a single reference value
H03M1/1019
by storing a corrected or correction value in a digital look-up table
H03M1/1023
Offset correction
H03M1/1028
at two points of the transfer characteristic, i.e. by adjusting two reference values
H03M1/1033
over the full range of the converter
H03M1/1038
by storing corrected or correction values in one or more digital look-up tables
H03M1/1042
the look-up table containing corrected values for replacing the original digital values
H03M1/1047
using an auxiliary digital/analogue converter for adding the correction values to the analogue signal
H03M1/1052
using two or more look-up tables each corresponding to a different type of error
H03M1/1057
by trimming
H03M1/1061
using digitally programmable trimming circuits
H03M1/1066
Mechanical or optical alignment
H03M1/1071
Measuring or testing
H03M1/1076
Detection or location of converter hardware failure
H03M1/108
Converters having special provisions for facilitating access for testing purposes
H03M1/1085
using domain transforms
H03M1/109
for dc performance
H03M1/1095
for ac performance
H03M1/12
Analogue/digital converters
H03M1/1205
Multiplexed conversion systems
H03M1/121
Interleaved
H03M1/1215
using time-division multiplexing
H03M1/122
Shared
H03M1/1225
using time-division multiplexing
H03M1/123
Simultaneous
H03M1/1235
Non-linear conversion not otherwise provided for in subgroups of H03M1/12
H03M1/124
Sampling or signal conditioning arrangements specially adapted for A/D converters
H03M1/1245
Details of sampling arrangements or methods
H03M1/125
Asynchronous operation
H03M1/1255
Synchronisation of the sampling frequency or phase to the input frequency or phase
H03M1/126
Multi-rate systems
H03M1/1265
Non-uniform sampling
H03M1/127
at intervals varying with the rate of change of the input signal
H03M1/1275
at extreme values only
H03M1/128
at random intervals
H03M1/1285
Synchronous circular sampling
H03M1/129
Means for adapting the input signal to the range the converter can handle
H03M1/1295
Clamping
H03M1/14
Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit
H03M1/141
in which at least one step is of the folding type; Folding stages therefore
H03M1/142
the reference generators for the steps being arranged in a common two-dimensional array
H03M1/143
in pattern-reading type converters
H03M1/144
the steps being performed sequentially in a single stage
H03M1/145
the steps being performed sequentially in series-connected stages
H03M1/146
all stages being simultaneous converters
H03M1/147
at least two of which share a common reference generator
H03M1/148
the reference generator being arranged in a two-dimensional array
H03M1/16
with scale factor modification
H03M1/161
in pattern-reading type converters
H03M1/162
the steps being performed sequentially in a single stage
H03M1/164
the steps being performed sequentially in series-connected stages
H03M1/165
in which two or more residues with respect to different reference levels in a stage are used as input signals for the next stage
H03M1/167
all stages comprising simultaneous converters
H03M1/168
and delivering the same number of bits
H03M1/18
Automatic control for modifying the range of signals the converter can handle
H03M1/181
in feedback mode
H03M1/182
the feedback signal controlling the reference levels of the analogue/digital converter
H03M1/183
the feedback signal controlling the gain of an amplifier or attenuator preceding the analogue/digital converter
H03M1/185
the determination of the range being based on more than one digital output value
H03M1/186
in feedforward mode
H03M1/187
using an auxiliary analogue/digital converter
H03M1/188
Multi-path
H03M1/20
Increasing resolution using an n bit system to obtain n + m bits
H03M1/201
by dithering
H03M1/202
by interpolation
H03M1/203
using an analogue interpolation circuit
H03M1/204
in which one or more virtual intermediate reference signals are generated between adjacent original reference signals
H03M1/205
using resistor strings for redistribution of the original reference signals or signals derived therefrom
H03M1/206
using a logic interpolation circuit
H03M1/207
using a digital interpolation circuit
H03M1/208
by prediction
H03M1/22
Pattern-reading type
H03M1/24
using relatively movable reader and disc or strip
H03M1/245
Constructional details of parts relevant to the encoding mechanism
H03M1/26
with weighted coding, i.e. the weight given to a digit depends on the position of the digit within the block or code word
H03M1/28
with non-weighted coding
H03M1/282
of the pattern-shifting type
H03M1/285
of the unit Hamming distance type
H03M1/287
using gradually changing slit width or pitch within one track; using plural tracks having slightly different pitches
H03M1/30
incremental
H03M1/301
Constructional details of parts relevant to the encoding mechanism
H03M1/303
Circuits or methods for processing the quadrature signals
H03M1/305
for detecting the direction of movement
H03M1/306
for waveshaping
H03M1/308
with additional pattern means for determining the absolute position
H03M1/32
using cathode-ray tubes or analoguous two-dimensional deflection systems
H03M1/34
Analogue value compared with reference values
H03M1/345
for direct conversion to a residue number representation
H03M1/36
simultaneously only
H03M1/361
having a separate comparator and reference value for each quantisation level
H03M1/362
the reference values being generated by a resistive voltage divider
H03M1/363
the voltage divider taps being held in a floating state
H03M1/365
the voltage divider being a single resistor string
H03M1/366
using current mode circuits
H03M1/367
Non-linear conversion
H03M1/368
having a single comparator per bit
H03M1/38
sequentially only
H03M1/40
recirculation type
H03M1/403
using switched capacitors
H03M1/406
using current mode circuits
H03M1/42
Sequential comparisons in series-connected stages with no change in value of analogue signal
H03M1/44
Sequential comparisons in series-connected stages with change in value of analogue signal
H03M1/442
using switched capacitors
H03M1/445
the stages being of the folding type
H03M1/447
using current mode circuits
H03M1/46
with digital/analogue converter for supplying reference values to converter
H03M1/462
Details of the control circuitry
H03M1/464
Non-linear conversion
H03M1/466
using switched capacitors
H03M1/468
in which the input S/H circuit is merged with the feedback DAC array
H03M1/48
Servo-type converters
H03M1/485
for position encoding
H03M1/50
with intermediate conversion to time interval
H03M1/502
using tapped delay lines
H03M1/504
using pulse width modulation
H03M1/506
the pulse width modulator being of the charge-balancing type
H03M1/508
the pulse width modulator being of the self-oscillating type
H03M1/52
Input signal integrated with linear return to datum
H03M1/54
Input signal sampled and held with linear return to datum
H03M1/56
Input signal compared with linear ramp
H03M1/58
Non-linear conversion
H03M1/60
with intermediate conversion to frequency of pulses
H03M1/62
Non-linear conversion
H03M1/64
with intermediate conversion to phase of sinusoidal or similar periodical signals
H03M1/645
for position encoding
H03M1/66
Digital/analogue converters
H03M1/661
Improving the reconstruction of the analogue output signal beyond the resolution of the digital input signal
H03M1/662
Multiplexed conversion systems
H03M1/664
Non-linear conversion not otherwise provided for in subgroups of H03M1/66
H03M1/665
with intermediate conversion to phase of sinusoidal or similar periodical signals
H03M1/667
Recirculation type
H03M1/668
Servo-type converters
H03M1/68
with conversions of different sensitivity
H03M1/682
both converters being of the unary decoded type
H03M1/685
the quantisation value generators of both converters being arranged in a common two-dimensional array
H03M1/687
Segmented
H03M1/70
Automatic control for modifying converter range
H03M1/72
Sequential conversion in series-connected stages
H03M1/74
Simultaneous conversion
H03M1/742
using current sources as quantisation value generators
H03M1/745
with weighted currents
H03M1/747
with equal currents which are switched by unary decoded digital signals
H03M1/76
using switching tree
H03M1/765
using a single level of switches which are controlled by unary decoded digital signals
H03M1/78
using ladder network
H03M1/785
using resistors
H03M1/80
using weighted impedances
H03M1/802
using capacitors
H03M1/804
with charge redistribution
H03M1/806
with equally weighted capacitors which are switched by unary decoded digital signals
H03M1/808
using resistors
H03M1/82
with intermediate conversion to time interval
H03M1/822
using pulse width modulation
H03M1/825
by comparing the input signal with a digital ramp signal
H03M1/827
in which the total pulse width is distributed over multiple shorter pulse widths
H03M1/84
Non-linear conversion
H03M1/86
with intermediate conversion to frequency of pulses
H03M1/88
Non-linear conversion
Industries
Overview
Organizations
People
Information
Impact
Please log in for detailed analytics