the second connecting process involving a wire connector

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H01L2224/92247

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HELECTRICITY H01Electric elements H01LSEMICONDUCTOR DEVICES ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00

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H01L2224/92247the second connecting process involving a wire connector

Industries

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Patents Grantslast 30 patents

Information Patent Grant
Power module semiconductor device and inverter equipment, and fabri...
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Information Patent Grant
Die attached leveling control by metal stopper bumps
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Information Patent Grant
Semiconductor device and method for manufacturing the same
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Information Patent Grant
Semiconductor packages with embedded wiring on re-distributed bumps
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Information Patent Grant
Hybrid embedded packaging structure and manufacturing method thereof
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- Xianming Chen
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Information Patent Grant
Stacking structure, package structure and method of fabricating the...
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- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing leadless semiconductor package with wettab...
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Information Patent Grant
Integrated circuit package having wirebonded multi-die stack
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Information Patent Grant
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Information Patent Grant
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Information Patent Grant
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Die attach surface copper layer with protective layer for microelec...
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Information Patent Grant
Die stack with cascade and vertical connections
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Multichip packaged semiconductor device
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Information Patent Grant
Systems and methods for fabricating silicon die stacks for electron...
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Information Patent Grant
Camera module, and photosensitive component thereof and manufacturi...
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Sensor package and manufacturing method thereof
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- Amkor Technology Singapore Holding Pte Ltd.
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Information Patent Grant
Power module semiconductor device and inverter equipment, and fabri...
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Information Patent Grant
Power module semiconductor device and inverter equipment, and fabri...
- Patent number 11,967,543
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- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing leadless semiconductor package with wettab...
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Information Patent Grant
Isolated semiconductor package with HV isolator on block
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- Vivek K Arora
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Information Patent Grant
Die attached leveling control by metal stopper bumps
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Information Patent Grant
Multi-chip package with reinforced isolation
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Information Patent Grant
Power enhanced stacked chip scale package solution with integrated...
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Information Patent Grant
Package with elevated lead and structure extending vertically from...
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Information Patent Grant
Electric drive module
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- Issue date Jan 2, 2024
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- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked semiconductor die assemblies with support members and assoc...
- Patent number 11,855,065
- Issue date Dec 26, 2023
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- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

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HYBRID QUAD FLAT PACKAGE ELECTRONIC DEVICE
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- TEXAS INSTRUMENTS INCORPORATED
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SEMICONDUCTOR DEVICE WITH AN INDUCTIVE COATING
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SEMICONDUCTOR PACKAGE
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- Junyun KWEON
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CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF
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Semiconductor Chip Package and Manufacturing Method Thereof
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SEMICONDUCTOR DEVICE PACKAGE WITH WETTABLE FLANKS
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DIE ATTACH SURFACE COPPER LAYER WITH PROTECTIVE LAYER FOR MICROELEC...
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ELECTRONIC DEVICE WITH WAFER LEVEL CAPACITOR
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STACKED SEMICONDUCTOR DIE ASSEMBLIES WITH DIE SUPPORT MEMBERS AND A...
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- TEXAS INSTRUMENTS INCORPORATED
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- H01 - BASIC ELECTRIC ELEMENTS

the second connecting process involving a wire connector

Industry

Parent Industries

Current Industry

Patents Grantslast 30 patents

Power module semiconductor device and inverter equipment, and fabri...

Die attached leveling control by metal stopper bumps

Semiconductor device and method for manufacturing the same

Semiconductor packages with embedded wiring on re-distributed bumps

Hybrid embedded packaging structure and manufacturing method thereof

Stacking structure, package structure and method of fabricating the...

Method for manufacturing leadless semiconductor package with wettab...

Integrated circuit package having wirebonded multi-die stack

Integrated power switching device heat sink

Low pressure sintering powder

Semiconductor chip package including lead frame and manufacturing m...

Leadframe package with pre-applied filler material

QFN device having a mechanism that enables an inspectable solder jo...

Package with different types of semiconductor dies attached to a fl...

Die attach surface copper layer with protective layer for microelec...

Die stack with cascade and vertical connections

Multichip packaged semiconductor device

Systems and methods for fabricating silicon die stacks for electron...

Camera module, and photosensitive component thereof and manufacturi...

Sensor package and manufacturing method thereof

Power module semiconductor device and inverter equipment, and fabri...

Power module semiconductor device and inverter equipment, and fabri...

Method for manufacturing leadless semiconductor package with wettab...

Isolated semiconductor package with HV isolator on block

Die attached leveling control by metal stopper bumps

Multi-chip package with reinforced isolation

Power enhanced stacked chip scale package solution with integrated...

Package with elevated lead and structure extending vertically from...

Electric drive module

Stacked semiconductor die assemblies with support members and assoc...

Patents Applicationslast 30 patents

SEMICONDUCTOR DEVICE PACKAGE WITH INTEGRATED LAMINATE TRANSFORMER

INTEGRATED CIRCUIT PACKAGE HAVING WIREBONDED MULTI-DIE STACK

BATTERY PROTECTION PACKAGE HAVING CO-PACKED TRANSISTORS AND INTEGRA...

SEMICONDUCTOR DEVICE FABRICATION METHOD AND LEAD FRAME WITH SIDE PO...

HYBRID QUAD FLAT PACKAGE ELECTRONIC DEVICE

SEMICONDUCTOR DEVICE PACKAGE WITH INTEGRAL THERMAL DISSIPATION STRU...

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, METHOD OF MANUFACTURI...

DUAL PACKAGE SWITCHING POWER DEVICE

SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR...

INTEGRATED CIRCUIT HAVING IMPROVED BALL BONDING ADHESION

DUAL SWITCHING POWER DEVICE

SEMICONDUCTOR DEVICE WITH AN INDUCTIVE COATING

SEMICONDUCTOR PACKAGE

CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF

Semiconductor Chip Package and Manufacturing Method Thereof

SEMICONDUCTOR DEVICE PACKAGE WITH WETTABLE FLANKS

DUAL LEADFRAME SEMICONDUCTOR DEVICE AND METHOD THEREFOR

DIE ATTACH SURFACE COPPER LAYER WITH PROTECTIVE LAYER FOR MICROELEC...

LOW PRESSURE SINTERING POWDER

ELECTRONIC DEVICE WITH WAFER LEVEL CAPACITOR

ELECTRONIC DEVICE WITH IMPROVED LEADFRAME TRIMMING PROCESS

SYSTEMS AND METHODS FOR FABRICATING SILICON DIE STACKS FOR ELECTRON...

DIE ISOLATION WITH CONFORMAL COATING

SEMICONDUCTOR PACKAGE, METHOD OF MANUFACTURING A SEMICONDUCTOR DEVI...

SENSOR PACKAGE AND MANUFACTURING METHOD THEREOF

Upside-Down DRAM Package Structure

MICROMECHANICAL COMPONENT

POWER MODULE SEMICONDUCTOR DEVICE AND INVERTER EQUIPMENT, AND FABRI...

STACKED SEMICONDUCTOR DIE ASSEMBLIES WITH DIE SUPPORT MEMBERS AND A...

SEMICONDUCTOR PACKAGE SUBSTRATE WITH A SMOOTH GROOVE STRADDLING TOP...