3919007

Information

• Patent Grant
• 3919007

• References
• Source

• Patent Number

  3,919,007

• Date Filed

  Not available

• Date Issued

  Tuesday, November 11, 1975
  49 years ago

• CPC

  • H01L29/7816 - Lateral DMOS transistors
  • H01L21/00 - Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/223 - using diffusion into or out of a solid from or into a gaseous phase
  • H01L21/8234 - MIS technology
  • H01L27/00 - Devices consisting of a plurality of semiconductor or other solid state components formed in or on a common substrate
  • H01L27/088 - the components being field-effect transistors with insulated gate
  • H01L29/00 - Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier
  • H01L29/0696 - of cellular field-effect devices
  • H01L29/1045 - the doping structure being parallel to the channel length
  • H01L29/42368 - the thickness being non-uniform
  • H01L29/42376 - characterised by the length or the sectional shape
  • H01L29/456 - on silicon
  • H01L29/7801 - DMOS transistors
  • H01L29/7802 - Vertical DMOS transistors
  • H01L29/7839 - with Schottky drain or source contact
  • Y10S148/106 - Masks, special
  • Y10S148/145 - Shaped junctions
  • Y10S148/151 - Simultaneous diffusion
  • Y10S148/167 - Two diffusions in one hole

• US Classifications

  • 438 - Semiconductor device manufacturing: process
  • 148 - Metal treatment
  • 257 - Active solid-state devices