Chip package

Abstract

A chip package including a package substrate, a chip, several bonding wires, a flash-resisting ring and a molding compound. The package substrate includes a carrying surface and several contacts disposed on the carrying surface. The chip is disposed on the carrying surface. A surface of the chip away from the package substrate includes an active region and several bonding pads. The bonding pads are located outside the active region. The bonding wires connect the bonding pads and the contacts. The flash-resisting ring disposed on the chip is located between the bonding pads and the active region. The flash-resisting ring surrounding the active region includes at least one buffer groove. The buffer groove surrounds the active region. The molding compound disposed on the package substrate and the chip encapsulates at least the bonding pads, the contacts and the bonding wires. The molding compound exposes the active region.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1A (PriorArt) is a cross-sectional view of a conventional chip package in an electro-optical device;

FIG. 1B (Prior Art) illustrates the chip package in FIG. 1A in an molding process

FIG. 2 is a cross-sectional view of a chip package according to a first embodiment of the invention;

FIGS. 3A˜3H are cross-sectional views of the package process of the chip package in FIG. 2;

FIG. 4 is a cross-sectional view of a chip package according to a second embodiment of the invention;

FIG. 5 is a cross-sectional view of a chip package according to a third embodiment of the invention; and

FIGS. 6A˜6C illustrate steps of forming a hole in the chip package in FIG. 5.

Claims

1. A chip package comprising: a package substrate comprising a carrying surface and a plurality of contacts disposed on the carrying surface;a chip disposed on the carrying surface, a surface of the chip away from the package substrate comprising an active region and a plurality of bonding pads located outside the active region;a plurality of bonding wires connecting the bonding pads and the contacts;a flash-resisting ring disposed on the chip, the flash-resisting ring located between the bonding pads and the active region, the flash-resisting ring surrounding the active region, at least a buffer groove formed on the flash-resisting ring, the buffer groove surrounding the active region; anda molding compound disposed on the package substrate and the chip, the molding compound encapsulating at least the bonding pads, the contacts and the bonding wires, the molding compound exposing the active region.

2. The chip package according to claim 1, wherein the buffer groove exposes the surface of the chip.

3. The chip package according to claim 2, wherein a hole is formed on the surface of the chip correspondingly to the buffer groove.

4. The chip package according to claim 1, wherein the molding compound further encapsulates a portion of the flash-resisting ring.

5. The chip package according to claim 1, wherein the material of the flash-resisting ring comprises metal.

6. The chip package according to claim 1, wherein the chip is a charge coupled device (CCD), a complementary metal oxide semiconductor (CMOS) image sensor, a finger print sensor or a photo diode.