1. Field of the Invention
The present invention relates to a method for fabricating a high density interconnect (HDI) printed circuit board or HDI board. More particularly, the present invention relates to a method for fabricating an HDI board with a large-area copper plane utilizing laser technology.
2. Description of the Prior Art
With the development of science and technology, electronic products such as mobile phones, MP3, portable computers, consumer electronics, vehicle electronics or the related parts and equipments require even greater levels of miniaturization. To meet these requirements, the degree of circuit integration is increasing and circuit patterns are becoming much denser than ever. To accommodate these developments in the art, HDI boards have been developed.
HDI boards are defined as substrates or boards with a higher wiring density per unit area than conventional printed circuit boards (PCB). They have finer lines and spaces (<75 μm), smaller vias (<150 μm) and capture pads (<400 μm), and higher connection pad density (>20 pads/cm2) than employed in conventional PCB technology. HDI boards are used to reduce size and weight, as well as to enhance electrical performance.
A typical method of the related art for forming an HDI board includes the steps of: (1) providing a double-sided circuit board, and then forming a first resin coated copper (RCC) foil separately on two sides of the double-sided circuit board; (2) froming a number of first copper micro-vias in two copper layers of the first resin coated copper foils by using an etching process; (3) forming a second resin coated copper foil separately on each copper layer of the first resin coated copper foils; (4) forming a number of second copper micro-vias in each copper layer of the second resin coated copper foils by an etching process; (5) removing corresponding portions of the resin layer of the first and second resin coated copper foils from the first and second copper micro-via using Nd:YAG (UV) or CO2 laser, thereby obtaining a number of stacked via-holes; and (6) electro-plating inner walls of the stacked via-holes, thereby obtaining a number of electrically conductive stacked via-holes. These electrically conductive, stacked via-holes can be used to electrically connect the first resin coated copper foils and the second resin coated copper foils.
The above-described prior art method for forming the stacked via-holes has several disadvantages. For example, the first and second copper micro-vias are formed by chemical wet etching methods. The chemical wet etching processes are complex and generally include lithographic steps such as photoresist coating, exposure, development, and then etching. Further, discrepancies may be introduced at each step. Such discrepancies may affect a size and a location of the first and second copper micro-via. Thus, such variances may occur between, e.g., the first copper micro-via and the corresponding second copper micro-via, thereby resulting in alignment or sizing errors in the finished stacked via-holes.
Therefore, it is desirable to provide an improved method for forming an HDI board that overcomes the above-described problems.
Upon reading and understanding the present disclosure it is recognized that the inventive subject matter described herein provides novel structures and methods and may include novel structures and methods not expressed in this summary. The following summary is provided to give the reader a brief summary which is not intended to be exhaustive or limiting and the scope of the invention is provided by the attached claims and the equivalents thereof
It is one object of the present invention to provide an improved method for forming a circuit board in order to solve the above-mentioned prior art problems and shortcomings.
One embodiment of the invention provides a method for fabricating a circuit board including: providing a substrate; forming a non-conductive material layer on the substrate, wherein the non-conductive material layer comprise a dielectric material and catalytic particles; projecting a laser beam onto the non-conductive material layer to etch at least one recessed circuit structure, and the laser beam simultaneously activating the catalytic particles in the recessed circuit structure; and forming a damascened conductive structure in the recessed circuit structure, wherein the damascened conductive structure comprises at least one fin-shaped protrusion. The dielectric material comprises epoxy resins, modified epoxy resins, polyesters, acrylate, fluoro-containing polymer, (PPO) polyphenylene oxide (PPO), polyimide, phenolic resins, polysulfone (PSF), Si-containing polymer, BT resins, polycyanate, polyethylene, polycarbonate, acrylonitrile-butadiene-styrene copolymer, polyethylene terephthalate (PET), polybutylene terephthalate (PBT), liquid crystal polymers (LCP), polyamide, PA 6, nylonpolyoxymethylene (POM) polyphenylene sulfide (PPS), COC or a combination thereof. The catalytic particles comprise nano-particles of metal or metal coordination compound. The laser beam has a wavelength ranging between 193-10200 nm and energy of 0.1-10 mJ/cm2. The laser beam has a laser spot size ranging between 30-80 μm.
These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings.
In the following description, numerous specific details are given to provide a thorough understanding of the invention. However, it will be apparent to one skilled in the art that the invention may be practiced without these specific details. In order to avoid obscuring the present invention, some well-known system configurations and process steps are not disclosed in detail.
The present invention pertains to a method for fabricating an HDI printed circuit board or HDI board, and may be applicable to the fabrication of molded interconnect devices or may be applicable to the fabrication of package substrates. In particular, the present invention is suited for the fabrication of HDI printed circuit boards with a large-area copper plane that may be function as a ground plane or power plane of the HDI board. In a best mode, the present invention involves the use of hole-forming technique by laser shooting to form the large-area copper plane.
A non-conductive material layer 120 is provided on the substrate 101 to cover the patterned copper layer 110 and the exposed areas of the top surface of the substrate 101. The non-conductive material layer 120 may comprise dielectric matrix and catalytic particles 119 dispersed or mixed in the dielectric matrix. The aforesaid catalytic particles 119 may be activated by laser energy and a conductive layer may be selectively deposited on the laser-activated traces on the non-conductive material layer 120.
The aforesaid dielectric matrix may include but not limited to, for example, epoxy resins, modified epoxy resins, polyesters, acrylate, fluoro-containing polymer, polyphenylene oxide (PPO), polyimide, phenolic resins, polysulfone (PSF), Si-containing polymers, BT resins, polycyanate, polyethylene, polycarbonate, acrylonitrile-butadiene-styrene copolymer, polyethylene terephthalate (PET), polybutylene terephthalate (PBT), liquid crystal polymers (LCP), polyamide, PA 6, nylonpolyoxymethylene (POM) polyphenylene sulfide (PPS), COC or a combination thereof.
The catalytic particles 119 described above may be nano-particles of metals or metal coordination compounds. For example, suitable metal coordination compounds may include metal oxides, metal nitrides, metal complexes and/or metal chelating compounds. In one embodiment of the present invention, the aforesaid metal may include but not limited to zinc, copper, silver, gold, nickel, palladium, platinum, cobalt, rhodium, iridium, indium, iron, manganese, aluminum, chromium, tungsten, vanadium, tantalum, and/or titanium.
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In some cases, a large-area copper plane is required in the circuit board 100 to function, for example, as a ground plane or power plane of the circuit board. However, it is time-consuming to form the large-area copper plane by the laser ablation method because the laser beam with specific energy and wavelength is directed on the circuit board in a scan-and-step manner with a very tight pitch to form the circuit structures such as blind via 121, solder pad opening 122 and trace trenches 123. Therefore, the production throughput can be significantly reduced when manufacturing such circuit boards with large-area copper planes. The invention addresses this issue in one aspect.
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By way of example, the laser spot 200a projected onto the non-conductive material layer 120 overlaps with the laser spots 200b and 200c, resulting in the overlapping area 210 between the laser spots 200a and 200b and the overlapping area 240 between the laser spots 200a and 200c. Likewise, the laser spot 200b overlaps with the laser spots 200a and 200d, resulting in the overlapping area 210 between the laser spots 200a and 200b and the overlapping area 220 between the laser spots 200b and 200d, while the laser spot 200d overlaps with the laser spots 200b and 200c, resulting in the overlapping area 220 between the laser spots 200b and 200d and the overlapping area 230 between the laser spots 200c and 200d. According to the embodiment of this invention, the laser spot 200a also overlaps with the laser spot 200d and the laser spot 200b overlaps with the laser spot 200c. According to the embodiment of this invention, the laser spot pitch P1 may range between 15-80 μm.
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For example, the laser spot 200a projected onto the non-conductive material layer 120 overlaps with the laser spots 200b and 200c, resulting in the overlapping area 210 between the laser spots 200a and 200b and the overlapping area 240 between the laser spots 200a and 200c. Likewise, the laser spot 200b overlaps with the laser spots 200a and 200d, resulting in the overlapping area 210 between the laser spots 200a and 200b and the overlapping area 220 between the laser spots 200b and 200d, while the laser spot 200d overlaps with the laser spots 200b and 200c, resulting in the overlapping area 220 between the laser spots 200b and 200d and the overlapping area 230 between the laser spots 200c and 200d. According to the embodiment of this invention, with the larger laser spot pitch P2, the laser spot 200a does not overlap with the laser spot 200d and the laser spot 200b does not overlap with the laser spot 200c. According to the embodiment of this invention, the laser spot pitch P2 may range between 15-80 μm.
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For example, the laser spot 200a projected onto the non-conductive material layer 320 overlaps with the laser spots 200b and 200c, resulting in the overlapping area 210 between the laser spots 200a and 200b and the overlapping area 240 between the laser spots 200a and 200c. Likewise, the laser spot 200b overlaps with the laser spots 200a and 200d, resulting in the overlapping area 210 between the laser spots 200a and 200b and the overlapping area 220 between the laser spots 200b and 200d, while the laser spot 200d overlaps with the laser spots 200b and 200c, resulting in the overlapping area 220 between the laser spots 200b and 200d and the overlapping area 230 between the laser spots 200c and 200d.
After the formation of the recessed, reticular pattern 322 on the non-conductive material layer 320 by the laser shooting method, a metal layer is then deposited into the recessed, reticular pattern 322 so as to form a large-area copper plane on the non-conductive material layer 320. According to the embodiment of this invention, the metal layer may be deposited by conventional plating techniques.
Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.
This is a division of U.S. application Ser. No. 12/606,192 filed Oct. 27, 2009.
Number | Date | Country | |
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Parent | 12606192 | Oct 2009 | US |
Child | 13653423 | US |