Claims
- 1. A circuit board, comprising:a substrate having a plurality of non-conductive layers stacked adjacent to each other that form a perimeter edge, wherein the substrate forms an ISR; a via portion formed in the perimeter edge; and a buried edge connector disposed in the via portion; wherein the via portion includes a mechanical mechanism to mechanically restrain the buried edge connector in the via portion.
- 2. The circuit board as recited in claim 1, wherein the buried edge connector comprised platinum and gold.
- 3. A circuit board comprising:a plurality of non-conductive layers of a substrate which are stacked adjacent to each other; at least one via through the plurality of non-conductive layers filled with a conductive material; a cover layer covering the at least one via; and a bottom layer beneath the at least one via; wherein an exposed surface of the conductive material is substantially perpendicular relative to a major surface of the plurality of non-conductive layers; and wherein the substrate forms an ISR.
- 4. The circuit board of claim 3, wherein the at least one via includes a plurality of vias in a generally linear alignment.
- 5. The circuit board of claim 3, wherein the at least one via comprises at least one aperture through each of the plurality of layers, the at least one aperture having a diameter that is greater than twice the thickness of one of the plurality of layers.
- 6. The circuit board of claim 3, wherein the plurality of layers of a substrate comprises a plurality of layers of a green laminate.
- 7. A circuit board sub-assembly comprising:a stack including a plurality of layers of a substrate; a via through the plurality of layers; a conductive material within the via; a cover layer covering the via and the conductive material; and a vent which extends through the cover layer and which is open to a top surface of the conductive material within the via and which does not extend through the via, wherein the vent allows any gases created in the via during curing of the substrate to be exhausted through the vent.
- 8. The circuit board sub-assembly of claim 7, wherein the plurality of layers includes a plurality of green laminate substrate layers.
- 9. The circuit board sub-assembly of claim 7, wherein the vent is located at an offset position relative to the via.
- 10. The circuit board sub-assembly of claim 7, wherein a width of the via is greater than twice a thickness of one of the plurality of layers.
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is a Division of U.S. application Ser. No. 09/156,205 filed Sep. 17, 1998 now U.S. Pat. No. 6,256,880, the specification of which is herein incorporated by reference.
US Referenced Citations (26)