DIE ATTACHING METHOD

Abstract
A die attaching method for attaching semiconductor dies on wafers, each wafer having a first center point and a first radius may comprise expanding a wafer carrier tape so that the wafer has a second center point and a second radius, measuring the second center point and second radius of the wafer, adding the difference between the first radius and the second radius to a first coordinate value of a first die to calculate a second coordinate value of the first die, and picking up and attaching the semiconductor dies consecutively from the first die. Calculating the second coordinate value of the first die may include compensating the first center point of the wafer based on the second center point of the wafer to calculate the positional coordinate of the semiconductor dies including the first die.
Description

BRIEF DESCRIPTION OF THE DRAWINGS

Exemplary embodiments will be described with reference to the accompanying drawings, wherein like reference numerals designate like structural elements, and, in which:



FIG. 1 is a plan view of a wafer used in an example of a conventional die attaching method.



FIG. 2A is an enlarged view of section A in FIG. 1.



FIG. 2B is an enlarged view of section B in FIG. 1.



FIG. 3 is a plan view of a part of a wafer used in another example of a conventional die attaching method.



FIG. 4 is a flow chart of a die attaching method in accordance with an example embodiment.



FIG. 5 is a plan view of a wafer before tape expansion.



FIG. 6 is a plan view of a wafer after tape expansion.



FIG. 7 is a view illustrating a method to calculate the coordinate of a first die.



FIG. 8 is a view illustrating a part of wafer map data available from an EDS test.


Claims
  • 1. A die attaching method for attaching semiconductor dies of a plurality of wafers, each wafer having a first center point and a first radius, the method comprising: mounting a wafer having semiconductor dies including a reference semiconductor die on a wafer carrier tape;expanding the wafer carrier tape so that the wafer has a second center point and a second radius;measuring the second center point and the second radius of the wafer;adding the difference between the first radius and the second radius to a first coordinate value of the reference semiconductor die to calculate a second coordinate value of the reference semiconductor die; andpicking up and attaching the remainder of the semiconductor dies consecutively from the reference semiconductor die.
  • 2. The method of claim 1, wherein measuring the second center point and second radius of the wafer includes recognizing images of at least three edge points of the wafer and calculating the second center point and the second radius from coordinate values of the wafer edge points obtained from the images.
  • 3. The method of claim 1, wherein the first center point and the first radius of the wafer are wafer map data available from an electrical die sorting test.
  • 4. The method of claim 1, wherein calculating the second coordinate value of the reference semiconductor die includes compensating the first center point of the wafer based on the second center point of the wafer to calculate the positional coordinate of the semiconductor dies including the reference semiconductor die.
  • 5. The method of claim 1, wherein calculating the second coordinate value of the reference semiconductor die includes calculating and comparing the dispersion ratio of the reference semiconductor dies of the plurality of wafers.
  • 6. The method of claim 5, further comprising interrupting a die attaching process in the case that the dispersion ratio of the reference semiconductor die of a current wafer to a reference semiconductor die of a previous wafer is 30% or more.
  • 7. The method of claim 1, wherein the wafer is an inkless wafer.
  • 8. A method for aligning a wafer for die attaching, the method comprising: obtaining the wafer including at least one semiconductor die;mounting the wafer on a wafer carrier tape;obtaining an unstretched wafer center point and an unstretched wafer radius;stretching the wafer carrier tape upon which the wafer is mounted;obtaining a stretched wafer center point and a stretched wafer radius; andcalculating a position of the semiconductor die.
  • 9. The method of claim 8, wherein obtaining the unstretched wafer center point and the unstretched wafer radius comprises receiving data from an electrical die sorting test.
  • 10. The method of claim 8, wherein obtaining the stretched wafer center point and the stretched wafer radius comprises recognizing edge images and calculating the stretched wafer center point and the stretched wafer radius from coordinate values of the edge images.
  • 11. The method of claim 10, wherein recognizing edge images comprises recognizing images of at least three edge points of the wafer.
  • 12. The method of claim 8, wherein calculating the position of the semiconductor die comprises adding the difference between the stretched wafer radius and the unstretched wafer radius to a reference position.
  • 13. The method of claim 12, wherein the reference position is provided by an electrical die sorting test.
  • 14. The method of claim 8, further comprising storing the position of the semiconductor die.
  • 15. The method of claim 14, further comprising calculating a dispersion ratio by comparing the position of the semiconductor die with positions stored from previous wafers.
  • 16. The method of claim 15, further comprising generating an interrupt signal when the dispersion ratio exceeds a reference value.
  • 17. The method of claim 16, wherein the reference value is about 30%.
  • 18. The method of claim 8, wherein calculating the position of the semiconductor die comprises comparing the stretched wafer center point with the unstretched wafer center point.
Priority Claims (1)
Number Date Country Kind
2006-10713 Feb 2006 KR national