Claims
- 1. A method of fabricating a metal interconnect level on a substrate in an integrated circuit device, the method comprising:depositing a binder precursor and a slurry comprising silicalite crystals and one or more solvents on the substrate; heating the substrate wherein a porous insulating material containing silicalite crystals is formed; etching via features in the porous insulating material through a first photolithographically patterned photoresist layer; etching trench features in the etched porous insulating material through a second photolithographically patterned photoresist layer; and filling the via features and trench features with metal.
- 2. The method of claim 1 further comprising exposing the etched porous insulating material to mercaptopropyltrimethylsiloxane before filling the via features and the trench features with metal.
- 3. A method of fabricating a metal interconnect level on a substrate in an integrated circuit device, the method comprising:depositing an organic dielectric film on a substrate; depositing a binder precursor and a slurry comprising silicalite crystals and one or more solvents on the organic dielectric film, wherein the binder precursor is a silica precursor; heating the substrate wherein a porous insulating material containing silicalite crystals is formed; etching via features in the porous insulating material through a first photolithographically patterned photoresist layer; etching via features in the organic dielectric layer through the etched porous insulating layer; etching trench features in the etched porous insulating material through a second photolithographically patterned photoresist layer; and filling the via features and trench features with metal.
- 4. A method of fabricating a metal interconnect level on a substrate in an integrated circuit device, the method comprising:depositing a metal layer on a substrate; etching features in the metal layer through a first photolithographically patterned photoresist layer to produce a patterned metal layer; depositing a binder precursor and a slurry comprising silicalite crystals and one or more solvents on the patterned metal layer; heating the substrate wherein a porous insulating material containing silicalite crystals is formed; etching via features in the porous insulating material through a second photolithographically patterned photoresist layer; and filling the via features with metal.
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is a divisional application deriving from application Ser. No. 09/514,966 filed Feb. 29, 2000 and, now U.S. Pat. No. 6,329,062, and claims priority therefrom pursuant to 35 U.S.C. § 120 and § 121.
US Referenced Citations (1)
Number |
Name |
Date |
Kind |
6159842 |
Chang et al. |
Dec 2000 |
A |