This application claims the benefit of priority to Japanese Patent Application No. 2017-67067, filed Mar. 30, 2017, of which full contents are incorporated herein by reference.
The present disclosure relates to an electronic component module and a method of manufacturing the electronic component module.
A semiconductor package is known in which an electromagnetic shield is formed on a surface thereof so as to suppress Electro Magnetic Interference (EMI) generated from a semiconductor device. In manufacturing this type of semiconductor devices, for example, a plurality of semiconductor packages obtained by singulation from an assembly substrate is arranged and fixed at predetermined intervals on a carrier, and then a shielding film is formed by a film forming means such as sputtering.
However, it takes time and efforts to arrange and fix such singulated semiconductor packages on the carrier. In addition, since the semiconductor packages are arranged at predetermined intervals on the carrier, productivity is reduced. Furthermore, depending on film forming means, a film forming material goes around to the back surface of the semiconductor package, which causes deterioration in quality. Further, when singulation is performed by a dicing apparatus, the area of a ground electrode exposed on the side surface of a substrate is limited, which results in increase in contact resistance.
Accordingly, an aspect of the present disclosure is to provide an electronic component module capable of forming a shielding film in a state of an assembly substrate and enhancing productivity, and a method of manufacturing the electronic component module.
An electronic component module according to an embodiment of the present disclosure comprises: a substrate including a conductive pattern; an electronic component provided to the substrate; a sealing portion covering the electronic component and the substrate, the sealing portion having an upper surface and a side surface, the upper surface and the side surface forming an edge portion; a contact portion configured to be electrically connected with the conductive pattern, the contact portion exposed on a vertical surface continuous with the side surface of the sealing portion; a removal portion formed by removing the predetermined edge portion formed by the upper surface and the side surface of the sealing portion; and a shielding film covering the upper surface, the side surface and the contact portion of the sealing portion, the removal portion being a region allowing a conductive material to pass therethrough so that the contact portion is covered with the shielding film, the conductive material being scattered in a vacuum atmosphere lower than an atmospheric pressure.
Hereinafter, various embodiments of the present disclosure will be described with reference to drawings as appropriate. In the drawings, common or similar components are given the same or similar reference numerals.
A description will be given, hereinafter, using the following coordinate axes for convenience sake. That is, the positive direction of a Z-axis is set to be a vertically upward direction. The positive direction of a Y-axis is set to be orthogonal to the Z-axis as well as a direction from the front to the rear in the drawings. The X-axis is set to be a direction orthogonal to the Y-axis and Z-axis. Accordingly, the upper side and the lower side indicates the positive side and the negative side of the Z-axis, respectively, while the right side and the left side indicates the positive side and the negative side of the X-axis, respectively.
==Configuration of Electronic Component Module 1==
A configuration of an electronic component module 1 according to a first embodiment will be described with reference to
The electronic component module 1 includes, as illustrated in
The substrate 10 is made of an insulating material, such as resin, alumina, glass, ceramics, a composite material, and includes a conductive pattern 11 (for example, ground wiring, Vcc, etc.) inside thereof. A part of the conductive pattern 11 is configured to be connected with a GND, for example.
The substrate 10 includes a via 53 configured to electrically connect GND wiring patterns formed in different layers to each other. Here, the via 53 may be a through hole provided in an upper layer or a lower layer of an electrode, or such vias 53 may be a via and a through hole. Hereinafter, it is assumed that the vias 53 includes a through hole.
Further, the substrate 10 includes an electrode 52. The electrode 52 may be formed inside (in an inner layer of) the substrate 10, or may be formed on a surface (for example, upper surface) of the substrate 10. It should be noted that the electrode 52 may be ground wiring. Further, the substrate 10 includes, for example, a terminal 51 for connecting the GND, for example, on the lower surface side of the electronic component module 1. Note that a semiconductor material such as Si may be used for the substrate. This is a so-called silicon interposer. A Si substrate has substantially the same coefficient of thermal expansion as an IC to be mounted, and thus has been frequently used recently. A semiconductor device including PN junction may be incorporated in the Si substrate. At least one layer of a conductive pattern is formed on this Si substrate, and such at least one layer thereof is subjected to an insulating process using an inorganic insulation film provided on a lower layer. For example, SiO2, SiNx, or the like is used. For example, the substrate 10 in
The electronic component 20 is provided, for example, on the upper surface side of the substrate 10. Here, as illustrated in
The sealing portion 30 is a protective member that covers the electronic component 20 and the substrate 10. The sealing portion is formed using thermosetting resin for molding, such as epoxy resin and cyanate resin. The sealing portion 30 includes an upper surface 31, a side surface 32 extending downward from an edge portion of the upper surface 31. Thus, a connecting portion between the upper surface 31 and the side surface 32 forms an edge portion 33.
The contact portion 40 is a portion having a vertical surface formed with the electrode 52 that is exposed by dicing. Further, the contact portion 40 is configured to be electrically connected to the terminal 51 and the conductive pattern 11. The contact portion 40 is configured to be electrically connected to the GND, for example, through the terminal 51 and/or the conductive pattern 11, via the electrode 52.
The removal portion 50 is formed by removing the edge portion 33 formed by the upper surface 31 and the side surface 32 of the sealing portion 30 (also defined as a connection portion between the upper surface 31 and the side surface 32, or an edge portion of the upper surface 31). The removal portion 50 is a region (space) where a conductive material scattered in a vacuum atmosphere having a pressure lower than atmospheric pressure is allowed to pass therethrough, such that the contact portion 40 is covered with the shielding film 60. In the present embodiment, the edge portion 33 is a virtual area indicated by dotted lines illustrated in
The removal portion 50 has a shape of a groove, for example, however, it is not limited thereto. The removal portion 50 may be a slope inclined outward as illustrated in
Since the removal portion 50 is formed as such, scattered particles of a conductive material can be allowed to pass through a space (region) of the removal portion 50 in a process of forming the shielding film 60. That is, the removal portion 50 is provided to ensure a space capacity, so that a film is formed thicker on a side surface of a first groove 71 as in
Further, it is preferable that the removal portion 50 is formed vertically above the electronic component 20. That is, when viewed from the upper surface side, the removal portion 50 is arranged so as to overlaps all or a part of an electronic component 20. With such an arrangement, it is possible to reduce the size and cost of the electronic component module 1.
Thus, even in a case where a space between packages on an assembly substrate 15 (i.e., a width of the first groove 71) is narrow, a sufficient film thickness of the shielding film 60 can be formed on a side surface of such a package. Accordingly, productivity with respect to the electronic component module 1 can be enhanced. It should be noted that, in sputtering or the like, scattering is caused due to Ar, and thus the removal portion 50 may be provided on the side where the contact portion 40 is provided as in
Vapor deposition, sputtering or CVD is used as the film forming method of forming the shielding film 60. The shielding film 60 is a conductive film that covers the upper surface 31 and the side surface 32 of the sealing portion 30 and the contact portion 40. The shielding film 60 is configured to be electrically connected to the contact portion 40, and suppress an electromagnetic wave generated inside the electronic component module 1 from leaking to the outside. Further, noise from the outside does not enter into the module, either.
The shielding film 60 is made of a conductive metal material, such as Cu, Ni, Ti, Au, Ag, Pd, Pt, Fe, Cr, or SUS (stainless steel). Further, the shielding film 60 may be an alloy using some multiple materials of the aforementioned metal materials, or a laminated film using some multiple materials of the aforementioned metal materials. Furthermore, the shielding film 60 may be an alloy using any one of the aforementioned metal materials as a main material. In general, a SUS film is formed on (outside) a film formed using Cu as a main material.
The above description has been made such that the electronic component 20 is provided on the upper surface side of the substrate 10, however, it is not limited thereto. For example, as illustrated in
==Method of Manufacturing Electronic Component Module 1==
A method of manufacturing the electronic component module 1 including such a configuration will be described with reference to
First, the assembly substrate 15 (second insulating substrate) is prepared as in
Next, as illustrated in
After the first groove 71 is formed, the second groove 72 (removal portion 50) is formed, as illustrated in
Then, as illustrated in
Finally, as illustrated in
An electronic component module 2 according to a second embodiment will be described with reference to
The electronic component module 2 according to the second embodiment includes the substrate 210, an electronic component 220, a sealing portion 230, a contact portion 240, a removal portion 250 and a shielding film 260, similarly to the first embodiment. However, the electronic component module 2 according to the second embodiment is different from the electronic component module 2 according to the first embodiment in that the contact portion 240 is formed including the via 253, a through hole, or the solid ground 254 (the solid ground indicates here that, for example, all, substantially all, or a half of a surface of a layer in a printed-circuit board is convered with GND metal. This can strengthen and solidify ground (GND)). Thus, in the following description, the contact portion 240 will be described.
The contact portion 240 includes a vertical surface formed with the electrode 252 and/or the via 253 exposed by dicing. Further, the contact portion 240 is electrically connected with a terminal 251 and/or a conductive pattern 211. The contact portion 240 may include at least one of the electrode 252, the via 253, or a through hole. That is, as illustrated in
A plurality of the vias 253 is provided. In
In both cases of
Further, as illustrated in
An electronic component module 3 according to a third embodiment will be described with reference to
The electronic component module 3 according to the third embodiment includes a substrate 310, an electronic component 320, a sealing portion 330, a contact portion 340, a removal portion 350 and a shielding film 360, similarly to the first and second embodiments. However, the electronic component module 3 according to the third embodiment is different from the electronic component modules 1 and 2 according to the first and second embodiments in that the contact portion 340 includes a vertical surface and a horizontal surface that are formed with an electrode 352 and a via 353 exposed by dicing. Thus, in the following description, the contact portion 340 will be described.
The contact portion 340 is a portion having a vertical surface and a horizontal surface that are formed with the electrode 352 and the via 353 exposed by half-cut dicing the substrate 310. Further, the contact portion 340 may include at least one of the electrode 352, the via 353, or a through hole. Further, the contact portion 340 may include a solid ground (not illustrated).
The electrode 352, the via 353, a through hole, and/or a solid ground is exposed, by dicing, on the sealing portion 330. In this state, the contact portion 340 includes a vertical surface 341 (surface parallel to YZ plane) of the substrate 310 continuous with a side surface 332 of the sealing portion 330, and a horizontal surface 342 (surface parallel to XY plane) of the substrate 310 continuous with this vertical surface 341. A curved surface 343 lies between the vertical surface 341 and the horizontal surface 342. The curvature of a curve in the curved surface 343 varies with the degree of sharpness (wear-out) of a blade of the cutting apparatus that was used. However, it is desirable to satisfy the relationships of film thicknesses of the shielding film 360 which will be described later.
As can be applied in all the following embodiments, a portion corresponding to the horizontal surface 342 of the contact portion 340 may be a burr produced in the bottom surface when dicing. In
The above-described film forming method has such features that, for example, on the basis of the result of film formation by sputtering, a thick film is formed on the horizontal surface 342, while a thinner film is formed on the vertical surface 341 as compared with on the horizontal surface 342. Further, on the vertical surface 341, a film is formed thinner toward the −Z-direction. In view of such features of the film forming method, by exposing the electrode 352 or the like on the horizontal surface 342 of the contact portion 340, the shielding film 360 can be formed to be relatively thick thereon. Further, the shielding film 360 is formed to be thicker also on a curved portion 343 than on the vertical surface 341 (further, thinner than on the horizontal surface 342). This can reduce contact resistance between the contact portion 340 and the shielding film 360, thereby enhancing effects of suppressing EMI by virtue of the shielding film 360.
Here, it is preferable that thicknesses of the shielding film 360 in various parts are in the following relationship. That is, a relationship of t13>t33 and further a relationship of t23>t33 or t43>t33 are satisfied, where t13 is a film thickness of the shielding film 360 on the upper surface 331 of the sealing portion 330, t23 is a film thickness of the shielding film 360 on the horizontal surface 342 of the contact portion 340, t33 is a film thickness of the shielding film 360 on the side surface 332 of the sealing portion 330, and t43 is a film thickness of the shielding film 360 on the curved surface 343 of the contact portion 340. This is because, particularly, the scattered particles by vapor deposition, sputtering, or the like under low vacuum have the characteristics of traveling in straight lines. Thus, with the curved portion and horizontal portion, it is possible to ensure the thickness of the shielding film, reduce contact resistance, and further enhance adhesion.
An electronic component module 4 according to a fourth embodiment will be described with reference to
The electronic component module 4 according to the fourth embodiment includes a substrate 410, an electronic component 420, a sealing portion 430, a contact portion 440, the removal portion 450, and the shielding film 460, similarly to the first to third embodiments, and further includes the removal portion 451. The removal portion 451 is formed at an edge 434 on the side opposite to the removal portion 450, as illustrated in
The removal portion 451 is formed, for example, on a side surface opposed to a vertical surface where the contact portion 440 is formed. That is, when describing with reference to
It is preferable that the removal portion 451 is formed, as illustrated in
It is preferable that at least one of the removal portions 450, 451 is formed vertically above the electronic component 420 (see
Further, in order for at least a part of the removal portions 450, 451 to reduce the size and cost of the electronic component module 4, it is considered that the electronic component 420 having a low height (a length in the Z-axis direction) is disposed in the vicinity of the outer periphery (side surface 432) of the electronic component module 4. Further, this can be achieved without using extra space, if a chip resistor and/or a chip capacitor having a height lower than the electronic component 420 is disposed in the vicinity of the periphery of a substrate and at least a part of an upper surface thereof results in the removal portion 451 constituted by the second groove 473.
According to an embodiment of the present disclosure, it becomes possible to form the shielding film 60 (260, 360, 460) in a state of an assembly substrate. Thus, rearrangement and tape fixing of semiconductor packages, in a case where film formation is performed after singulation, is unnecessary. Further, it is possible to reduce manufacturing cost since productivity is enhanced. Further, there is no wraparound of a film forming material to the back side of the substrate 10 (210, 310, 410), as in the case where film formation is performed after singulation, thereby improving quality and yields. In specific, singulation is performed by cutting at a portion indicated by a sign FC, after attachment of the shielding film. Thus, as illustrated in
Further, it is preferable that the removal portion 50 (250, 350, 450, 451) is formed above the electronic component 20 (220, 320, 420). With such an arrangement being employed, it is possible to reduce the size and cost of the electronic component module 1, 2, 3, 4.
Further, the contact portion 340, 440 is configured to be electrically connected with the conductive pattern 311, 411, and the contact portion 340, 440 has the vertical surface 341, 441 continuous with the side surface 332, 432 of the sealing portion 330, 430, and the horizontal surface 342, 442 continuous with the vertical surface 341, 441. With provision of the horizontal surface 342, 442, it is possible to reduce contact resistance between the contact portion 340, 440 and the shielding film 360, 460.
Further, the contact portion 240, 340, 440 is configured to be electrically connected with the conductive pattern 211, 311, 411, and includes at least one of the electrode 252, 352, 452 provided to a surface layer or an inner layer of the substrate 210, 310, 410; the via 253, 353, 453 provided so as to connect between the electrode 252, 352, 452 and a layer thereabove or a layer therebelow, or between the layers; or a through hole provided to an upper layer or a lower layer with respect to the electrode 52, 252, 352, 452. According to such an embodiment, the contact area between the contact portion 240, 340, 440 and the shielding film 260, 360, 460 is increased, and thus contact resistance can be reduced.
Further, it is preferable that the electrode 252, 352, 452 of the contact portion 240, 340, 440 includes the solid ground 254. According to such an embodiment, the contact area between the contact portion 40 (140, 240, 340, 440, 540) and the shielding film 60 (160, 260, 360, 460, 560) is increased, and thus contact resistance can be lowered.
The plurality of vias 253, 353, 453 or through holes is provided at random or provided in a row, in a portion corresponding to the side surface 232, 332, 432 of the sealing portion 230, 330, 430. According to such an embodiment, it is easy to form the contact portion 240, 340, 440 to have the vias 253, 353, 453 or through holes when dicing is performed.
Further, it is preferable that the contact portion 340, 440 includes the curved surface 343, 443 between the vertical surface 341, 441 and the horizontal surface 342, 442. In such an embodiment, it is possible to secure a sufficient film thickness of the shielding film 360, 460. Thus, it is possible to reduce resistance of the shielding film 360, 460, as well as suppress the shielding film 360, 460 from peeling from the electronic component module 3, 4, which leads to enhancement of quality of the electronic component module 3, 4.
Further, it is preferable that t13>t33, t14>t34, and t23>t33, t24>t34 or t43>t33, t44>t34, where t13, t14 is a film thickness of the shielding film 360, 460 in the upper surface 331, 431 of the sealing portion 330, 430; t23, t24 is a film thickness of the shielding film 360, 460 in the horizontal surface 342, 442 of the contact portion 340, 440; t33, t34 is a film thickness of the shielding film 360, 460 in the side surface 332, 432 of the sealing portion 330, 430; and t43, t44 is a film thickness of the shielding film 360, 460 in the curved surface 343, 443 of the contact portion 340, 440. According to such an embodiment, it is easy to form the shielding film 360, 460 having a sufficient film thickness using a vacuum film forming technique such as vapor deposition, sputtering, or CVD. This leads to enhancement of productivity and quality of the electronic component module 3, 4.
The second groove 72 (272, 372, 472, 473) is formed such that a length of the side surface 32 (232, 332, 432) from the bottom surface of the first groove 71 (271, 371, 471) to the bottom surface of the second groove 72 (272, 372, 472, 473) is twice or smaller with respect to a width of the first groove 71 (271, 371, 471). According to such an embodiment, it is easy to form the shielding film 60 (260, 360, 460) having a sufficient film thickness using the vacuum film forming technique, such as vapor deposition, sputtering, or CVD.
Although embodiments of the present disclosure have been described above, the present disclosure is not limited thereto. The foregoing materials, shapes, and arrangements of components are merely embodiments for implementing the present disclosure, and can be variously changed without departing from the gist the disclosure.
Number | Date | Country | Kind |
---|---|---|---|
2017-067067 | Mar 2017 | JP | national |
Number | Name | Date | Kind |
---|---|---|---|
5517515 | Spall | May 1996 | A |
6285079 | Kunikiyo | Sep 2001 | B1 |
20040238934 | Warner et al. | Dec 2004 | A1 |
20050280139 | Zhao et al. | Dec 2005 | A1 |
20060249824 | Lee et al. | Nov 2006 | A1 |
20080111225 | Kim et al. | May 2008 | A1 |
20090212401 | Do et al. | Aug 2009 | A1 |
20090302439 | Pagaila et al. | Dec 2009 | A1 |
20110304015 | Kim et al. | Dec 2011 | A1 |
20120015687 | Yamada et al. | Jan 2012 | A1 |
20130194756 | Aso et al. | Aug 2013 | A1 |
20150016066 | Shimamura et al. | Jan 2015 | A1 |
20150171019 | Otsubo et al. | Jun 2015 | A1 |
20150171060 | Goto et al. | Jun 2015 | A1 |
20160149300 | Ito et al. | May 2016 | A1 |
20170098637 | Hamada | Apr 2017 | A1 |
20170323838 | Otsubo et al. | Nov 2017 | A1 |
20180199428 | Otsubo et al. | Jul 2018 | A1 |
20180286816 | Kitazaki et al. | Oct 2018 | A1 |
Number | Date | Country |
---|---|---|
2009-218484 | Sep 2009 | JP |
2010-212410 | Sep 2010 | JP |
2013-58513 | Mar 2013 | JP |
2013-161831 | Aug 2013 | JP |
2014-146624 | Aug 2014 | JP |
2015-115552 | Jun 2015 | JP |
2015-115560 | Jun 2015 | JP |
2015-233164 | Dec 2015 | JP |
2010103756 | Sep 2010 | WO |
2015015863 | Feb 2015 | WO |
2015194435 | Dec 2015 | WO |
2016121491 | Aug 2016 | WO |
WO-2016121491 | Aug 2016 | WO |
2017043621 | Mar 2017 | WO |
Entry |
---|
Japanese Office Action dated Sep. 11, 2018, in a counterpart Japanese patent application No. 2017-067067. (A machine translation (not reviewed for accuracy) attached.). |
Japanese Office Action dated Sep. 4, 2018, in a counterpart Japanese patent application No. 2017-067050. (Cited in the related U.S. Appl. No. 15/934,829. A machine translation (not reviewed for accuracy) attached.). |
U.S. Appl. No. 15/934,829, filed Mar. 23, 2018. |
Japanese Office Action dated Oct. 15, 2019, in a counterpart Japanese patent application No. 2017-067067. (A machine translation (not reviewed for accuracy) attached.). |
Number | Date | Country | |
---|---|---|---|
20180286796 A1 | Oct 2018 | US |