The present disclosure relates to the packaging of micro devices.
In manufacturing micro devices, multiple micro devices are commonly fabricated on a semiconductor wafer. The micro devices are subsequently packaged and separated into individual dies. Many types of micro devices must be in a hermetically sealed environment to prevent damage to the micro devices and ensure a long useful life of the device. It is therefore desirable to have an efficient process for providing hermetic sealing of the multiple micro devices on the semiconductor wafer.
In one general aspect, the present invention relates to a method for packaging a micro device, the method including encapsulating a micro device in a chamber on a substrate, wherein the chamber is defined by spacer walls and an encapsulation cover; removing a portion of the encapsulation cover and portions of the spacer walls to expose one or more surfaces of the spacer walls; and forming a layer of a sealing material on the exposed surfaces of the spacer walls to hermetically seal the micro device in the chamber.
In another general aspect, the present invention relates to a method for packaging micro devices, the method including encapsulating a plurality of micro devices on a substrate in chambers that are defined by spacer walls and an encapsulation cover; removing portions of the encapsulation cover and portions of the spacer walls to expose surfaces of the spacer walls; and forming a layer of a sealing material on the exposed surfaces of the spacer walls to hermetically seal the micro devices in the chambers.
In another general aspect, the present invention relates to an encapsulated micro device on a substrate. A micro device is on a substrate within a chamber, an encapsulation cover in part defining the chamber. One or more spacer walls are between the substrate and the encapsulation cover, wherein at least one of the spacer walls has an inner surface adjacent to the micro device and an outer surface opposite to the inner surface, and the outer surface is sloped relative to the substrate. A sealing material is on the outer surface of the spacer walls, hermetically sealing the chamber.
Implementations of the system and methods described herein may include one or more of the following features. The one or more exposed surfaces of the spacer walls can include a surface that is sloped relative to the substrate. The step of forming the encapsulated device can include anisotropically depositing the sealing material on a surface that is sloped relative to the substrate. The step of removing portions of the cover or walls can include cutting the encapsulation cover and the portions of the spacer walls. The spacer walls can include a low out-gassing material, epoxy or spacer particles. At least a portion of the encapsulation cover can be transparent to visible, UV, or IR light. The encapsulation cover can include an opaque aperture layer having an opening over the micro device. The method of forming the device can include forming a layer of sacrificial material on the encapsulation cover before the step of removing and removing the layer of sacrificial material and the sealing material on the sacrificial material. Forming the layer of the sealing material may include forming the layer of sealing material on the sacrificial material and the exposed surfaces of the spacer walls to hermetically seal the micro device in the chamber. The method can include cutting a portion of the substrate and separating the chamber encapsulating the micro device from an adjacent chamber encapsulating an adjacent micro device on the substrate. The method can include removing a portion of the spacer wall and a portion of the encapsulation cover to expose electric contacts on the substrate, where the electric contacts are configured to send electric signals to or receive electric signals from the micro device. The step of removing can comprise dissolving a portion of the spacer wall or an adhesive bonding the spacer wall and the substrate.
Various implementations of the methods and devices described herein may include one or more of the following advantages. The disclosed system and methods may provide an effective approach for hermetically sealing a micro device on a substrate. The sealing material can be anisotropically deposited on sloped surfaces on a chamber that encapsulates the micro device, and may hermetically seal the device within the chamber. Another potential advantage of the disclosed system and methods is that a plurality of micro devices can be simultaneously hermetically sealed in one or more chambers at high throughput.
Although the invention has been particularly shown and described with reference to multiple embodiments, it will be understood by persons skilled in the relevant art that various changes in form and details can be made therein without departing from the spirit and scope of the invention.
The following drawings, which are incorporated in and form a part of the specification, illustrate embodiments of the present invention and, together with the description, serve to explain the principles, devices and methods described herein.
Referring to
An opaque aperture layer 130 can be formed on the lower surface of an encapsulation cover 120. The encapsulation cover 120 can be made of a material that is transparent to visible, UV, or IR light. The encapsulation cover 120 can thus allow optical communications with the micro devices 103-106 after they are encapsulated. Furthermore, the encapsulation cover 120 is impermeable to fluid and gas. The aperture layer 130 can be made of a material capable of blocking light, such as a metallic material, e.g., chromium or light absorbing material, such as chromium oxide.
The aperture layer 130 can include openings 135 to define transparent windows formed over the micro devices 103-106. Spacer walls 113, 114a, 114b, 115, 116a, and 116b are formed on the aperture layer 130. The spacer walls can be made of an inorganic material, such as glass, metal, silicon, ceramic or other suitable material. In some embodiments, an opaque aperture layer 130 can be formed on the upper surface of the encapsulation cover 120 such that the aperture layer 130 will be positioned at the exterior of the encapsulation chambers that encapsulate the micro devices 103-106.
Referring to
A layer of sacrificial material 137, such as a photo resist, is next formed on the encapsulation cover 120 (
Portions of the encapsulation cover 120 and portions of the spacer walls 115a, 1115b, 116a and 116b are removed to produce encapsulation chambers 125, 125a, and 125b separated by spaces 138 (
A layer of a sealing material 140 on the sloped surfaces 136 is next formed on the spacer walls 115a, 115b, 116a and 116b and the sacrificial material 137 that is on the encapsulation cover 120 (
One advantageous feature of the sloped surfaces 136 is that they can receive anisotropic material depositions from a material source positioned above the substrate 110. The sealing material 140 can be anisotropically deposited by physical vapor deposition (PVD) using a material target source located above the substrate 110. The lateral extensions of the sloped surfaces 136 allow the sloped surfaces 136 to receive the sealing material 140. The rate of deposition on the sloped surface 136 is reduced by a factor of cosine of the angle between a sloped surface 136 and the upper surface of the substrate 110 in comparison with a non-sloped surface on the substrate 110 and the non-sloped upper surfaces of the sacrificial material 137 on the encapsulation cover 120. Thus, the layer of the sealing material 140 is thicker on the non-sloped surfaces than on the sloped surfaces 136. The duration of deposition can be controlled to ensure a continuous layer of sealing material 140 with a desired thickness is formed on all the sloped surfaces 136.
The sacrificial material 137 and the sealing material 140 on the sacrificial material 137 is removed from the non-sloped top surface of the encapsulation cover 120 (
The substrate 110 is next cut through from the lower surface in the spaces 138 between adjacent encapsulation chambers, e.g., chambers 125 and 125a, that contain micro devices. The substrate 110 is also cut through from the lower surface in areas below the chambers in which the electrical contacts are located, e.g., chamber 146. For example, the cut can be in a spot between electric contacts 151 and 152 and away from the electric circuits in the substrate 110 (
Because the encapsulation cover 120 is impermeable to fluid and gas, one or more hermetically sealed encapsulation chambers 125, 125a, and 125b are formed on the substrate 110 using the steps described herein. Each hermetically sealed encapsulation chamber 125 encapsulates one or more micro devices 105. In some embodiments, the encapsulation chambers 125, 125a, and 125b are evacuated prior to the encapsulation of the micro devices 105. The hermetic sealing of the encapsulation chambers 125, 125a, and 125b maintains a stable environment in the encapsulation chambers 125, 125a, and 125b, which can help keep the micro device 105 operating properly. In devices where the encapsulation chamber is under vacuum, the hermetic sealing of the encapsulation chamber maintains the vacuum state. In some embodiments, the environment is not a vacuum environment, but is a gas that has been selected for the device to operate in.
Other embodiments are illustrated in
In some embodiments, referring to
The encapsulation cover 120 is unitarily connected to or sealed to the upper surfaces of the spacer walls 115, 116. The spacer walls 115, 116 can be made of a polymer material, such as epoxy, that is permeable to air and moisture. In some embodiments, the spacer walls 115, 116 include a low out-gassing material that does not release a significant amount of gas. Examples of the low out-gassing material include glass, metallic and ceramic materials. The low out-gassing material in the spacer walls 115, 116 prevents gases from escaping the walls 115, 116 and entering the encapsulation chamber 125. Such gases can interfere with the functioning of the device 105, such as by forming a coating on surfaces of the device or attacking the device 105. The spacer walls 115, 116 can also optionally include spacer particles 117 which can reduce the volume of low out-gassing material needed in the spacer walls 115, 116, and define the distance between the encapsulation cover 120 and the substrate 110.
The encapsulation cover 120 can be made of a material, such as glass, that is transparent to visible, UV, or IR light. Furthermore, the encapsulation cover 120 is impermeable to fluid. In some embodiments, an opaque aperture layer 130 is formed on the encapsulation cover 120. The aperture layer 130 can be formed on either the exterior of the encapsulation cover 120 or on a side of the encapsulation cover 120 adjacent to the device 105. The opaque aperture layer 130 includes an opening 135 over the micro device 105 to allow for optical communications with the micro device 105. That is, the micro device 105 can receive, transmit or both receive and transmit light through the opening 135. The opaque aperture layer 130 can be made of a material capable of blocking light, such as a metallic material, e.g., chromium.
A plurality of micro devices 105 can be formed on the substrate 110. The micro devices 105 can be encapsulated in encapsulation chambers 125, 125a, and 125b, and are separated by the spacer walls 115, 116. In some embodiments, each encapsulation chamber 125, 125a, or 125b holds more than one micro device 105. The aperture layer 130 on the encapsulation cover 120 includes openings over each of the micro devices 105.
A layer of sacrificial material 137 is formed on the encapsulation cover 120 (
Portions of the encapsulation cover 120 and portions of the spacer walls 115, 116 are subsequently removed to produce encapsulation chambers separated by spaces 138 (
A sealing material 140 is next applied to the sloped surfaces 136 on the spacer walls 115a, 115b, 116a and 116b and the sacrificial material 137 on the encapsulation cover 120 (
One advantageous feature of the sloped surfaces 136 is that they can receive anisotropic material depositions from a material source above the substrate 110. The sealing material 140 can be anisotropically deposited by physical vapor deposition (PVD) using a material target source located above the substrate 110. The lateral extensions of the sloped surfaces 136 allow the sealing material 140 to be received by the sloped surfaces 136. The rate of deposition for the sloped surface 136 is reduced by a factor of cosine function of the angle between a sloped surface 136 and the upper surface of the substrate 110 in comparison with a non-sloped surface on the substrate 110 and the non-sloped upper surfaces of the sacrificial material 137 on the encapsulation cover 120. Thus, the layer of the sealing material 140 is thicker on the non-sloped surfaces than on the sloped surfaces 136. The duration of the deposition can be controlled to ensure a continuous layer of sealing material 140 is formed on all the sloped surfaces 136.
Because the encapsulation cover 120 is impermeable to fluid, one or more hermetically sealed encapsulation chambers 125, 125a, and 125b are formed on the substrate 110 using the steps described herein. Each hermetically sealed encapsulation chamber 125 encapsulates one or more micro devices 105. In some embodiments, the encapsulation chambers 125, 125a, and 125b are evacuated prior to the encapsulation of the micro devices 105. The hermetic sealing of the encapsulation chambers 125, 125a, and 125b maintains a stable environment in the encapsulation chambers 125, 125a, and 125b, which can help keep the micro device 105 operating properly. In situations where the encapsulation chamber is under vacuum, the hermetic sealing of the encapsulation chamber maintains the vacuum environment for the micro device. In some embodiments, the environment is not a vacuum environment, but is a gas that has been selected for the device to operate in.
Once the individual encapsulation chambers are formed, optionally, the lower surface of the substrate 110 in the areas of the substrate 110 between the encapsulation chambers 125, 125a, and 125 can be cut to separate the encapsulation chambers into individual dies (step 670). The cutting location can be selected between the electric contacts 126 on the lower surface of the substrate 110 and away from the electric circuit 127 in the substrate 110. The substrate 110 can be scored and manually broken, diced, sawed or otherwise cut to separate the dies from one another. In some embodiment, the cuts that form sloped surface 136 and spaces 138 also score the substrate 110 for separation.
It is understood that the disclosed systems and methods are compatible with techniques for the application of a sealing material to spacer walls having a sloped side. The sealing material and the materials for the spacer walls can be selected from a wide range of low permeability materials. The disclosed system and methods are also compatible with different configurations and material selections of the encapsulation cover and the spacer walls without deviating from the spirit of the present specification. An anti-reflective coating may be formed on both surfaces of the encapsulation cover. The micro devices compatible with the disclosed system and methods can include MEMS, integrated circuits, spatial light modulators such as an array of tiltable micro mirrors, micro sensors, micro actuators, and light emitting elements. Furthermore, the substrate can include electric circuits necessary for providing the electrical signals to control the micro devices. In particular, the substrate can include a complimentary-metal-oxide semiconductor (CMOS) devices. Although encapsulation at the die level has been described, the encapsulation process described herein can also be applied at the wafer level for sealing or packaging.