Patent Application
20100327433
The present disclosure generally relates to integrated circuits (ICs). More specifically, the present disclosure relates to packaging integrated circuits.
Integrated circuits (ICs) are fabricated on wafers. Commonly, these wafers are semiconductor materials, for example, silicon. Through efforts of research and development, the size of the transistors making up the integrated circuits has decreased to 45 nm and soon will decrease further to 32 nm. As the transistors reduce in size, the voltage supplied to the transistors decreases. These voltages are smaller than the wall voltages available in most countries.
An integrated circuit is commonly coupled to a voltage regulator that converts available wall voltages to the lower voltages used by the integrated circuit. The voltage regulator ensures a predictable power supply is provided to the integrated circuit. This is an important function, because the ability of transistors to tolerate voltages under or over the target voltage is small. Only tenths of a volt lower may create erratic results in the integrated circuits; only tenths of a volt higher may damage the integrated circuits. As transistors of the integrated circuit turn on and off, the power load changes rapidly placing additional demand on the voltage regulator. The distance between the voltage regulator and the integrated circuit creates a long response time, preventing the voltage regulator from increasing power to the integrated circuit instantaneously, especially when the transistors switch on and off millions or billions of times each second. Decoupling capacitors provide additional stability to the power supplied to the integrated circuits.
Decoupling capacitors attached in close proximity to the integrated circuit provide instantaneous current to the integrated circuit. As demand on the power supply changes rapidly, the capacitor provides additional power and can refill at a later time when the power demand decreases. The decoupling capacitor allows integrated circuits to operate at the high frequencies and computational speeds desired by consumers. However, as the transistor sizes have decreased and transistor densities increased, finding area on the integrated circuit for decoupling capacitors has become difficult.
One configuration of decoupling the integrated circuit places decoupling capacitors directly on the die. This configuration occupies die area that could otherwise be used for active circuitry. Additionally, fabricating decoupling capacitors on the die involves additional manufacturing time that increases the cost of manufacturing.
As one example, a conventional decoupling capacitor used in integrated circuits is a thin film capacitor. Thin film capacitors may be fabricated on the substrate at an additional cost during manufacturing. These capacitors are typically alternating layers of a dielectric followed by a conductor.
Although the thin film capacitor is a simple structure, the capacitance is determined largely by the number of series capacitances in parallel. As more capacitance is added, the structure increases in height, which juxtaposes the shrinking size of the integrated circuits.
Metal-insulator-metal (MIM) capacitors may be manufactured to fit in smaller height constraints than thin film capacitors. When packaging the capacitors, height may be an important consideration. Furthermore, MIM capacitors offer additional flexibility over thin film capacitors in designing the equivalent series inductance (ESL) and equivalent series resistance (ESR) in a power distribution system.
As packages shrink in size to fit the smaller form factors present in mobile devices, space available on the package decreases. Additionally, as the circuits operate at higher frequencies, higher capacitances are required to ensure proper operation of the circuitry and transistors.
Thus, there is a need to provide instantaneous current to integrated circuits in a smaller package.
According to one aspect of the disclosure, an integrated circuit package includes a decoupling capacitor at least partially embedded in a package substrate. The decoupling capacitor is adapted to be coupled to a die mounted to the packaging substrate.
According to another aspect of the disclosure, an integrated circuit package includes a packaging substrate. The integrated circuit package also includes a circuit mounted on the packaging substrate. The integrated circuit package further includes means for providing instantaneous current to the circuit. The means for providing being at least partially embedded in the packaging substrate.
According to a further aspect of the disclosure, a method of manufacturing an integrated circuit package includes at least partially embedding a capacitor in a package substrate. The method also includes coupling the capacitor to a structure coupled to a die mounted to the package substrate.
The foregoing has outlined rather broadly the features and technical advantages of the present disclosure in order that the detailed description that follows may be better understood. Additional features and advantages will be described hereinafter which form the subject of the claims of the disclosure. It should be appreciated by those skilled in the art that the conception and specific embodiments disclosed may be readily utilized as a basis for modifying or designing other structures for carrying out the same purposes of the present disclosure. It should also be realized by those skilled in the art that such equivalent constructions do not depart from the technology of the disclosure as set forth in the appended claims. The novel features which are believed to be characteristic of the disclosure, both as to its organization and method of operation, together with further objects and advantages will be better understood from the following description when considered in connection with the accompanying figures. It is to be expressly understood, however, that each of the figures is provided for the purpose of illustration and description only and is not intended as a definition of the limits of the present disclosure.
For a more complete understanding of the present disclosure, reference is now made to the following description taken in conjunction with the accompanying drawings.
In
Data recorded on the storage medium 204 may specify logic circuit configurations, pattern data for photolithography masks, or mask pattern data for serial write tools such as electron beam lithography. The data may further include logic verification data such as timing diagrams or net circuits associated with logic simulations. Providing data on the storage medium 204 facilitates the design of the circuit design 210 by decreasing the number of processes for designing semiconductor ICs.
The capacitor 330 consumes additional space on the packaging substrate 310 that could be used for additional dies that would create devices with additional functionality. Moreover, as will be shown below, the capacitor 330 consumes space that makes stacked dies difficult to produced on the packaging substrate 310.
If the capacitor 330 is removed from the packaging substrate 310 the size of the packaging substrate 310 could be reduced. The resulting form factor of such a packaged integrated circuit could fit in a smaller device. Additionally, reducing the size of the packaging substrate 310 reduces materials cost. One solution to remove the capacitor 330 from the surface of the packaging substrate 310 is to embed the capacitor 330 in the packaging substrate 310.
Embedding capacitors in the packaging substrate places capacitors close to the circuitry using instantaneous current and reduces height problems.
Referring now to
The packaging substrate 601 also includes an embedded capacitor 610. The capacitor 610 is embedded in the packaging substrate 601 and may be, according to one embodiment, a trench metal-insulator-metal (MIM) capacitor. A metal-insulator-metal capacitor includes an insulator layer coupled on one side with a first metal layer and on a second side with a second metal layer. Trench MIM capacitors offer higher capacitances than other capacitors because the total surface area, to which capacitance is proportional, includes not only the surface area covered by the capacitor but also the surface area of the sidewalls of the trenches. Interconnects 612 couple the capacitor 610 to circuitry (not shown) in the die 630 through the ball grid array 620 and the contact 608 to provide substantially instantaneous current when needed.
Turning now to
Decoupling capacitors are located near dies to provide substantially instantaneous current that compensates for inductance of interconnects and traces that couple circuitry to a voltage regulator. In an equivalent circuit, lines and traces may be represented by inductors and decoupling capacitors as capacitors. An equivalent circuit structure for an integrated circuit package having an embedded capacitor coupled to a circuit board is shown in
Embedding decoupling capacitors in a packing substrate reduces parasitic inductances resulting from large distances between the decoupling capacitors and circuits for which they are providing instantaneous current. Additionally, trench MIM capacitors provide higher density capacitance than thin film capacitors built on the substrate. Furthermore, removing capacitors from the surface of the packaging substrate and embedding the capacitors in the packaging substrate reduces the form factor of the package.
Although specific circuitry has been set forth, it will be appreciated by those skilled in the art that not all of the disclosed circuitry is required to practice the disclosure. Moreover, certain well known circuits have not been described, to maintain focus on the disclosure.
Although the present disclosure and its advantages have been described in detail, it should be understood that various changes, substitutions and alterations can be made herein without departing from the technology of the disclosure as defined by the appended claims. Moreover, the scope of the present application is not intended to be limited to the particular embodiments of the process, machine, manufacture, composition of matter, means, methods and steps described in the specification. As one of ordinary skill in the art will readily appreciate from the disclosure, processes, machines, manufacture, compositions of matter, means, methods, or steps, presently existing or later to be developed that perform substantially the same function or achieve substantially the same result as the corresponding embodiments described herein may be utilized according to the present disclosure. Accordingly, the appended claims are intended to include within their scope such processes, machines, manufacture, compositions of matter, means, methods, or steps.
