Patent Application
20240380320
The present disclosure relates to power converter modules, and specifically to high-frequency power converter modules utilizing silicon carbide (SIC) components.
Power converter modules (which, as referred to herein may also include power inverter modules) are standalone devices that may perform a variety of functions within a power converter system. For example, power converter modules may include boost converters, buck converters, half-bridge converters, and full-bridge converters. Conventional power converter modules generally include power converter circuitry utilizing silicon (Si) switching components. While effective in many applications, using power converter circuitry with silicon (Si) switching components generally limits the switching frequency at which the power converter circuitry can operate. The lower the switching frequency of the components in the power converter circuitry, the larger the filtering components such as inductors and capacitors utilized in a power converter system need to be. Accordingly, filtering components used along with power converter circuitry using silicon (Si) switching components must be quite large, thereby driving up the cost of the power converter system. Further, at high switching frequency, silicon (Si) switching components are often associated with relatively low efficiency and low power density.
The present disclosure relates to power converter modules, and specifically to high-frequency power converter modules utilizing silicon carbide (SiC) components. In one embodiment, a power converter module includes an active metal braze (AMB) substrate, power converter circuitry, and a housing. The AMB substrate includes an aluminum nitride base layer, a first conductive layer on a first surface of the aluminum nitride base layer, and a second conductive layer on a second surface of the aluminum nitride base layer opposite the first surface. The power converter circuitry includes a number of silicon carbide switching components coupled to one another via the first conductive layer. The housing is over the power converter circuitry and the AMB substrate. By using an AMB substrate with an aluminum nitride base layer, the thermal dissipation characteristics of the power converter module may be substantially improved while maintaining the structural integrity of the power converter module.
In one embodiment, the first conductive layer is directly on the first surface of the aluminum nitride base layer and the second conductive layer is directly on the second surface of the aluminum nitride base layer.
In one embodiment, the first conductive layer is etched to form a desired connection pattern between the silicon carbide switching components. The silicon carbide switching components may be coupled to the first conductive layer via one or more wirebonds such that the power switching path has a maximum length of about 50 mm and the gate control path has a maximum length of about 20 mm. By minimizing the power switching path length and gate control path length, the stray inductance in the power converter module is reduced.
In one embodiment, the power converter circuitry is a boost converter configured to receive a direct current (DC) input voltage and provide a stepped-up DC output voltage. The power converter circuitry may include a silicon carbide metal-oxide-semiconductor field-effect transistor (MOSFET) coupled in series with a silicon carbide Schottky diode. Further, the power converter circuitry may be configured to provide an output voltage greater than 650V, an output power greater than 900W, and operate at a switching frequency greater than 40 kHz. The switching losses of the power converter circuitry may be between 5 mJ/A and 100 mJ/A. The insulating base layer may have a minimum thermal conductivity of 30 W/m-K in order to provide low thermal resistance between the power converter circuitry and the second conductive layer.
In one embodiment, the power converter circuitry is one of a buck converter, a half-bridge converter, a full-bridge converter, a single-phase inverter, a three-phase inverter, and multilevel topologies like neutral point clamped (NPC) and transistor-type neutral point clamped (TNPC).
In one embodiment, a method for manufacturing a power converter module comprises providing an active metal braze (AMB) substrate, providing power converter circuitry, and providing a housing. The AMB substrate includes an aluminum nitride base layer, a first conductive layer on a first surface of the aluminum nitride base layer, and a second conductive layer on a second surface of the aluminum nitride base layer opposite the first surface. The power converter circuitry includes a number of silicon carbide switching components coupled to one another via the first conductive layer. The housing is provided over the power converter circuitry and the AMB substrate. By using an AMB substrate with an aluminum nitride base layer, the thermal dissipation characteristics of the power converter module may be substantially improved while maintaining the structural integrity of the power converter module.
Those skilled in the art will appreciate the scope of the present disclosure and realize additional aspects thereof after reading the following detailed description of the preferred embodiments in association with the accompanying drawing figures.
The accompanying drawing figures incorporated in and forming a part of this specification illustrate several aspects of the disclosure, and together with the description serve to explain the principles of the disclosure.
The embodiments set forth below represent the necessary information to enable those skilled in the art to practice the embodiments and illustrate the best mode of practicing the embodiments. Upon reading the following description in light of the accompanying drawing figures, those skilled in the art will understand the concepts of the disclosure and will recognize applications of these concepts not particularly addressed herein. It should be understood that these concepts and applications fall within the scope of the disclosure and the accompanying claims.
It will be understood that, although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the scope of the present disclosure. As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items.
It will be understood that when an element such as a layer, region, or substrate is referred to as being “on” or extending “onto” another element, it can be directly on or extend directly onto the other element or intervening elements may also be present. In contrast, when an element is referred to as being “directly on” or extending “directly onto” another element, there are no intervening elements present. Likewise, it will be understood that when an element such as a layer, region, or substrate is referred to as being “over” or extending “over” another element, it can be directly over or extend directly over the other element or intervening elements may also be present. In contrast, when an element is referred to as being “directly over” or extending “directly over” another element, there are no intervening elements present. It will also be understood that when an element is referred to as being “connected” or “coupled” to another element, it can be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being “directly connected” or “directly coupled” to another element, there are no intervening elements present.
Relative terms such as “below” or “above” or “upper” or “lower” or “horizontal” or “vertical” may be used herein to describe a relationship of one element, layer, or region to another element, layer, or region as illustrated in the Figures. It will be understood that these terms and those discussed above are intended to encompass different orientations of the device in addition to the orientation depicted in the Figures.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. As used herein, the singular forms “a,” “an,” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “comprises,” “comprising,” “includes,” and/or “including” when used herein specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be further understood that terms used herein should be interpreted as having a meaning that is consistent with their meaning in the context of this specification and the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
In light of the above, there is a need for power converter circuitry with improved performance. Specifically, there is a need for power converter circuitry capable of efficiently operating at high switching frequencies and high power densities.
Similarly, the second MOSFET 24 includes a gate contact (G), a source contact(S), and a drain contact (D). The drain contact (D) of the second MOSFET 24 is coupled to an eleventh and a twelfth one of the I/O pins 141 and 14J and to the anode of the second diode 26. The cathode of the second diode 26 is coupled to a thirteenth and a fourteenth one of the I/O pins 14K and 14L. The source contact(S) of the second MOSFET 24 is coupled to a fifteenth, a sixteenth, and a seventeenth one of the I/O pins 14M, 14N, 140. The gate contact (G) of the second MOSFET 24 is coupled to an eighteenth one of the I/O pins 14P. A temperature measurement resistor R_TM is coupled between a nineteenth and a twentieth one of the I/O pins 14Q and 14R.
The first MOSFET 20 and the first diode 22 (i.e., a first channel), along with one or more external components, form first boost converter circuitry, while the second MOSFET 24 and the second diode 26 (i.e., a second channel), along with one or more external components, form second boost converter circuitry. Because the separate boost converter circuitry operates in the same manner, the principles of operation thereof will now be discussed as they relate to the first boost converter circuitry. In operation, a direct current (DC) voltage is placed across the source contact(S) and the drain contact (D) of the first MOSFET 20. In some embodiments, the DC voltage delivered to the drain contact (D) of the first MOSFET 20 may be provided via a boost inductor (not shown). Further, a switching control signal is provided to the gate contact (G) of the first MOSFET 20, generally by gate driver circuitry (not shown). The resulting voltage across the cathode of the first diode 22 and the source contact(S) of the first MOSFET 20 is a stepped-up DC output voltage. Accordingly, the first boost converter circuitry and the second boost converter circuitry may be used to appropriately scale high-power DC voltages, which may be especially useful in applications such as solar power systems.
Notably, the first MOSFET 20 and the second MOSFET 24 each include a gate return terminal (I/O pin 14B and I/O pin 140, respectively) coupled to the source contact(S) thereof. Notably, these gate return terminals are located as close to the first MOSFET 20 and the second MOSFET 24, respectively, as possible, such that a parasitic inductance between the gate return terminal and the source contact(S) is minimized. Generally, this increases the achievable turn-on and turn-off speed of the first MOSFET 20 and the second MOSFET 24, thereby improving the performance of the power converter circuitry 18 by reducing switching losses.
Any of the first MOSFET 20, the first diode 22, the second MOSFET 24, and the second diode 26 are silicon carbide devices, which may be referred to as switching devices. As discussed herein, switching devices are devices capable of selectively delivering power to a load. In one embodiment, the first diode 22 and the second diode 26 are Schottky diodes. Accordingly, the performance of the power converter module 10 may be significantly improved. Specifically, because silicon carbide devices are majority carrier devices, they do not suffer from reductions in switching speed due to recombination of minority carriers that produce tail or reverse recovery currents. In one embodiment, recovery currents in conventional silicon PiN diodes are on the order of ˜7000nC, while recovery currents in the power converter circuitry 18 are less than ˜120nC (>16× reduction). Accordingly, silicon carbide devices can be operated at much higher speeds than conventional silicon devices, which provides several performance benefits for the power converter module 10 discussed below. The first boost converter circuit and the second boost converter circuit may be referred to as “channels.” Each one of these channels may provide an output voltage between 650V and 1200V, an output current from 10A to 50A (e.g., 10A, 20A, 30A, 40A, and 50A), and an output power between 900W and 30kW. Further, each one of these channels may provide an efficiency between about 96% and 99.5%, and switching losses less than or equal to about 300W when operated at switching speeds greater than 40 kHz.
In addition to the performance benefits afforded by utilizing silicon carbide devices in the power converter module 10, using silicon carbide devices also provides cost savings. Specifically, the size of filtering components such as inductors and capacitors used in a power converter system in which the power converter module 10 is incorporated is inversely proportional to the switching frequency of the power converter module. Further, the size of filtering components is proportional to the cost thereof. Accordingly, by using silicon carbide switching components that may be operated at high frequencies such as those above 40 kHz, the size of filtering components in a power system can be drastically reduced, thereby saving cost.
While the power converter circuitry 18 shown in
In operation, a positive voltage from the voltage source 34 is delivered to the boost inductor 30, where energy can be stored as a magnetic field. A switching control signal is delivered to the gate contact (G) of the first MOSFET 20 in order to repeatedly switch the first MOSFET 20 between an off-state and an on-state. In the off-state of the first MOSFET 20, a positive potential across the first diode 22 due to a charge on the boost inductor 30 allows current from the boost inductor (I_BOOST) to flow to the first load output 36 and charge the output capacitor 32. While not shown, a load will be coupled between the first load output 36 and the second load output 38 to complete the circuit. In the on-state of the first MOSFET 20, the anode of the first diode 22 is shorted to ground, and a charge on the output capacitor 32 causes the first diode 22 to remain in a blocking mode of operation. Energy stored in the output capacitor 32 causes a current to continue to flow into the load (not shown).
Notably, the speed at which the first MOSFET 20 is able to transition between the off-state and the on-state determines many operational characteristics of the boost converter circuitry 28. Faster switching speeds allow the boost converter circuitry 28 to operate in a continuous conduction mode in which the current supplied by the boost inductor 30 in a single switching period is reduced. Generally, silicon devices cannot achieve speeds sufficient to operate in a continuous conduction mode, and instead must operate in a discontinuous conduction mode. The reduced current supply requirements afforded by switching the first MOSFET 20 at high speeds results in a reduced requirement for energy storage by the boost inductor 30, and reduced electromagnetic interference (EMI), which eases the design of electromagnetic filtering circuitry associated with the boost converter circuitry 28. Accordingly, the inductance of the boost converter can be reduced without affecting the performance of the boost converter circuitry 28. Generally, the inductance value of an inductor is proportional to the size thereof. Accordingly, the size of the boost inductor 30 can be reduced as well. Further, the inductance value and size of an inductor is proportional to the cost thereof. As the boost inductor 30 may be among the most expensive parts of the boost converter circuitry 28, it may be highly beneficial to utilize the high switching speed of the first MOSFET 20 in order to reduce these costs. In one embodiment, the inductance value of the boost inductor 30 may be less than 450 μH due to the switching speeds achievable by the first MOSFET 20 as discussed herein. For example, the inductance of the boost inductor 30 may be between 25 μH and 150 pH, may be between 150 pH and 300 pH, and may be between 300 μH and 450 μH. Further, the total volume of the boost inductor 30 may be less than 7 cubic inches (e.g., between 1 cubic inch and 3 cubic inches, between 3 cubic inches and 5 cubic inches, and between 5 cubic inches and 7 cubic inches) and the total weight of the boost inductor 30 may be less than 1 pound (e.g., between 0.1 pounds and 0.3 pounds, between 0.3 pounds and 0.6 pounds, and between 0.6 pounds and 0.9 pounds) in some embodiments.
In other embodiments, the substrate 48 is an active metal braze (AMB) substrate including an insulating silicon nitride base layer 50 and a first conductive layer 52 on a first surface of the silicon nitride base layer 50. Silicon nitride may have similar properties to aluminum nitride as discussed above and therefore may increase the performance of the power converter module 10. In another embodiment, the substrate 48 may be a DBC substrate including an aluminum nitride or silicon nitride base layer, which may allow for similar performance improvements to those discussed above.
The first conductive layer 52 is etched to form a desired pattern on the first surface of the aluminum nitride base layer 50. Wirebonds 54 connect the first MOSFET 20, the first diode 22, the second MOSFET 24, and the second diode 26 to various parts of the first conductive layer 52 in order to connect the various components as described above with respect to
Those skilled in the art will recognize improvements and modifications to the preferred embodiments of the present disclosure. All such improvements and modifications are considered within the scope of the concepts disclosed herein and the claims that follow.
This application is a continuation of U.S. patent application Ser. No. 16/784,857 filed on Feb. 7, 2020, now U.S. Pat. No. 12,046,998 issued Jul. 23, 2024; which application is a continuation of U.S. patent application Ser. No. 15/055,872, filed on Feb. 29, 2016, which claims the benefit of U.S. provisional patent application No. 62/133,872, filed Mar. 16, 2015, the disclosures of which are incorporated herein by reference in their entireties.
| Number | Date | Country | |
|---|---|---|---|
| 62133872 | Mar 2015 | US |
| Number | Date | Country | |
|---|---|---|---|
| Parent | 16784857 | Feb 2020 | US |
| Child | 18779946 | US | |
| Parent | 15055872 | Feb 2016 | US |
| Child | 16784857 | US |
