Patent Application
20240290766
Subject matter herein relates to solid state light-emitting diode chips incorporating inductor structures for harvesting power from radio frequency signals, devices incorporating such chips, and methods for fabricating such chips and devices.
Solid-state lighting devices such as light-emitting diodes (LEDs) are increasingly used in both consumer and commercial applications. LEDs have been widely adopted in various illumination contexts, as well as for backlighting of liquid crystal displays and for providing sequentially illuminated LED displays. Illumination applications include automotive headlamps, roadway lamps, stadium lights, light fixtures, flashlights, and various indoor, outdoor, and specialty lighting contexts. Desirable characteristics of LED devices according to various end uses include high luminous efficacy, uniform color point over an illuminated area, long lifetime, wide color gamut, and compact size.
LEDs are solid-state devices that convert electrical energy to light and generally include one or more active layers of semiconductor material (or an active region) arranged between oppositely doped n-type and p-type layers. When a bias is applied across the doped layers, holes and electrons are injected into the one or more active layers where they recombine to generate emissions such as visible light or ultraviolet emissions. An LED chip typically includes an active region that may be fabricated, for example, from silicon carbide, gallium nitride, gallium phosphide, indium phosphide, aluminum nitride, gallium arsenide-based materials, and/or from organic semiconductor materials. Photons generated by the active region are initiated in all directions. Lumiphoric materials, such as phosphors, may be arranged in light emission paths of LED emitters to convert portions of light to different wavelengths.
LEDs may receive electric current from grid-tied power source, or, particularly in the case of portable devices, batteries. However, batteries are subject to being depleted, and they increase the size, weight, and complexity of portable devices. There are applications in which it would be beneficial to provide small and light (e.g., portable) LED devices that dispense with the need for batteries and grid-tied power sources.
The art continues to seek improved solid-state lighting devices capable of overcoming challenges associated with conventional lighting devices, and methods for fabricating such devices.
The present disclosure relates in various aspects to solid state light emitting chips (e.g., LED chips) having integrated components that permit them to harvest power from radio frequency signals, thereby permitting such chips to be operated without need for batteries or grid-tied power sources. A LED chip has integrated capacitor and inductor structures, wherein a capacitor structure is coupled to an active LED structure of the LED chip, the inductor structure is coupled to the capacitor structure, and the inductor structure is configured to harvest power from a radio frequency (RF) signal (e.g., supplied by a RF source separated from the LED chip). At least portions of the active LED structure, the capacitor structure, and the inductor structure may be arranged in (or in contact with) a ceramic passivation material (e.g., an oxide, a nitride, or an oxynitride material) as part of an integrated LED chip structure. Integrating the capacitor and inductor structures into the LED chip permits a RF-driven LED chip to be extremely compact in size. A resistor element or memristor element may further be coupled between the capacitor structure and the active region.
In one aspect, the disclosure relates to a light-emitting diode (LED) chip that comprises: an active LED structure comprising an n-type layer, a p-type layer, and an active region arranged between the n-type layer and the p-type layer; a capacitor structure coupled to the active LED structure; a first inductor structure coupled to the capacitor structure, the first inductor structure being configured to harvest power from a radio frequency signal; and a ceramic passivation material contacting at least portions of the each of n-type layer, the p-type layer, the capacitor structure, and the first inductor structure
In another aspect, the disclosure relates to a light-emitting diode (LED) chip that comprises: an active LED structure comprising an n-type layer, a p-type layer, and an active region arranged between the n-type layer and the p-type layer; a capacitor structure coupled to the active LED structure; and a first inductor structure coupled to the capacitor structure, the first inductor structure being configured to harvest power from a radio frequency signal; wherein the LED chip has a footprint of no greater than 2.5 mm×2.5 mm (or within another threshold or range disclosed herein), or a top area when viewed from above of no more than 6.25 mm2 (or within another threshold or range disclosed herein).
In certain embodiments, a LED chip further comprises a ceramic passivation material contacting at least portions of the each of n-type layer, the p-type layer, the capacitor structure, and the first inductor structure.
In certain embodiments, the ceramic passivation material comprises an oxide, a nitride, or oxynitride material.
In certain embodiments, wherein at least a portion of each of the capacitor structure and the first inductor structure is arranged within 500 microns of the active region.
In certain embodiments, the capacitor structure comprises a first proximal electrode coupled to the n-type layer, and comprises a first distal electrode that is separated from the first proximal electrode; and a portion of the ceramic passivation material is arranged between the first proximal electrode and the first distal electrode.
In certain embodiments, the LED chip further comprises a resistor element arranged in contact with the ceramic passivation material, and coupled between the capacitor structure and the active LED structure.
In certain embodiments, the LED chip further comprises a memristor structure arranged in contact with the ceramic passivation material, and coupled between the capacitor structure and the active LED structure.
In certain embodiments, the LED chip further comprises a substrate that comprises a light-transmissive material and that is configured to permit transmission of at least a portion of light emissions of the active LED structure.
In certain embodiments, the substrate comprises a patterned surface including at least one of (a) a plurality of recessed features and (b) a plurality of raised features, wherein the active LED structure is adjacent to the patterned surface of the substrate
In certain embodiments, the LED chip further comprises at least one reflector layer configured to reflect emissions of active region toward the substrate, wherein the active LED structure is arranged between the substrate and the at least one reflector layer.
In certain embodiments, the LED chip further comprises at least one barrier layer contacting the at least one reflector layer and configured to inhibit migration of metal atoms of the at least one reflector layer.
In certain embodiments, a central area of the LED chip is laterally surrounded by a peripheral area, wherein the active region is arranged in the central area, and the first inductor structure is arranged in the peripheral area.
In certain embodiments, the LED chip further comprises a first electrical contact coupled to the n-type layer; and a second electrical contact coupled to the p-type layer.
In certain embodiments, each of the first electrical contact and the second electrical contact is exposed along an exterior of the LED chip.
In certain embodiments, the capacitor structure and the first inductor structure are encapsulated within the ceramic passivation material and not exposed along an exterior surface of the LED chip.
In certain embodiments, the LED chip further comprises a second inductor structure.
In another aspect, the disclosure relates to a method for fabricating a LED chip, the method comprising: growing an active LED structure on a substrate, the active LED structure comprising an n-type layer, a p-type layer, and an active region arranged between the n-type layer and the p-type layer; forming a mesa including mesa sidewalls that bound the active region; depositing a first metal-containing layer, wherein a central portion of the first metal-containing layer is deposited over the mesa to form a mirror structure, and a peripheral portion of the first metal-containing layer is arranged to form a proximal capacitor electrode; depositing a ceramic passivation material over the first metal-containing layer; etching portions of the ceramic passivation material; and depositing a second metal-containing layer to form a first inductor structure and a distal capacitor electrode.
In certain embodiments, the ceramic passivation material comprises an oxide, a nitride, or oxynitride material.
In certain embodiments, at least a portion of each of the capacitor structure and the first inductor structure is arranged within 500 microns of the active region.
In certain embodiments, the method further comprises forming a resistor element coupled between the capacitor structure and the active LED structure.
In certain embodiments, the method further comprises forming a memristor structure coupled between the capacitor structure and the active LED structure,
In certain embodiments, the substrate comprises a patterned surface including at least one of (a) a plurality of recessed features and (b) a plurality of raised features, wherein the active LED structure is adjacent to the patterned surface of the substrate.
In certain embodiments, the method further comprises forming a first electrical contact coupled to the n-type layer, and forming a second electrical contact coupled to the p-type layer.
In certain embodiments, each of the first electrical contact and the second electrical contact is exposed along an exterior of the LED chip.
In another aspect, any of the foregoing aspects, and/or various separate aspects and features as described herein, may be combined for additional advantage. Any of the various features and elements as disclosed herein may be combined with one or more other disclosed features and elements unless indicated to the contrary herein.
Other aspects, features and embodiments of the present disclosure will be more fully apparent from the ensuing disclosure and appended claims.
The embodiments set forth below represent the necessary information to enable those skilled in the art to practice the embodiments and illustrate the best mode of practicing the embodiments. Upon reading the following description in light of the accompanying drawing figures, those skilled in the art will understand the concepts of the disclosure and will recognize applications of these concepts not particularly addressed herein. It should be understood that these concepts and applications fall within the scope of the disclosure and the accompanying claims.
It will be understood that, although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the scope of the present disclosure. As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items.
It will be understood that when an element such as a layer, region, or substrate is referred to as being “on” or extending “onto” another element, it can be directly on or extend directly onto the other element or intervening elements may also be present. In contrast, when an element is referred to as being “directly on” or extending “directly onto” another element, there are no intervening elements present. Likewise, it will be understood that when an element such as a layer, region, or substrate is referred to as being “over” or extending “over” another element, it can be directly over or extend directly over the other element or intervening elements may also be present. In contrast, when an element is referred to as being “directly over” or extending “directly over” another element, there are no intervening elements present. It will also be understood that when an element is referred to as being “connected” or “coupled” to another element, it can be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being “directly connected” or “directly coupled” to another element, there are no intervening elements present.
Relative terms such as “below” or “above” or “upper” or “lower” or “horizontal” or “vertical” may be used herein to describe a relationship of one element, layer, or region to another element, layer, or region as illustrated in the Figures. It will be understood that these terms and those discussed above are intended to encompass different orientations of the device in addition to the orientation depicted in the Figures.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. As used herein, the singular forms “a,” “an,” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “comprises,” “comprising,” “includes,” and/or “including” when used herein specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be further understood that terms used herein should be interpreted as having a meaning that is consistent with their meaning in the context of this specification and the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
Embodiments are described herein with reference to schematic illustrations of embodiments of the disclosure. As such, the actual dimensions of the layers and elements can be different, and variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, are expected. For example, a region illustrated or described as square or rectangular can have rounded or curved features, and regions shown as straight lines may have some irregularity. Thus, the regions illustrated in the figures are schematic and their shapes are not intended to illustrate the precise shape of a region of a device and are not intended to limit the scope of the disclosure. Additionally, sizes of structures or regions may be exaggerated relative to other structures or regions for illustrative purposes and, thus, are provided to illustrate the general structures of the present subject matter and may or may not be drawn to scale. Common elements between figures may be shown herein with common element numbers and may not be subsequently re-described.
Before delving into specific details of various aspects of the present disclosure, an overview of various elements that may be included in exemplary LEDs of the present disclosure is provided for context. A LED chip typically comprises an active LED structure or region that can have many different semiconductor layers arranged in different ways. The fabrication and operation of LEDs and their active structures are generally known in the art and are only briefly discussed herein. The layers of the active LED structure can be fabricated using known processes with a suitable process being fabrication using metal organic chemical vapor deposition. The layers of the active LED structure can comprise many different layers and generally comprise an active layer sandwiched between n-type and p-type oppositely doped epitaxial layers, all of which are formed successively on a growth substrate. It is understood that additional layers and elements can also be included in the active LED structure, including, but not limited to, buffer layers, nucleation layers, super lattice structures, undoped layers, cladding layers, contact layers, and current-spreading layers and light extraction layers and elements. The active layer can comprise a single quantum well, a multiple quantum well, a double heterostructure, or super lattice structures.
The active LED structure can be fabricated from different material systems, with some material systems being Group III nitride-based material systems. Group III nitrides refer to those semiconductor compounds formed between nitrogen (N) and the elements in Group III of the periodic table, usually aluminum (AI), gallium (Ga), and indium (In). Gallium nitride (GaN) is a common binary compound. Group III nitrides also refer to ternary and quaternary compounds such as aluminum gallium nitride (AlGaN), indium gallium nitride (InGaN), and aluminum indium gallium nitride (AlInGaN). For Group III nitrides, silicon (Si) is a common n-type dopant and magnesium (Mg) is a common p-type dopant. Accordingly, the active layer, n-type layer, and p-type layer may include one or more layers of GaN, AlGaN, InGaN, and AlInGaN that are either undoped or doped with Si or Mg for a material system based on Group III nitrides. Other material systems include silicon carbide (SiC), organic semiconductor materials, and other Group III-V systems such as gallium phosphide (GaP), gallium arsenide (GaAs), indium phosphide (InP), and related compounds.
The active LED structure may be grown on a growth substrate that can include many materials, such as sapphire, SiC, aluminum nitride (AlN), GaN, GaAs, glass, or silicon. SiC has certain advantages, such as a closer crystal lattice match to Group III nitrides than other substrates and results in Group III nitride films of high quality. SiC also has a very high thermal conductivity so that the total output power of Group III nitride devices on SiC is not limited by the thermal dissipation of the substrate. Sapphire is another common substrate for Group III nitrides and also has certain advantages, including being lower cost, having established manufacturing processes, and having good light-transmissive optical properties.
Different embodiments of the active LED structure can emit different wavelengths of light depending on the composition of the active layer and n-type and p-type layers. In some embodiments, the active LED structure emits blue light with a peak wavelength range of approximately 430 nanometers (nm) to 480 nm. In other embodiments, the active LED structure emits green light with a peak wavelength range of 500 nm to 570 nm. In other embodiments, the active LED structure emits red light with a peak wavelength range of 600 nm to 650 nm. In certain embodiments, the active LED structure may be configured to emit light that is outside the visible spectrum, including one or more portions of the ultraviolet (UV) spectrum.
A LED chip can also be covered with one or more lumiphoric materials (also referred to herein as lumiphors), such as phosphors, such that at least some of the light from the LED chip is absorbed by the one or more lumiphors and is converted to one or more different wavelength spectra according to the characteristic emission from the one or more lumiphors. In this regard, at least one lumiphor receiving at least a portion of the light generated by the LED source may re-emit light having different peak wavelength than the LED source. A LED source and one or more lumiphoric materials may be selected such that their combined output results in light with one or more desired characteristics such as color, color point, intensity, spectral density, etc. In certain embodiments, aggregate emissions of LED chips, optionally in combination with one or more lumiphoric materials, may be arranged to provide cool white, neutral white, or warm white light, such as within a color temperature range of 2500 Kelvin (K) to 10,000 K. In certain embodiments, lumiphoric materials having cyan, green, amber, yellow, orange, and/or red peak wavelengths may be used. In certain embodiments, the combination of the LED chip and the one or more lumiphors (e.g., phosphors) emits a generally white combination of light. The one or more phosphors may include yellow (e.g., YAG:Ce), green (e.g., LuAg:Ce), and red (e.g., Cai-x-ySrxEuyAlSiN3) emitting phosphors, and combinations thereof. In other embodiments, the LED chip and corresponding lumiphoric material may be configured to primarily emit converted light from the lumiphoric material so that aggregate emissions include little to no perceivable emissions that correspond to the LED chip itself.
Lumiphoric materials as described herein may be or include one or more of a phosphor, a scintillator, a lumiphoric ink, a quantum dot material, a day glow tape, and the like. Lumiphoric materials may be provided by any suitable means, for example, direct coating on one or more surfaces of an LED, dispersal in an encapsulant material configured to cover one or more LEDs, and/or coating on one or more optical or support elements (e.g., by powder coating, inkjet printing, or the like). In certain embodiments, lumiphoric materials may be downconverting or upconverting, and combinations of both downconverting and upconverting materials may be provided. In certain embodiments, multiple different (e.g., compositionally different) lumiphoric materials arranged to produce different peak wavelengths may be arranged to receive emissions from one or more LED chips. One or more lumiphoric materials may be provided on one or more portions of an LED chip in various configurations. In certain embodiments, one or more lumiphoric materials may be arranged on or over one or more surfaces of an LED chip in a substantially uniform manner. In other embodiments, one or more lumiphoric materials may be arranged on or over one or more surfaces of an LED chip in a manner that is non-uniform with respect to one or more of material composition, concentration, and thickness. In certain embodiments, the loading percentage of one or more lumiphoric materials may be varied on or among one or more outer surfaces of an LED chip. In certain embodiments, one or more lumiphoric materials may be patterned on portions of one or more surfaces of an LED chip to include one or more stripes, dots, curves, or polygonal shapes. In certain embodiments, multiple lumiphoric materials may be arranged in different discrete regions or discrete layers on or over an LED chip.
As used herein, a layer or region of a light-emitting device may be considered to be “transparent” when at least 80% of emitted radiation that impinges on the layer or region emerges through the layer or region. Moreover, as used herein, a layer or region of an LED is considered to be “reflective” or embody a “mirror” or a “reflector” when at least 80% of the emitted radiation that impinges on the layer or region is reflected. In some embodiments, the emitted radiation comprises visible light such as blue and/or green LEDs with or without lumiphoric materials. In other embodiments, the emitted radiation may comprise nonvisible light. For example, in the context of GaN-based blue and/or green LEDs, silver (Ag) may be considered a reflective material (e.g., at least 80% reflective). In the case of UV LEDs, appropriate materials may be selected to provide a desired, and in some embodiments high, reflectivity and/or a desired, and in some embodiments low, absorption. In certain embodiments, a “light-transmissive” material may be configured to transmit at least 50% of emitted radiation of a desired wavelength.
The present disclosure can be useful for LED chips having a variety of geometries, such as vertical geometry. A vertical geometry LED chip typically includes anode and cathode connections on opposing sides or faces of the LED chip. In certain embodiments, a vertical geometry LED chip may also include a growth substrate that is arranged between the anode and cathode connections. In certain embodiments, LED chip structures may include a carrier submount and where the growth substrate is removed. In still further embodiments, any of the principles described may also be applicable to flip-chip structures where anode and cathode connections are made from a same side of the LED chip for flip-chip mounting to another surface.
Solid state light emitting chips (e.g., LED chips) according to embodiments disclosed herein include integrated components that permit them to harvest power from radio frequency signals, thereby permitting such chips to be operated without need for batteries or grid-tied power sources. In certain embodiments, a LED chip has integrated capacitor and inductor structures, wherein a capacitor structure is coupled to an active LED structure of the LED chip, the inductor structure is coupled to the capacitor structure, and the inductor structure is configured to harvest power from a radio frequency (RF) signal (e.g., supplied by a RF source separated from the LED chip). At least portions of the active LED structure, the capacitor structure, and the inductor structure may be arranged in (or in contact with) a ceramic passivation material (e.g., an oxide, a nitride, or an oxynitride material) as part of an integrated LED chip structure. Integrating the capacitor and inductor structures into the LED chip permits a RF-driven LED chip to be extremely compact in size, wherein in certain embodiments the entire LED chip may have a footprint of no greater than 2.5×2.5 mm, or a footprint no greater than 2.0 mm×2.0 mm, or a footprint no greater than 1.5 mm×1.5 mm, or a footprint no greater than 1.0 mm×1.0 mm, or a footprint no greater than 0.5 mm×0.5 mm, or a footprint in a range between any two or more of the foregoing values. In certain embodiments, the entire LED chip may have a top area (i.e., two dimensional area when viewed from above) of no more than 6.25 mm2, of no more than 4 mm2, of no more than 2.25 mm2, of no more than 1 mm2, or of no more than 0.25 mm2, or a top area within a range between any two or more of the foregoing values. A LED chip may have a shape when viewed from above that is rectangular, polygonal, round, or any other suitable shape. In certain embodiments, at least a portion of each of a capacitor structure and an inductor structure may be arranged within 500 microns of an active region of a LED chip. Various additional features and structures (e.g., resistors, memristors, etc.) may be provided in a RF-driven LED chip according to embodiments herein. Integration of power harvesting structures in a LED chip permits functional elements to be placed in close proximity and permits reduced chip sizes that would not be achievable in a non-integrated format (e.g., with separately fabricated elements such as LED, inductor, capacitor, resistor/memristor being mounted to a circuit board and connected by traces thereon).
A current spreading layer 24 (which may be formed of a transparent conductive oxide such as indium tin oxide (ITO), a metal such as platinum (Pt), or another suitable material) is arranged against portions of the p-type layer 26 and serves to laterally spread current before such current is injected into the p-type semiconductor layer 26, thereby providing increased current injection area. While providing such benefits, the current spreading layer 24 may negatively impact luminous efficacy by absorbing some percentage of light generated by the active LED structure 27. To partially mitigate this issue, the current spreading layer 24 may be formed in segments across the p-type semiconductor layer 26 so that portions of the passivation material 36 may form an index of refraction step with the p-type semiconductor layer 26 so that at least some light reaching this interface may be redirected or reflected, wherein passivation material segments 37 are arranged between different segments of the current spreading layer 24. Additionally, separating the current spreading layer 24 into segments allows fine tuning of current injection across the p-type semiconductor layer 26. The passivation material 36 protects and provides electrical insulation for the LED chip 20 and can comprise many different materials, such as a dielectric material. In certain embodiments, the passivation material 36 is deposited in multiple layers of one or more passivation materials. Examples of suitable materials for the passivation material 36 include but are not limited to SiO2, SiN, SiNx, and/or Si3N4.
With continued reference to
The LED chip 20 includes a p-contact 46 and an n-contact 48 that are partially embedded in the passivation material 36 and accessible along a rear surface 22 of the chip 20, with the p-contact 46 and an n-contact 48 being configured to permit electrical connections to be made with the active LED structure 27. The p-contact 46, which may also be referred to as an anode contact, may comprise one or more p-contact interconnects 50 that extend through the passivation material 36 to the barrier layer 42 or the at least one reflective layer 38 to provide an electrical path to the p-type layer 26. In certain embodiments, the one or more p-contact interconnects 50 comprise one or more p-contact vias. The n-contact 48, which may also be referred to as a cathode contact, may comprise one or more n-contact interconnects 52 that extend through the passivation material 36, the current spreading layer 24, the p-type layer 26, and the active layer 30 to provide an electrical path to the n-type layer 28. In certain embodiments, the one or more n-contact interconnects 52 comprise one or more n-contact vias.
The p-contact 46 and the n-contact 48 can comprise many different materials such as Au, copper (Cu), nickel (Ni), In, Al, Ag, tin (Sn), Pt, or combinations thereof. In still other embodiments, the p-contact 46 and the n-contact 48 can comprise conducting oxides and transparent conducting oxides such as ITO, nickel oxide (NiO), ZnO, cadmium tin oxide, indium oxide, tin oxide, magnesium oxide, ZnGa2O4, ZnO2/Sb, Ga2O3/Sn, AgInO2/Sn, In2O3/Zn, CuAlO2, LaCuOS, CuGaO2, and SrCu2O2. The choice of material used can depend on the location of the contacts and on the desired electrical characteristics, such as transparency, junction resistivity, and sheet resistance. As described above, the LED chip 20 is arranged for flip-chip mounting and the p-contact 46 and n-contact 48 enable the chip 20 to be mounted or bonded to a surface, such as a printed circuit board. While
The LED chip 20 additionally includes an inductor structure 54 arranged proximate to a rear surface 22 of the LED chip 20. Although
During fabrication of the LED chip 20, the substrate 32 may be patterned along surface 33, with the buffer and/or undoped layers 34 grown thereon. The n-type layer 28 and p-type layer 26 are grown on the buffer and/or undoped layers 34. Thereafter, peripheral portions of the n-type layer 28, p-type layer 26, and buffer and/or undoped layers 34 may be subjected to etching or another suitable material removal technique to form a mesa structure that protrudes relative to the substrate 32, with the mesa structure being laterally bounded by buffer or undoped layer sidewalls 35 as well as semiconductor layer sidewalls 29, which bound the active region 30. The current spreading layer 24 is formed over the p-type layer, and a portion of the passivation material 36 may be provided over the current spreading layer 24. Thereafter, at least one metal-containing layer may be deposited over the current spreading layer 24 and a central portion of passivation material 36 to form the reflector layer 38 in a central region 60 of the chip 20, wherein the at least one metal-containing layer may also be deposited over peripheral portions of the n-type layer 28 to form proximal plates 56A of the capacitor structure in the peripheral region 61 of the chip 20. The barrier layer 42 may be formed over the reflector layer 38. After deposition of additional passivation material 36, portions of the passivation material 36 may be etched to form recesses, and at least one metal-containing layer may be deposited to form the inductive structure 54, the distal capacitor plate 56B, the resistor element 59, and interconnects 55, 57. At the same time, or in a different step, the n-contact 48, p-contact 46, and related interconnects 52, 50 may be formed by metal deposition (e.g., following etching to form recesses into which metal is deposited).
In wireless operation of the LED chip 20, a RF signal generated by an external source (not shown) is received by the inductor structure 54, causing current to be conducted through conductive trace 55 to the proximal capacitor plate 56A, causing charge to accumulate between the capacitor plates 56A, 56B. When sufficient charge has accumulated between the capacitor plates 56A, 56B, current will flow from the proximal capacitor plates 56A through the n-type layer 28, the active layer 30, the p-type layer 26, the current spreading layer 24, the reflector layer 38, the barrier layer 42, the p-contact 46, and the resistor element 56 to the distal capacitor plate 56B, causing photons (light) to be emitted by the active layer 30. Such light is reflected by the reflector layer 30 toward the substrate 32 to exit through the light extraction surface 21.
Because the p-contact 46 and the n-contact 48 are exposed along the rear surface 22 of the LED chip 20, the LED chip 20 may also be illuminated by a battery or grid-tied power source coupled thereto. In such operation, a signal applied across the p-contact 46 and the n-contact 48 is conducted to the p-type layer 26 and the n-type layer 28, causing the LED chip 20 to emit light from the active layer 30. Thus, the LED chip 20 may be illuminated by conduction of a wired signal, or by receipt of a wireless RF signal.
Although the LED chip 20 shown in
In certain embodiments, a solid state light emitting chip configured for harvesting power from a RF signal may incorporate multiple inductor structures, which may be configured for receiving RF signals of different frequencies. One example of such an arrangement is schematically illustrated in
In operation of the LED chip 220, a first RF signal generated by an external source (not shown) is received by the first inductor structure 54-1, causing current to be conducted through conductive trace 55-1 to the proximal capacitor plate 56A, thereby causing charge to accumulate between the capacitor plates 56A, 56B. Separately, or additionally, a second RF signal generated by an external source (not shown) is received by the second inductor structure 54-2, causing current to be conducted through conductive trace 55-2 to the proximal capacitor plate 56A, thereby causing charge to accumulate between the capacitor plates 56A, 56B. When sufficient charge has accumulated between the capacitor plates 56A, 56B, current will flow from the proximal capacitor plates 56A through the n-type layer 28, the active layer 30, the p-type layer 26, the current spreading layer 24, the reflector layer 38, the barrier layer 42, the p-contact 46, and the resistor element 56 to the distal capacitor plate 56B, causing photons (light) to be emitted by the active layer 30. Such light is reflected by the reflector layer 30 toward the substrate 32 to exit through the light extraction surface 21.
In certain embodiments, a solid state LED chip configured for harvesting power from a RF signal may incorporate a memristor structure in lieu of a resistor. A memristor is a non-linear two-terminal electrical component relating electric charge and magnetic flux linkage. A memristor shows the behavior of a non-linear resistor and shows non-volatile or volatile memory properties, by remembering or recollecting the amount of charge that has previously flowed through it, even when power is no longer present. Restated, in a memristor, the resistance is not constant and depends on the history of current passed through the memristor. A memristor may include metal that is permitted to diffuse in a lattice when exposed to sufficiently high charge, thereby altering resistance properties. This diffusion may be partially or fully reversed in at least some cases by heating the memristor, thereby resetting the element to a normal resistance state. Examples of known memristors include, but are not limited to, structures based on titanium oxide (TiO2) metal-insulator-metal (MIM) designs, layered MoS2 devices with grain boundary regions, and devices containing MoOx/MoS2.
In certain embodiments, a solid state light emitting chip configured for harvesting power from a RF signal may incorporate multiple inductor structures (which may be configured for receiving RF signals of different frequencies) in combination with a memristor structure. One example of such a structure is illustrated in
In operation of the LED chip 320A, a first RF signal generated by an external source (not shown) is received by the first inductor structure 54-1, causing current to be conducted through conductive trace 55-1 to the proximal capacitor plate 56A, thereby causing charge to accumulate between the capacitor plates 56A, 56B. Separately, or additionally, a second RF signal generated by an external source (not shown) is received by the second inductor structure 54-2, causing current to be conducted through conductive trace 55-2 to the proximal capacitor plate 56A, thereby causing charge to accumulate between the capacitor plates 56A, 56B. When sufficient charge has accumulated between the capacitor plates 56A, 56B, current will flow from the proximal capacitor plates 56A through the n-type layer 28, the active layer 30, the p-type layer 26, the current spreading layer 24, the reflector layer 38, the barrier layer 42, the p-contact 46, and the memristor 64 to the distal capacitor plate 56B, causing photons (light) to be emitted by the active layer 30. Such light is reflected by the reflector layer 30 toward the substrate 32 to exit through the light extraction surface 21. If a sufficiently high level of charge is supplied to the memristor element 64, then a resistance value thereof may be altered and maintained in an altered state, thereby altering amount of current that may be supplied to the active layer 30 and altering emissions of the LED chip 320A. If desired, the altered resistance value of the memristor element 64 may be returned to an original state by heating the LED chip 320A. Since the LED chip 320 in the illustrated embodiment includes exposed electrical contacts (i.e., n-contact 48 and p-contact 46), the LED chip 320A may also be operated by supplying electrical potential across the electrical contacts 46, 48.
In certain embodiments, an LED chip or support element may include a microcontroller to pass signals and/or information among components of the system 350.
In certain embodiments, LED chips 360, 370A-370X arranged in or on articles 371, 372 may be provided in singular form or arranged in one-, two-, or three-dimensional arrays arranged to output light of a single color or multiple colors. In certain embodiments, multiple LED chips 370A-370X of different colors may be configured to be illuminated with RF signals of different frequencies (i.e., by selecting different inductive elements tuned to receive specific frequencies) to permit operation of different LED chips 370A-370X to be separately controlled with different RF transmitters 355. In certain embodiments, multiple LED chips 370A-370X may be arrayed and utilized as a sequentially illuminated display. In certain embodiments, the support elements 362, 372 may embody or may be integrated into articles such as clothing, shoes, towels, jewelry, electronic devices, protective cases (e.g., for smartphones, tablet/laptop computers, etc.), upholstery, artwork, credit/debit cards, security access cards, appliances, construction materials, sensors, product packaging, keys, vehicles, indoor or outdoor wireless lighting installations, and other articles. In certain embodiments, output emissions of LED chips 360, 370A-370X may be analyzed by a light sensor (not shown) to sense output intensity (e.g., lumen) and/or wavelength properties of LED chip emissions to assess usage information of the LED chips 360, 370A-370X. For example, if the LED chips 360, 370A-370X incorporate memristors, output emissions of the LED chips 360, 370A-370X may be affected based on prior exposure to RF signals of sufficient intensity due to alteration of memristor resistance. In certain embodiments, light emissions of the LED chips 360, 370A-370X may be used to confirm proximity of the LED chips 355 to a RF transmitter 355 configured to provide a RF signal of known intensity. This may be useful to provide visual feedback to a user of proximity of an article 361, 362 (e.g., a payment device such as a TAP-enabled credit or debit card) to a terminal (e.g., a wireless payment terminal) having a RF transmitter.
In certain embodiments, the LED chips 360, 370A-370X may be added to or otherwise integrated into wearable articles 361, 371. In certain embodiments, one or more LED chips 360, 370A-370X may be removably attached to support elements 362, 372, thereby permitting the LED chips 360, 370A-370X to be mixed or matched and swapped between articles of clothing based on a user's preference, mood, desire for lighting, or the like. In certain embodiments, multiple LED chips 370A-370X may be assembled and/or operated to provide one or more messages in textual characters and/or symbols.
Those skilled in the art will recognize improvements and modifications to the preferred embodiments of the present disclosure. All such improvements and modifications are considered within the scope of the concepts disclosed herein and the claims that follow.
This application claims priority to U.S. Provisional Patent Application No. 63/487,089 filed on Feb. 27, 2023, wherein the entire contents of the foregoing application are hereby incorporated by reference herein.
| Number | Date | Country | |
|---|---|---|---|
| 63487089 | Feb 2023 | US |
