Patent Application
20230122167
The disclosure relates to methods of forming semiconductor devices on a semiconductor substrate. More specifically, the disclosure relates to conditioning a chamber for the processing of substrates.
In forming semiconductor devices, plasma processing chambers may be used to process substrates. Residues are deposited within the plasma processing chambers. The residues may be removed by using a cleaning process between the processing of each substrate. In addition, plasma processing may erode components of the plasma processing chamber. Coatings may be used to protect components from erosion.
To achieve the foregoing and in accordance with the purpose of the present disclosure, a method for processing one or more substrates in a plasma processing chamber, the method is provided. A plurality of cycles is provided, wherein each cycle comprises providing a pre-coat process, processing at least one substrate within the plasma processing chamber, and cleaning the plasma processing chamber. The providing the pre-coat process comprises one or more cycles of depositing a silicon containing pre-coat layer and depositing a carbon containing pre-coat layer.
In another manifestation, a method for conditioning a semiconductor processing chamber for processing a substrate, wherein the conditioning is provided before the substrate is placed in the semiconductor processing chamber is provided. A pre-coat process is provided, wherein the pre-coat process comprises one or more cycles of depositing a silicon containing pre-coat layer and depositing a carbon containing pre-coat layer.
These and other features of the present disclosure will be described in more detail below in the detailed description of the disclosure and in conjunction with the following figures.
The present disclosure is illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings and in which like reference numerals refer to similar elements and in which:
The present disclosure will now be described in detail with reference to a few embodiments thereof as illustrated in the accompanying drawings. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present disclosure. It will be apparent, however, to one skilled in the art, that the present disclosure may be practiced without some or all of these specific details. In other instances, well known process steps and/or structures have not been described in detail in order to not unnecessarily obscure the present disclosure.
An example recipe for depositing a silicon containing pre-coat (step 108) flows a silicon deposition gas of 100 sccm SiCl4, 200 sccm O2, and 300 sccm Ar into a plasma processing chamber. The silicon deposition gas is transformed into a plasma by providing 1000 watts of TCP power at 13.6 megahertz (MHz). A transformer coupled capacitive tuning (TCCT) match of 1 is provided. A chamber pressure of 10 mTorr is provided. As a result, the depositing the silicon containing pre-coat (step 108) deposits a silicon oxide based pre-coat layer.
An example recipe for depositing a carbon containing pre-coat (step 112) flows a carbon deposition gas comprising 150 sccm fluoromethane (CH3F) and 150 sccm fluoroform (CHF3) into a plasma processing chamber. The carbon deposition gas is transformed into a plasma by providing 1600 watts of transformer coupled plasma (TCP) power at 13.6 MHz. A transformer coupled capacitive tuning (TCCT) match of 0.5 is provided. A chamber pressure of 100 mTorr is provided. In other embodiments, the carbon deposition gas comprises other hydrocarbons, fluorocarbons, or hydrofluorocarbons.
After the silicon containing pre-coat layer 212 and the carbon containing pre-coat layer 216 are formed over the component body 204 forming part of a plasma processing chamber, a substrate is placed in the plasma processing chamber (step 116). The substrate may be a silicon wafer. After the substrate has been placed into the plasma processing chamber, the substrate is processed (step 120). The process may be an etch process. The etch process may etch a dielectric or conductive layer. Such a process may provide an etch gas. The etch gas would be formed into a plasma. In this embodiment, a silicon containing layer is etched. The carbon containing pre-coat layer 216 resists etching during the etching of the silicon containing layer.
The carbon containing pre-coat layer 216 protects the yttrium oxide coating 208, whereas a silicon containing pre-coat layer 212 without the carbon containing pre-coat layer 216 would be more quickly etched during the etching of the silicon containing layer over the substrate and would expose the yttrium oxide coating 208 to the silicon containing layer etch.
In this embodiment, after the silicon containing layer over the substrate is etched, a carbon containing layer over the substrate would be etched or stripped. In this embodiment, the carbon containing layer is an amorphous carbon mask used to pattern the silicon containing layer during the silicon containing layer etch. Without the silicon containing pre-coat layer 212, the yttrium oxide coating 208 would be damaged during the etching or stripping of the carbon containing layer over the substrate.
After the substrate is processed (step 120), the substrate is then removed from the plasma processing chamber (step 124). After the substrate has been removed, the interior of the plasma processing chamber is cleaned (step 128). Since in this embodiment, the substrate has been removed (step 124) and a new substrate has not been placed in the plasma processing chamber, the cleaning process is a waferless cleaning.
In this embodiment, the cleaning of the plasma processing chamber (step 128) removes the remaining silicon containing pre-coat layer 212 since the carbon containing pre-coat layer 216 has been completely etched away. In this embodiment in order to remove the remaining silicon containing pre-coat layer 212, a silicon containing pre-coat layer stripping gas is flowed into the plasma processing chamber. In this embodiment, to strip away silicon oxide, the silicon containing pre-coat layer stripping gas comprises 30 sccm to 500 sccm of nitrogen trifluoride (NF3), and 0 sccm to 200 sccm of argon (Ar). A plasma is generated from the silicon containing pre-coat layer stripping gas. In this embodiment, this may be accomplished by providing an excitation radio frequency (RF) with a frequency of 13.6 megahertz (MHz) at 2000 watts. The plasma is maintained until the remaining silicon containing pre-coat layer 212 is removed.
The cleaning of the plasma processing chamber (step 128) removes contaminants deposited during substrate processing (step 120) and strips any remaining pre-coat. After, the plasma processing chamber is cleaned (step 128), the process returns (step 132) to the step of providing a pre-coat (step 104), and the cycle is repeated. The foregoing cycle is repeated multiple times as needed or desired.
This embodiment allows for a thinner pre-coat. If only a silicon containing pre-coat is used, such as a single silicon oxide pre-coat is used, then during an etch process that etches silicon oxynitride (SiON), a thick pre-coat would be needed. This is because a process for etching SiON would significantly etch the silicon containing pre-coat. As thicker layers of SiON are etched thicker single coats of silicon containing pre-coat would be needed. If the single silicon oxide pre-coat is too thick, the throughput is decreased due to the longer time needed to deposit a thicker pre-coat and the longer time to remove the thicker pre-coat. In addition, as the silicon oxide pre-coat becomes thicker the structural stability decrease, increasing the chance that some of the silicon oxide pre-coat will flake off during processing, increasing wafer defects. In addition, if the single coat of silicon containing pre-coat is too thick, substrates may undesirably dechuck during processing. An undesirable dechuck could cause particles that may contaminate the substrate. The particles may be caused by the substrate bumping into an edge ring. In addition, an undesirable dechuck may halt processing if misalignment caused by the dechucking is significant enough to cause misalignment of the substrate on a transfer arm.
This embodiment provides two thin pre-coats of different materials, where one pre-coat is silicon containing and the other pre-coat is carbon containing. As explained above, the carbon containing pre-coat layer 216 provides improved etch resistance when etching SiON, and the silicon containing pre-coat layer 212 provides improved etch resistance when etching or stripping a carbon containing layer. As a result, a thinner overall pre-coat is required. Since in this embodiment, all of the carbon containing pre-coat layer 216 is removed, only a thin layer of the silicon containing pre-coat layer 212 needs to be cleaned away (step 128), allowing for a quick clean process.
On the other hand, the thin silicon containing pre-coat layer 212 and carbon containing pre-coat layer 216 provide sufficient protection so that the yttrium oxide coating 208 is protected and not exposed to plasma. By preventing exposure of the yttrium oxide coating 208 from plasma, the silicon containing pre-coat layer 212 and carbon containing pre-coat layer 216 prevent defects caused by particles generated from the interaction between the yttrium oxide coating 208 and plasma. In addition, the silicon containing pre-coat layer 212 and the carbon containing pre-coat layer 216 improve wafer to wafer repeatability by ensuring that chamber conditions are the same for each substrate processed. The silicon containing pre-coat layer 212 and the carbon containing pre-coat layer 216 also reduce defects by covering contaminants in the plasma processing chamber.
In another embodiment, in providing a pre-coat (step 104), a carbon containing pre-coat is first deposited (step 112) and then a silicon containing pre-coat is deposited (step 108). In such an embodiment during the processing of a substrate (step 120), an organic layer over the substrate is first etched, patterned, or stripped. Next, a silicon containing layer over the substrate is etched. The silicon containing pre-coat provides protection when the organic layer over the substrate is etched, patterned, or stripped. The silicon containing pre-coat is etched away and the carbon containing pre-coat provides protection when the silicon containing layer over the substrate is etched.
In this embodiment, in order to clean the chamber (step 128) only the remaining carbon containing pre-coat needs to be removed, since the silicon containing pre-coat was removed during the etching of the silicon containing layer over the substrate. To clean the carbon containing pre-coat, the cleaning gas comprises 40-200 sccm oxygen (O2). A plasma is generated from the cleaning gas by providing an excitation RF at a frequency of 13.6 MHz at 1000 watts. In this embodiment, no bias is applied. The cleaning process is then stopped.
This embodiment allows the processing of a substrate where an organic layer is first processed and then a silicon containing layer is processed. In other embodiments, the substrate may have two or more alternating layers of a carbon containing layer and a silicon containing layer. In such embodiments, the providing the pre-coat (step 104) comprises at least two cycles of depositing the silicon containing pre-coat (step 108) and depositing the carbon containing pre-coat (step 112).
In various embodiments, the silicon containing pre-coat layer 212 comprises silicon oxide and is carbon free. In various embodiments, the carbon containing pre-coat layer 216 comprises at least one of a hydrofluorocarbon, a hydrocarbon, or a fluorocarbon and in addition is silicon free. In various embodiments, a blank wafer may be placed in the plasma processing chamber before the cleaning of the chamber (step 128), so that the blank wafer covers and protects a chuck during the cleaning of the chamber (step 128). In other embodiments, a blank wafer may be in the plasma processing chamber during the providing the pre-coat (step 104).
The plasma power supply 306 and the wafer bias voltage power supply 316 may be configured to operate at specific radio frequencies such as 13.56 MHz, 27 MHz, 2 MHz, 1 MHz, 400 kHz, or combinations thereof. Plasma power supply 306 and wafer bias voltage power supply 316 may be appropriately sized to supply a range of powers in order to achieve desired process performance. For example, in one embodiment, the plasma power supply 306 may supply the power in a range of 50 to 5000 Watts, and the wafer bias voltage power supply 316 may supply a bias voltage in a range of 20 to 2000 V. In addition, the TCP coil 310 and/or the electrode 320 may be comprised of two or more sub-coils or sub-electrodes. The two or more sub-coils or sub-electrodes may be powered by a single power supply or powered by multiple power supplies.
As shown in
Information transferred via communications interface 414 may be in the form of signals such as electronic, electromagnetic, optical, or other signals capable of being received by communications interface 414, via a communication link that carries signals and may be implemented using wire or cable, fiber optics, a phone line, a cellular phone link, a radio frequency link, and/or other communication channels. With such a communications interface, it is contemplated that the one or more processors 402 might receive information from a network, or might output information to the network in the course of performing the above-described method steps. Furthermore, method embodiments may execute solely upon the processors or may execute over a network, such as the Internet, in conjunction with remote processors that share a portion of the processing.
The term “non-transient computer readable medium” is used generally to refer to media such as main memory, secondary memory, removable storage, and storage devices, such as hard disks, flash memory, disk drive memory, CD-ROM, and other forms of persistent memory, and shall not be construed to cover transitory subject matter, such as carrier waves or signals. Examples of computer code include machine code, such as one produced by a compiler, and files containing higher level code that are executed by a computer using an interpreter. Computer readable media may also be computer code transmitted by a computer data signal embodied in a carrier wave and representing a sequence of instructions that are executable by a processor.
In this embodiment, the pre-coat may be formed on the chamber walls 362, the power window 312, the feed 336, the electrostatic chuck, and liners within the plasma reactor 302.
While this disclosure has been described in terms of several embodiments, there are alterations, modifications, permutations, and various substitute equivalents, which fall within the scope of this disclosure. It should also be noted that there are many alternative ways of implementing the methods and apparatuses of the present disclosure. It is therefore intended that the following appended claims be interpreted as including all such alterations, modifications, permutations, and various substitute equivalents as fall within the true spirit and scope of the present disclosure.
This application claims the benefit of priority of U.S. Application No. 62/991,236, filed Mar. 18, 2020, which is incorporated herein by reference for all purposes.
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/US2021/021743 | 3/10/2021 | WO |
| Number | Date | Country | |
|---|---|---|---|
| 62991236 | Mar 2020 | US |
